DATA SHEET. TDA8561Q 2 24 W BTL or 4 12 W single-ended car radio power amplifier INTEGRATED CIRCUITS Jun 30

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1 INTEGRATED CIRCUITS DATA SHEET 2 24 W BTL or 4 2 W single-ended car radio power amplifier Supersedes data of 997 Sep 22 File under Integrated Circuits, IC0 999 Jun 30

2 FEATURES Requires very few external components High output power Flexibility in use; Quad single-ended or stereo BTL Low output offset voltage Fixed gain Diagnostic facility (distortion, short-circuit and temperature detection) Good ripple rejection Mode select switch (operating, mute and standby) Load dump protection AC and DC short-circuit safe to ground and to V P Low power dissipation in any short-circuit condition Thermally protected Reverse polarity safe Electrostatic discharge protection No switch-on/switch-off plop Flexible leads Low thermal resistance Identical inputs (inverting and non-inverting). GENERAL DESCRIPTION The is an integrated class-b output amplifier in a 7-lead single-in-line (SIL) power package. It contains 4 2 W Single-Ended (SE) or 2 24 W Bridge-Tied Load (BTL) amplifiers. The device is primarily developed for car radio applications. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V P positive operating supply voltage V I ORM repetitive peak output current 4 A I P total quiescent current 80 ma I sb standby current 0. 0 µa Stereo BTL application P o output power R L =4Ω; THD = % 24 W RR supply voltage ripple rejection 46 db V no noise output voltage R s =0Ω 70 µv Z I input impedance 25 V O DC output offset voltage 50 mv Quad single-ended application P o output power THD = % R L =4Ω 7 W R L =2Ω 2 W RR supply voltage ripple rejection 46 db V no noise output voltage R s =0Ω 50 µv Z I input impedance 50 ORDERING INFORMATION TYPE PACKAGE NUMBER NAME DESCRIPTION VERSION DBS7P plastic DIL-bent-SIL power package; 7 leads (lead length 2 mm) SOT Jun 30 2

3 BLOCK DIAGRAM V P V P2 non-inverting input VA mute switch C m output 2 8 power stage inverting input 2 3 VA mute switch C m 8 output power stage V P stand-by switch VA 5 PROTECTIONS thermal short-circuit stand-by reference voltage mute switch 4 mode select switch supply voltage ripple rejection non-inverting input x 5 mute reference voltage mute switch C m 6 diagnostic output VA 2 output power stage inverting input 3 5 VA mute switch C m output 3 2 ground (signal) input 8 power stage reference voltage not connected GND GND2 power ground (substrate) MEA858 - Fig. Block diagram. 999 Jun 30 3

4 PINNING SYMBOL PIN DESCRIPTION INV non-inverting input GND(S) 2 signal ground INV INV 2 3 inverting input 2 RR 4 supply voltage ripple rejection V P 5 supply voltage OUT 6 output GND 7 power ground OUT 2 8 output 2 n.c. 9 not connected OUT 3 output 3 GND2 power ground 2 OUT 4 2 output 4 V P2 3 supply voltage MODE 4 mode select switch input INV 3 5 inverting input 3 V DIAG 6 diagnostic output INV 4 7 non-inverting input 4 GND(S) INV 2 RR V P OUT GND OUT 2 n.c. OUT 3 GND2 OUT 4 V P2 MODE INV 3 5 V DIAG 6 INV 4 7 MEA859 - Fig.2 Pin configuration. 999 Jun 30 4

5 FUNCTIONAL DESCRIPTION The contains four identical amplifiers and can be used for Single-Ended (SE) or Bridge-Tied Load (BTL) applications. The gain of each amplifier is fixed at 20 db (26 db in BTL). Special features of the device are: During this short-circuit condition, pin 6 is LOW for 20 ms and HIGH for 50 µs (see Fig.5). The power dissipation in any short-circuit condition is very low. Mode select switch (pin 4) Low standby current (<0 µa) Low switching current (low cost supply switch) Mute facility. To avoid switch-on plops, it is advised to keep the amplifier in the mute mode during 0 ms (charging of the input capacitors at pins, 3, 5 and 7). This can be achieved by: Microcontroller control External timing circuit (see Fig.). Diagnostic output (pin 6) handbook, halfpage V O 0 V6 V P 0 MGA705 t DYNAMIC DISTORTION DETECTOR (DDD) At the onset of clipping of one or more output stages, the dynamic distortion detector becomes active and pin 6 goes LOW. This information can be used to drive a sound processor or DC volume control to attenuate the input signal and thus limit the distortion. The output level of pin 6 is independent of the number of channels that are clipping (see Figs 3 and 4). Fig.3 Distortion detector waveform; BTL application. SHORT-CIRCUIT PROTECTION handbook, halfpage V O MGA706 When a short-circuit occurs at one or more outputs to ground or to the supply voltage, the output stages are switched off until the short-circuit is removed and the device is switched on again, with a delay of approximately 20 ms, after removal of the short-circuit. During this short-circuit condition, pin 6 is continuously LOW. When a short-circuit across the load of one or both channels occurs the output stages are switched off for approximately 20 ms. After that time it is checked during approximately 50 µs to see whether the short-circuit is still present. Due to this duty cycle of 50 µs/20 ms the average current consumption during this short-circuit condition is very low (approximately 40 ma). Fig.4 0 V6 V P 0 Distortion detector waveform; single-ended application. t 999 Jun 30 5

6 handbook, full pagewidthcurrent in output stage MGL24 V6 short-circuit over the load 20 ms t V P 50 µs t Fig.5 Short-circuit waveform. TEMPERATURE DETECTION When the virtual junction temperature T vj reaches 50 C, pin 6 will be active LOW. OPEN-COLLECTOR OUTPUT Pin 6 is an open-collector output, which allows pin 6 of more devices being tied together. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 34). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT v P positive supply voltage operating 8 V non-operating 30 V load dump protection during 50 ms; t r 2.5 ms 45 V I OSM non-repetitive peak output current 6 A I ORM repetitive peak output current 4 A T stg storage temperature C T amb operating ambient temperature C T vj virtual junction temperature 50 C V psc AC and DC short-circuit safe voltage 8 V V pr reverse polarity 6 V P tot total power dissipation W 999 Jun 30 6

7 THERMAL CHARACTERISTICS In accordance with IEC SYMBOL PARAMETER VALUE UNIT R th j-a thermal resistance from junction to ambient in free air 40 K/W R th j-c thermal resistance from junction to case (see Figs 6 and 7).3 K/W handbook, halfpage virtual junction output output 2 output 3 output 4 handbook, halfpage output output 2 virtual junction 3.0 K/W 3.0 K/W 3.0 K/W 3.0 K/W 2.2 K/W 2.2 K/W 0.7 K/W 0.7 K/W 0.2 K/W case MEA K/W MEA8-2 case Fig.6 Equivalent thermal resistance network; BTL application. Fig.7 Equivalent thermal resistance network; single-ended application. 999 Jun 30 7

8 DC CHARACTERISTICS V P = 4.4 V; T amb =25 C; measured in Fig.8; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply V P positive supply voltage note V I P total quiescent current 80 ma V O DC output voltage note V V O DC output offset voltage 50 mv Mode select switch V on switch-on voltage level 8.5 V MUTE CONDITION V mute mute voltage V V O output voltage in mute position V Imax = V; f = khz 2 mv V O DC output offset voltage (between 50 mv pins 6 to 8 and to 2) STANDBY CONDITION V sb standby voltage 0 2 V I sb standby current 0 µa I sw switch-on current 2 40 µa Diagnostic output (pin 6) V DIAG diagnostic output voltage any short-circuit or clipping 0.6 V Notes. The circuit is DC adjusted at V P = 6 to 8 V and AC operating at V P = 8.5 to 8 V. 2. At 8V<V P < 30 V the DC output voltage 0.5V P. 999 Jun 30 8

9 AC CHARACTERISTICS V P = 4.4 V; R L =4Ω; f = khz; T amb =25 C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Stereo BTL application (measured in Fig.8) P o output power note THD = 0.5% 5 9 W THD = % W THD total harmonic distortion P o =W 0.06 % P o output power V P = 3.2 V THD = 0.5% 6 W THD = % 20 W B power bandwidth THD = 0.5%; 20 to Hz P o = db; with respect to 5 W 5000 f l low frequency roll-off at db; note 2 45 Hz f h high frequency roll-off at db 20 khz G v closed loop voltage gain db SVRR supply voltage ripple rejection note 3 on 48 db mute 46 db standby 80 db Z I input impedance V no noise output voltage on R s =0Ω; note 4 70 µv on R s =; note µv mute notes 4 and 5 µv α cs channel separation R s = 40 db G v channel unbalance db DYNAMIC DISTORTION DETECTOR THD total harmonic distortion V V; no short-circuit % Quad single-ended application (measured in Fig.9) P o output power note THD = 0.5% 4 5 W THD = % W THD total harmonic distortion P o =W 0.06 % P O output power R L =2Ω; note THD = 0.5% 7.5 W THD = % 2 W f l low frequency roll-off at db; note 2 25 Hz f h high frequency roll-off at db 20 khz G v closed loop voltage gain db 999 Jun 30 9

10 SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT SVRR supply voltage ripple rejection note 3 on 48 db mute 46 db standby 80 db Z I input impedance V no noise output voltage on R s =0Ω; note 4 50 µv on R s =; note µv mute notes 4 and 5 50 µv α cs channel separation R s = 40 db G v channel unbalance db DYNAMIC DISTORTION DETECTOR THD total harmonic distortion V V; no short-circuit % Notes. Output power is measured directly at the output pins of the IC. 2. Frequency response externally fixed. 3. Ripple rejection measured at the output with a source impedance of 0 Ω, maximum ripple amplitude of 2 V (p-p) and at a frequency of between 0 Hz and khz. 4. Noise measured in a bandwidth of 20 Hz to 20 khz. 5. Noise output voltage independent of R s (V i = 0 V). 999 Jun 30

11 TEST AND APPLICATION INFORMATION handbook, full pagewidth mode switch diagnostic 0 nf V P 2200 µf non- inverting input 220 nf TDA8564Q 6 non-inverting input 4 inverting input 2 ground (signal) supply voltage ripple rejection 220 nf reference voltage not connected inverting input MEA862-2 power ground (substrate) Fig.8 Stereo BTL application diagram. 999 Jun 30

12 handbook, full pagewidth mode switch 0 nf V P 2200 µf non- inverting input 220 nf TDA8564Q 6 00 µf inverting input 2 ground (signal) supply voltage ripple rejection non-inverting input nf 0 µf 220 nf /2V p 7 reference voltage µf not connected 00 µf inverting input nf 5 00 µf 7 MEA863-2 power ground (substrate) Fig.9 Quad single-ended application diagram. 999 Jun 30 2

13 handbook, full pagewidth mode switch 0 nf 2200 µf V P non- inverting input 220 nf TDA8564Q 6 inverting input 2 ground (signal) not connected non-inverting input nf 220 nf reference voltage V P 2 0 µf D inverting input nf 5 7 power ground (substrate) MEA µf () When short-circuiting the single-ended capacitor, the dissipation will be reduced due to diode D. Fig. Quad single-ended application diagram Jun 30 3

14 Mode select switch To avoid switch-on plops, it is advised to keep the amplifier in the mute mode during >0 ms (charging of the input capacitors at pins, 3, 5 and 7. The circuit in Fig. slowly ramps up the voltage at the mode select switch pin when switching on and results in fast muting when switching off. handbook, halfpage V P 0 Ω 47 µf mode select switch 0 MGA708 Fig. Mode select switch circuitry. 2 MGA709 THD (%) () (2) (3) 2 2 P (W) o 2 () f = khz. (2) f = khz. (3) f = 0 Hz. Fig.2 Total harmonic distortion as a function of output power; V P = 4.4 V, R L =4Ω. 999 Jun 30 4

15 50 handbook, full pagewidth Po (W) MGA7 40 () 30 (2) 20 (3) () THD = 30%. (2) THD = %. (3) THD = 0.5%. V P (V) 8 Fig.3 Output power as a function of supply voltage. 20 Po (W) 8 MGA f (Hz) 5 Fig.4 Power bandwidth as a function of frequency; THD = 0.5%, V P = 4.4 V, R L =4Ω. 999 Jun 30 5

16 MGA72 THD (%) () (2) (3) f (Hz) 5 () P o = 0. W. (2) P o =W. (3) P o =W. Fig.5 Total harmonic distortion as a function of frequency; V P = 4.4 V, R L =4Ω. 50 MGA73 RR (db) () (2) (3) f (Hz) 5 () On condition. (2) Mute condition. (3) Standby condition. Fig.6 Ripple rejection as a function of frequency. 999 Jun 30 6

17 0 handbook, full pagewidth I q (ma) MGA V P (V) 8 Fig.7 Quiescent current as a function of supply voltage; R L =. SINGLE-ENDED APPLICATION 2 MGA75 THD (%) () (2) (3) 2 2 P (W) o 2 () f = khz. (2) f = khz. (3) f = 0 Hz. Fig.8 Total harmonic distortion as a function of output power; V P = 4.4 V, R L =2Ω. 999 Jun 30 7

18 5 handbook, full pagewidth Po (W) MGA () 6 (2) (3) () THD = 30%. (2) THD = %. (3) THD = 0.5%. V P (V) 8 Fig.9 Output power as a function of supply voltage. Po (W) 8 MGA f (Hz) 5 Fig.20 Power bandwidth as a function of frequency; THD = 0.5%, V P = 4.4 V, R L =2Ω. 999 Jun 30 8

19 MGA78 THD (%) () (2) f (Hz) 5 () P o = 0. W. (2) P o =W. Fig.2 Total harmonic distortion as a function of frequency; V P = 4.4 V, R L =2Ω. 30 handbook, full pagewidth α cs (db) MGA f (Hz) 5 Fig.22 Channel separation as a function of frequency. 999 Jun 30 9

20 BTL APPLICATION 4 MGA720 P tot (W) P o (W) 28 Fig.23 Total power dissipation as a function of output power; V P = 4.4 V, R L =4Ω( channel driven BTL or 4 channels in single-ended mode). 999 Jun 30 20

21 PACKAGE OUTLINE DBS7P: plastic DIL-bent-SIL power package; 7 leads (lead length 2 mm) SOT243- D non-concave x Dh E h view B: mounting base side d A 2 B j E A L 3 L Q c v M 7 Z e e b p w M m e2 0 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A 2 b p c D () d D E () e e Z () h e 2 E h j L L 3 m Q v w x mm Note. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE SOT Jun 30 2

22 SOLDERING Introduction to soldering through-hole mount packages This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number ). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 2 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (T stg(max) ). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. Suitability of through-hole mount IC packages for dipping and wave soldering methods SOLDERING METHOD PACKAGE DIPPING DBS, DIP, HDIP, SDIP, SIL suitable suitable () WAVE Note. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 34). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 999 Jun 30 22

23 NOTES 999 Jun 30 23

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