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1 DDR4 NVDIMM Standardization: Now and Future Server Forum 2014 Copyright 2014 Micron Technology, Inc

2 NVDIMM Definition One of several Hybrid DIMM versions RDIMM/LRDIMM-like DRAM module with storage memory components, controller and bus isolation Plugs into a standard DIMM socket No direct access to on-module storage memory (NAND) Only used for DRAM backup/restore (limited by protocol & controller) On-module storage memory provides persistence in event of power fail Backup power source required Tethered ultracap or back-up power through 12V pins

3 Non-Volatile DIMM (NVDIMM) Persistent Memory Enabled by DRAM + NAND 12V Energy source, DIMM connector UltraCap Module Self-contained energy source for operation during power failure Mux Bus Isolation for backup and restore Onboard DRAM & NAND DRAM performance with data persistence Integrated Controller NAND management and high speed DMA HW Architecture RDIMM with bus isolation, storage memory, and controller FW Architecture Save on Power loss Restore on Reboot SAVE operation through I 2 C command or SAVE HW signal Power-fail backup source Typically 1:1 requirement to NVDIMM Tethered ultracap pack 12V DIMM connector Oil & Gas Exploration Financial Data Integrity Medical Research Financial Transactions Power Loss Events Big Data Analytics

4 The Case for NVDIMM CPU Cache DRAM Significant hierarchy gap exists in current scale-out architectures PCIe SSD SAS SSD SATA SSD HDD Performance Persistence Endurance Picoseconds Nanoseconds Microseconds Milliseconds Seconds Speed/performance driving large data sets to be stored in warm or hot locations (NVDIMM, PCI SSDs, etc.) NVDIMM used as storage cache acceleration in many instances Enterprise applications using real-time processing to capture, analyze, and respond intelligently to changing events Reliability/uptime is critical for enterprise IT resources Gaining momentum in several application spaces Maintaining QoS while supporting increasingly demanding enterprise workloads are driving need for higher memory performance and density.

5 DDR4 12V Power Pins (1, 145) Standardized Provides NVDIMM power for two possible situations Tethered ultracap charging Central back-up power using 12V pins during power loss Energy provided only for NVDIMM SAVE operation Ultracap charging Charging will be significantly faster than 1.2V source Central back-up power Eliminates need for individual ultracaps Allows for higher number NVDIMM/system Allows for higher density NVDIMMs System required to handle status monitoring and health of backup power Mechanism to get this information to NVDIMM controller

6 DDR4 12V Power Pin Details Possible Future Consideration Central back-up power scenario More definition/standardization required Minimum voltage specification Amount of energy available Length of up time after system power loss Back-up power health and status monitoring details System needs details to determine: Capability of backup source Number and size of NVDIMMs the system can support

7 DDR4 SAVE_n Pin (230) Standardized Similar to DDR3 HW signal used today to initiate NVDIMM backup Similar DDR3 system requirements prior to activating SAVE_n signal DRAM must be placed in self-refresh NVDIMM must be ready to perform a backup Sufficient space in storage memory Sufficient backup power Use of SAVE_n is the quickest way to initiate a backup

8 Operation Complete HW Signal Possible Future Consideration Current notice of completed backup or restore Polling NVDIMM status registers Polling status reduces operational performance Standardizing an operation complete HW signal Could be used for multiple operations Initialization Save Restore Possible alternatives Bidirectional signal (SAVE_n) Separate pin multiplexed with other events such as (ALERT_n or Event) Higher system performance than polling Only interrupt CPU when operation complete Less time spend in servicing operation

9 NVDIMM FW Possible Future Consideration NVDIMM FW Control Initialization Backup Restore Status Errors Ultracap Management Storage Memory Management Standardized FW features Not necessarily a standard FW interface Simplifies MRC, BIOS, and OS/Driver support 3 rd Party SW Proprietary SW Application Interface Operational Control Features Memory table Recognition Configuration Initialization HW Control Status SW Stack Application OS Driver BIOS/UEFI MRC NVDIMM FW

10 Summary NVDIMM fulfills a need in the storage hierarchy Standardization opens up new growth opportunities Current 12V standard allows for efficient ultracap charging and a central backup power source SAVE_n standard sets a efficient interface to signal a backup More standardization is possible in several areas Standardization drives wider adoption As more applications discover the benefits of NVDIMM new areas of standardization will probably follow

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