FEATURES APPLICATIO S TYPICAL APPLICATIO. LTC4001 2A Synchronous Buck Li-Ion Charger DESCRIPTIO
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1 FEATURES Low Power Dissipation 2A Maximum Charge Current No External MOSFETs, Sense Resistor or Blocking Diode Required Remote Sensing at Battery Terminals Programmable Charge Termination Timer Preset 4.2V Float Voltage with ±.5% Accuracy Programmable Charge Current Detection/Termination Automatic Recharge Thermistor Input for Temperature Qualified Charging Compatible with Current Limited Wall Adapters Low Profile 16-Lead (4mm 4mm) QFN Package APPLICATIO S U Handheld Battery-Powered Devices Handheld Computers Charging Docks and Cradles Digital Cameras Smart Phones LTC41 2A Synchronous Buck Li-Ion Charger DESCRIPTIO U The LTC 41 is a 2A Li-Ion battery charger intended for 5V wall adapters. It utilizes a 1.5MHz synchronous buck converter topology to reduce power dissipation during charging. Low power dissipation, an internal MOSFET and sense resistor allow a physically small charger that can be embedded in a wide range of handheld applications. The LTC41 includes complete charge termination circuitry, automatic recharge and a ±1% 4.2V float voltage. Input short-circuit protection is included so no blocking diode is required. Battery charge current, charge timeout and end-of-charge indication parameters are set with external components. Additional features include shorted cell detection, temperature qualified charging and overvoltage protection. The LTC41 is available in a low profile (.75mm) 16-lead (4mm 4mm) QFN package., LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATIO U 2A Single Cell Li-Ion Battery Charger V IN 4.5V TO 5.5V 1µF V INSENSE PV IN PGND CHRG NTC FAULT EN PROG IDET TIMER 274Ω SW 1.5µH LTC41.22µF.1µF SENSE BATSENS BAT SS GNDSENS 1µF 41 TA1a 4.2V Li-Ion TOTAL APPLICATION CIRCUIT POWER DISSIPATION (W) Power Loss vs V BAT Charging (PWM Mode) V IN = 5V 2A CHARGER V BAT (V) 41 TA1b 1
2 ABSOLUTE AXI U RATI GS W W W (Note 1) PV IN, V INSENSE t < 1ms, DC < 1%....3V to 7V Steady State....3V to 6V SW, SENSE, BAT, BATSENS, SS, FAULT, CHRG, EN, NTC, PROG, IDET, TIMER Voltage....3V to 6V Operating Temperature Range (Note 3).. 4 C to 85 C Operating Junction Temperature (Note 5)... 4 C to 125 C Storage Temperature Range C to 125 C U U U W PACKAGE/ORDER I FOR ATIO BAT SENSE PGND GNDSENS T JMAX = 125 C, θ JA = 37 C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB ORDER PART NUMBER LTC41EUF TOP VIEW BATSENS TIMER SS IDET SW EN CHRG PVIN UF PACKAGE 16-LEAD (4mm 4mm) PLASTIC QFN UF PART MARKING 41 Consult LTC Marketing for parts specified with wider operating temperature ranges PROG NTC FAULT V INSENSE Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range, otherwise specifications are T A = 25 C. V IN = 5V, V EN = V, R PROG = 549Ω, R IDET = 549Ω, unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS V IN Supply Voltage (Note 2) V I IN PV IN Connected to V INSENSE, PROG and IDET 2 ma Pins Open, Charger On Shutdown, EN = V IN 5 µa V FLOAT V BAT Regulated Float Voltage Measured from BATSENS to GNDSENS V V I BAT Current Mode Charge Current R PROG = 549Ω, V BAT = 3.5V A R PROG = 1.1k, V BAT = 3.5V A Shutdown, EN = V IN ±5 µa I TRIKL Trickle Charge Current V BAT = 2V ma V TRIKL Trickle Charge Threshold V BAT Rising V V BAT Falling V V UVL V IN Undervoltage Lockout Voltage V IN Rising, Measured from V INSENSE to GNDSENS V V UVL V IN Undervoltage Lockout Hysteresis Measured from V INSENSE to GNDSENS 1 mv V ASD Automatic Shutdown Threshold V INSENSE V BATSENS Rising (Turn-On), V BATSENSE = 4V mv Voltage V INSENSE V BATSENS Falling (Turn-Off), V BATSENSE = 4V mv f OSC Oscillator Frequency MHz D Maximum Duty Factor 1 % R PFET R DS(ON) of P-Channel MOSFET Measured from PV IN to SW 127 mω R NFET R DS(ON) of N-Channel MOSFET Measured from SW to PGND 121 mω 2
3 ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range, otherwise specifications are T A = 25 C. V IN = 5V, V EN = V, R PROG = 549Ω, R IDET = 549Ω, unless otherwise specified. LTC41 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS t TIMER Timer Accuracy C TIMER =.22µF ±1 % V EN Enable Input Threshold Voltage V EN Rising V V EN Enable Input Hysteresis 1 mv V PROG PROG Pin Voltage R PROG = 549Ω V V IDET IDET Pin Voltage R IDET = 549Ω V I IDET IDET Threshold R IDET = 549Ω ma I CHRG CHRG Pin Weak Pull-Down Current V CHRG = 1V µa V CHRG CHRG Pin Output Low Voltage I CHRG = 5mA.2.4 V V OL FAULT Pin Output Low Voltage 1mA Load.4 V V OH FAULT Pin Output High Voltage 1mA Load 4.6 V V RECHRG Recharge Battery Threshold Voltage V FLOAT V RECHRG V BAT Falling mv t RB Recharge Filter Time Constant 4 ms t RECHRG Recharge Time Percent of Total Charge Time 5 % t TRIKL Low-Battery Trickle Charge Time Percent of Total Charge Time, V BAT < 2.8V, 25 % Measured Using BATSENS and GNDSENS Pins I SS Soft-Start Ramp Current V BAT < V FLOAT 1mV, V BAT Across BATSENS µa and GNDSENS Pins V COLD NTC Pin Cold Temperature Fault From NTC to GNDSENS Pin Threshold Rising Threshold.74 V INSENSE V Falling Threshold.72 V INSENSE V V HOT NTC Pin Hot Temperature Fault From NTC to GNDSENS Pin Threshold Falling Threshold.29 V INSENSE V Rising Threshold.3 V INSENSE V V DIS NTC Disable Threshold (Falling) From NTC to GNDSENS Pin V V INSENSE V INSENSE V INSENSE V DIS NTC Disable Hysteresis From NTC to GNDSENS Pin.1 V INSENSE V Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Operation with current limited wall adapters is allowed down to the undervoltage lockout threshold. Note 3: The LTC41E is guaranteed to meet performance specifications from C to 85 C. Specifications over the 4 C to 85 C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: T J is calculated from the ambient temperature T A and power dissipation P D according to the following formula: T J = T A (P D 37 C/W) Note 5: This IC includes overtemperature protection that is intended to protect the device during momentary overload. Junction temperature will exceed 125 C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature my impair device reliability. 3
4 TYPICAL PERFOR A CE CHARACTERISTICS UW (T A = 25 C unless otherwise noted) PERCENT VARIATION (%) Oscillator Frequency vs V IN V BAT = 3.2V V SS = 1V FREQUENCY VARIATION FROM 25 C (%) Oscillator Frequency vs Temperature V IN = 5V V BAT = 3.2V V SS = 1V TOTAL APPLICATION CIRCUIT POWER DISSIPATION (W) Dissipation of Figure 8 Circuit vs I BAT V IN = 5V V BAT = 4V V IN (V) TEMPERATURE ( C) I BAT (ma) 41 G1 41 G2 41 G3 TOTAL APPLICATION CIRCUIT POWER DISSIPATION (W) Dissipation of Figure 8 Circuit vs V IN V BAT = 4V I BAT = 2A I BAT = 1.5A I BAT = 1A I BAT = 5mA V PROG (V) PROG Pin Characteristic (V PROG vs I PROG ) V BAT = 3.2V V BAT = 3.5V V BAT = 3.7V V IN = 5V V BAT = 4V I BAT (A) Output Charging Characteristic Showing Constant Current and Constant Voltage Operation V IN (V) I PROG (ma) V BAT (V) 41 G4 41 G5 41 G6 55 Trickle Charge Current vs V BAT 4.3 V FLOAT and Recharge Battery Threshold Voltage vs Temperature I BAT (ma) 5 45 V IN = 5.5V V IN = 4V V IN = 4.5V V IN = 5V FLOAT AND RECHARGE VOLTAGES (V) V FLOAT V RECHARGE (V BAT FALLING) V BAT (V) TEMPERATURE ( C) 41 G7 41 G8 4
5 TYPICAL PERFOR A CE CHARACTERISTICS UW LTC41 Soft-Start (PWM Mode) 4 IDET Threshold vs R IDET for R PROG = 549Ω CHRG Pin Temperature Fault Behavior (Detail) INPUT CURRENT (I IN ).5A/DIV INDUCTOR CURRENT (I L ).5A/DIV SOFT-START VOLTAGE (V SS ) 1V/DIV EN PIN (V EN ) 5V/DIV V BAT = 3.5V V IN = 5V 2ms/DIV 41 G9 IDET (ma) CHRG 1V/DIV TIME (2µs/DIV) 41 G R IDET (Ω) 41 G1 PI FU CTIO S U U U BAT (Pin 1): Battery Charger Output Terminal. Connect a 1µF ceramic chip capacitor between BAT and PGND to keep the ripple voltage small. SENSE (Pin 2): Internal Sense Resistor. Connect to external inductor. PGND (Pin 3): Power Ground. GNDSENS (Pin 4): Ground Sense. Connect this pin to the negative battery terminal. GNDSENS provides a Kelvin connection for PGND and must be connected to PGND schematically. SW (Pin 5): Switch Node Connection. This pin connects to the drains of the internal main and synchronous power MOSFET switches. Connect to external inductor. EN (Pin 6): Enable Input Pin. Pulling the EN pin high places the LTC41 into a low power state where the BAT drain current drops to less than 3µA and the supply current is reduced to less than 5µA. For normal operation, pull the pin low. CHRG (Pin 7): Open-Drain Charge Status Output. When the battery is being charged, CHRG is pulled low by an internal N-channel MOSFET. When the charge current drops below the IDET threshold (set by the R IDET programming resistor) for more than 5milliseconds, the N-channel MOSFET turns off and a 3µA current source is connected from CHRG to ground. (This signal is latched and is reset by initiating a new charge cycle.) When the timer runs out or the input supply is removed, the current source will be disconnected and the CHRG pin is forced to a high impedance state. A temperature fault causes this pin to blink. PV IN (Pin 8): Positive Supply Voltage Input. This pin connects to the power devices inside the chip. V IN ranges from 4V to 5.5V for normal operation. Operation down to the undervoltage lockout threshold is allowed with current limited wall adapters. Decouple with a 1µF or larger surface mounted ceramic capacitor. V INSENSE (Pin 9): Positive Supply Sense Input. This pin connects to the inputs of all input comparators (UVL, V IN to V BAT ). It also supplies power to the controller portion of this chip. When the BATSENS pin rises to within 3mV of V INSENSE, the LTC41 enters sleep mode, dropping I IN to 5µA. Tie this pin directly to the terminal of the PV IN decoupling capacitor. 5
6 PI FU CTIO S U U U FAULT (Pin 1): Battery Fault. This pin is a logic high if a shorted battery is detected or if a temperature fault is detected. A temperature fault occurs with the temperature monitor circuit enabled and the thermistor temperature is either below C or above 5 C (typical). NTC (Pin 11): Input to the NTC (Negative Temperature Coefficient) Thermistor Temperature Monitoring Circuit. Under normal operation, tie a thermistor from the NTC pin to the GNDSENS pin and a resistor of equal value from NTC to V IN. When the voltage on this pin is above.74v IN (Cold, C) or below.29v IN (Hot, 5 C), charging is disabled and the CHRG pin blinks. When the voltage on NTC comes back between.74v IN and.29v IN, the timer continues where it left off and charging resumes. There is approximately 3 C of temperature hysteresis associated with each of the input comparators. If the NTC function is not used connect the NTC pin to GNDSENS. This will disable all of the NTC functions. NTC should never be pulled above V IN. PROG (Pin 12): Charge Current Program. The R PROG resistor connects from this pin to GNDSENS, setting the current: R PROG k = 1 11 I. BAT( AMPS) where I BAT is the high rate battery charging current. IDET (Pin 13): Charge Rate Detection Threshold. Connecting a resistor, R IDET to GNDSENS programs the charge rate detection threshold. If R IDET = R PROG, CHRG provides an I BAT /1 indication. For other thresholds see the Applications Information section. SS (Pin 14): Soft-Start/Compensation. Provides soft-start function and compensation for the float voltage control loop and compensation for the charge current control loop. Tie a soft-start/compensation capacitor between this pin and GNDSENS. TIMER (Pin 15): Timer Capacitor. The timer period is set by placing a capacitor, C TIMER, to GNDSENS. Set C TIMER to: C TIMER = Time (Hrs).733 (µf) where time is the desired charging time. Connect this pin to IDET to disable the timer. Connect this pin to GNDSENS to end battery charging when I BAT drops below the IDET charge rate threshold. BATSENS (Pin 16): Battery Sense Input. An internal resistor divider sets the final float voltage at this pin. The resistor divider is disconnected in sleep mode or when EN = H to reduce the battery drain current. Connect this pin to the positive battery terminal. Exposed Pad (Pin 17): Ground. This pin must be soldered to the PCB ground (PGND) for electrical contact and rated thermal performance. 6
7 LTC41 BLOCK DIAGRA W BATSENS GNDSENS 41 BD 9V INSENSE 16 SHUTDOWN LOW-BATTERY RECHARGE FLOAT VOLTAGE ERROR AMP BATTERY OVERVOLTAGE VOLTAGE REFERENCE 1.2V 4 1 5mA BAT OVERCURRENT IDET UNDERVOLTAGE CHARGE CURRENT ERROR AMP SOFT-START COPMPARATOR 15mV PROG 2 12 SENSE IDET CURRENT REVERSAL PROG ERROR AMP GND PGND 5 SW 1.2V 1.1V 3 8 PV IN PROG SHORT OSCILLATOR CLK RAMP PWM S RD Q DRIVER SS 14 SS PWM ON TRICKLE ON OVERCURRENT SHUTDOWN LOW BATTERY EN 6 EN LOW CURRENT VIN GOOD RECHARGE CHRG 7 CHRG FAULT 1 FAULT LOGIC TIMER 15 TIMER DISCHARGE SS PROG SHORTED 11 NTC NTC TFAULT SS LOW OVERVOLTAGE CHIP OVERTEMP CHIP OVER TEMP CONNECT 7
8 OPERATIO U The LTC41 is a constant current, constant voltage Li-Ion battery charger based on a synchronous buck architecture. Low power dissipation makes continuous high rate (2A) battery charging practical. The battery DC charge current is programmed by a resistor R PROG (or a DAC output current) at the PROG pin. The final battery float voltage is internally set to 4.2V. Charging begins when the V IN voltage rises above the UVLO level (approximately 2.75V), V IN is 25mV greater than the battery voltage and EN is low. At the beginning of the charge cycle, if the battery voltage is less than the trickle charge threshold, 3V, the charger goes into trickle charge mode and delivers approximately 5mA to the battery using a linear charger. If the battery voltage stays low for more than one quarter of the charge time, the battery is considered faulty, the charge cycle is terminated and the FAULT pin produces a logic high output. When the battery voltage exceeds the trickle charge threshold, the low rate linear charger is turned off and the high rate PWM charger ramps up (based on the SS pin capacitance) reaching its full-scale constant current (set via the PROG pin). When the battery approaches the float voltage, the charge current will start to decrease. When the charge current drops below the charge rate detection threshold (set via the IDET pin) for more than 5ms, an internal comparator turns off the internal pull-down N-channel MOSFET at the CHRG pin, and connects a weak current source (3µA typical) to ground to indicate a near end-ofcharge condition. Total charge time is set by an external capacitor connected to the timer pin. After timeout occurs, the charge cycle is terminated and the CHRG pin is forced to a high impedance state. To restart the charge cycle, remove and reapply the input voltage, or momentarily shut the charger down via the EN pin. Also, a new charge cycle will begin if the battery voltage drops below the recharge threshold voltage (1mV below the float voltage). A recharge cycle lasts only one-half of the normal charge time. A negative temperature coefficient (NTC) thermistor located close to the battery pack can be used to monitor battery temperature and suspend charging when battery temperature is outside the C to 5 C window. A temperature fault drives the FAULT pin high and makes the CHRG pin blink. When the input voltage (V IN ) is present, the charger can be shut down by pulling the EN pin up. IDET Blanking The IDET comparator provides an end-of-charge indication by sensing when battery charge current is less than the IDET threshold. To prevent a false end-of-charge indication from occurring during soft-start, this comparator is blanked until the battery voltage approaches the float voltage. Automatic Battery Recharge After the charge cycle is completed and if both the battery and the input power supply (wall adapter) are still connected, a new charge cycle will begin if the battery voltage drops below 4.1V due to self-discharge or external loading. This will keep the battery near maximum capacity at all times without manually restarting the charge cycle. In some applications such as battery charging in GPRS cellphones, large load current transients may cause battery voltage to momentarily drop below the recharge threshold. To prevent these transients from initiating a recharge cycle when it is not needed, the output of the recharge comparator is digitally qualified. Only if the battery voltage stays below the recharge threshold for at least 4ms will battery recharging occur. (GPRS qualification is available even if timeout is disabled.) Undervoltage Lockout and Automatic Shutdown Internal undervoltage lockout circuits monitor V IN and keep the charger circuits shut down until V IN rises above the undervoltage lockout threshold (3V). The UVLO has a built-in hysteresis of 1mV. Furthermore, to protect against reverse current, the charger also shuts down if V IN is less than V BAT. If automatic shutdown is tripped, V IN must increase to more than 25mV above V BAT to allow charging. 8
9 OPERATIO U Overvoltage, Chip Overtemperature and Short-Circuit Current Protection The LTC41 includes overvoltage, chip overtemperature and several varieties of short-circuit protection. A comparator turns off both chargers (high rate and trickle) if battery voltage exceeds the float voltage by approximately 5%. This may occur in situations where the battery is accidentally disconnected while battery charging is underway. A comparator continuously monitors on-chip temperature and will shut off the battery charger when chip temperature exceeds approximately 16 C. Battery charging will be enabled again when temperature drops to approximately 15 C. Short-circuit protection is provided in several different ways. First, a hard short on the battery terminals will cause the charge to enter trickle charge mode, limiting charge current to the trickle charge current (typically 5mA). Second, PWM charging is prevented if the high rate charge current is programmed far above the 2A maximum recommended charge current (via the PROG pin). Third, an overcurrent comparator monitors the peak inductor current. 9
10 APPLICATIO S I FOR ATIO U W U U Soft-Start and Compensation Capacitor Selection The LTC41 has a low current trickle charger and a PWM-based high current charger. Soft-start is used whenever the high rate charger is initially turned on, preventing high start-up current. Soft-start ramp rate is set by the internal 12.8µA pull-up current and an external capacitor. The control range on the SS pin is approximately.3v to 1.6V. With a.1µf capacitor, the time to ramp up to maximum duty cycle is approximately 1ms. The external capacitor on the SS pin also sets the compensation for the current control loop and the float voltage control loop. A minimum capacitance of 1nF is required. Charge Current and IDET Programming The LTC41 has two different charge modes. If the battery is severely depleted (battery voltage less than 2.9V) a 5mA trickle current is initially used. If the battery voltage is greater than the trickle charge threshold, high rate charging is used. This higher charge current is programmable and is approximately 915 times the current delivered by the PROG pin. This current is usually set with an external resistor from PROG to GNDSENS, but it may also be set with a current output DAC connected to the PROG pin. The voltage on the PROG pin is nominally 1.213V. For 2A charge current: V R PROG = A Ω The IDET threshold (a charge current threshold used to determine when the battery is nearly fully charged) is programmed in much the same way as the PROG pin, except that the IDET threshold is 91.5 times the current delivered by the IDET pin. This current is usually set with an external resistor from IDET to ground, but it may also be set with a current output DAC. The voltage on the PROG pin is nominally 1.213V. For 2mA IDET current (corresponding to C/1 for a 2AHr battery): V R IDET = A Ω 1.1kΩ programs approximately 1mA and 274Ω approximately 4mA. For applications where IDET is set to one tenth of the high rate charge current, and slightly poorer charger current and IDET threshold accuracy is acceptable, the PROG and IDET pins may be tied together and a single resistor, R1, can program both (Figure 1). and R1= IDET = I CHARGE I CHARGE 1 LTC41 PROG IDET R1 274Ω FOR 2A GNDSENS 41 F1 Figure 1. Programming Charge Current and IDET Threshold with a Single Resistor 1
11 APPLICATIO S I FOR ATIO U W U U The equations for calculating R1 (used in single resistor programming) differ from the equations for calculating R PROG and R IDET (2-resistor programming) and reflect the fact that the current from both the IDET and PROG pins must flow through a single resistor R1 when a single programming resistor is used. CHRG Status Output Pin When a charge cycle starts, the CHRG pin is pulled to ground by an internal N-channel MOSFET which is capable of driving an LED. When the charge current drops below the end-of-charge (IDET) threshold for at least 4ms, and the battery voltage is close to the float voltage, the N-channel MOSFET turns off and a weak 3µA current source to ground is connected to the CHRG pin. This weak pulldown remains until the charge cycle ends. After charging ends, the pin will become high impedance. By using two different value resistors, a microprocessor can detect three states from this pin (charging, end-of-charge and charging stopped). See Figure 2. To detect the charge mode, force the digital output pin, OUT, high and measure the voltage on the CHRG pin. The N-channel MOSFET will pull the pin low even with a 2k pullup resistor. Once the charge current drops below the endof-charge threshold, the N-channel MOSFET is turned off and a 3µA current source is connected to the CHRG pin. The IN pin will then be pulled high by the 2k resistor connected to OUT. Now force the OUT pin into a high impedance state, the current source will pull the pin low through the 39k resistor. When charging stops, the CHRG pin changes to a high impedance state and the 39k resistor will then pull the pin high to indicate charging has stopped. Charge Termination Battery charging may be terminated several different ways, depending on the connections made to the TIMER pin. For time-based termination, connect a capacitor between the TIMER pin and GNDSENS (C TIMER = Time(Hrs).733µF). Charging may be terminated when charge current drops below the IDET threshold by tying TIMER to GNDSENS. Finally, charge termination may be defeated by tying TIMER to IDET. In this case, an external device can terminate charging by pulling the EN pin high. Battery Temperature Detection When battery temperature is out of range (either too hot or too cold) charging is temporarily halted and the FAULT pin is driven high. In addition, if the battery is still charging at a high rate (greater than the IDET current) when a temperature fault occurs, the CHRG pin NMOS turns on and off at approximately 5kHz, alternating between a high and low duty factor at an approximate rate of 1.5Hz (Figure 3). This provides a low rate visual indication (1.5Hz) when driving an LED from the CHRG pin while providing a fast temperature fault indication (2useconds typical) to a microprocessor by tying the CHRG pin to an interrupt line. Serrations within this pulse are typically 5ns wide. V IN V DD LTC41 CHRG R1 39k R2 2k µprocessor OUT IN 41 F2 667ms 2µs 41 F3 Figure 2. Microprocessor Interface Figure 3. CHRG Temperature Fault Waveform 11
12 APPLICATIO S I FOR ATIO U W U U The battery temperature is measured by placing a negative temperature coefficient (NTC) thermistor close to the battery pack. To use this feature, connect the NTC thermistor, R NTC, between the NTC pin and GNDSENS and the resistor, R NOM, from the NTC pin to V INSENSE. R NOM should be a 1% resistor with a value equal to the value of the chosen NTC thermistor at 25 C. The LTC41 goes into hold mode when the resistance, R HOT, of the NTC thermistor drops to.41 times the value of R NOM. For instance for R NTC = 1k. (The value for a Vishay NTHS63N2N12J thermistor at 25 C) hold occurs at approximately 4.1k, which occurs at 5 C. The hold mode freezes the timer and stops the charge cycle until the thermistor indicates a return to a valid temperature. As the temperature drops, the resistance of the NTC thermistor rises. The LTC41 is designed to go into hold mode when the value of the NTC thermistor increases to 2.82 times the value of R NOM. This resistance is R COLD. For the Vishay 1k thermistor, this value is 28.2k, which corresponds to approximately C. The hot and cold comparators each have approximately 3 C of hysteresis to prevent oscillation about the trip point. Grounding the NTC pin disables the NTC function. Thermistors The LTC41 NTC trip points were designed to work with thermistors whose resistance temperature characteristics follow Vishay Dale s R-T Curve 2. However, any thermistor whose ratio of R COLD to R HOT is about 7 will also work (Vishay Dale R-T Curve 2 shows a ratio of R COLD to R HOT of 2.815/.486 = 6.89). Power conscious designs may want to use thermistors whose room temperature value is greater than 1k. Vishay Dale has a number of values of thermistor from 1k to 1k that follow the R-T Curve 1. Using these as indicated in the NTC Thermistor section will give temperature trip points of approximately 3 C and 47 C, a delta of 44 C. This delta in temperature can be moved in either direction by changing the value of R NOM with respect to R NTC. Increasing R NOM will move the trip points to higher temperatures. To calculate R NOM for a shift to lower temperature for example, use the following equation: R NOM RCOLD = RNTC at 25 C where R COLD is the resistance ratio of R NTC at the desired cold temperature trip point. If you want to shift the trip points to higher temperatures use the following equation: R NOM RHOT = RNTC at 25 C. 486 where R HOT is the resistance ratio of R NTC at the desired hot temperature trip point. Here is an example using a 1k R-T Curve 1 thermistor from Vishay Dale. The difference between trip points is 44 C, from before, and we want the cold trip point to be C, which would put the hot trip point at 44 C. The R NOM needed is calculated as follows: R NOM RCOLD = RNTC at 25 C = 1k = 116k The nearest 1% value for R NOM is 115k. This is the value used to bias the NTC thermistor to get cold and hot trip points of approximately C and 44 C respectively. To extend the delta between the cold and hot trip points a resistor, R1, can be added in series with R NTC (see Figure 4). The values of the resistors are calculated as follows: R NOM RCOLD RHOT = R1 = ( R R ) R COLD HOT HOT 12
13 APPLICATIO S I FOR ATIO U W U U V INSENSE 9 LTC41 NTC BLOCK RNOM 121k NTC V INSENSE TOO COLD R1 13.3k TOO HOT R NTC 1k.29 V INSENSE.2 V INSENSE NTC ENABLE GNDSENS 4 41 F4 Figure 4. Extending the Delta Temperature where R NOM is the value of the bias resistor, R HOT and R COLD are the values of R NTC at the desired temperature trip points. Continuing the example from before with a desired hot trip point of 5 C: R NOM RCOLD RHOT 1k = = = 12. 8k, 121k is nearest 1%. 486 R1 = 1k ( ) = 13. 3k, 13. 3k is nearest 1% ( ) The final solution is as shown if Figure 4 where R NOM = 121k, R1 = 13.3k and R NTC = 1k at 25 C. Input and Output Capacitors The LTC41 uses a synchronous buck regulator to provide high battery charging current. A 1µF chip ceramic capacitor is recommended for both the input and output capacitors because it provides low ESR and ESL and can handle the high RMS ripple currents. However, some high Q capacitors may produce high transients due to selfresonance under some start-up conditions, such as connecting the charger input to a hot power source. For more information, refer to Application Note 88. EMI considerations usually make it desirable to minimize ripple current in the battery leads, and beads or inductors may be added to increase battery impedance at the 1.5MHz switching frequency. Switching ripple current splits between the battery and the output capacitor depending on the ESR of the output capacitor and the battery impedance. If the ESR of the output capacitor is.1ω and the battery impedance is raised to 2Ω with a bead or inductor, only 5% of the ripple current will flow in the battery. Similar techniques may also be applied to minimize EMI from the input leads. 13
14 APPLICATIO S I FOR ATIO Inductor Selection A high (1.5MHz) operating frequency was chosen for the buck switcher in order to minimize the size of the inductor. However, take care to use inductors with low core losses at this frequency. A good choice is the IHLP-2525AH-1 from Vishay Dale. To calculate the inductor ripple current: V I = L BAT V V L f 2 BAT IN where V BAT is the battery voltage, V IN is the input voltage, L is the inductance and f is the PWM oscillator frequency (typically 1.5MHz). Maximum inductor ripple current occurs at maximum V IN and V BAT = V IN /2. Peak inductor current will be: I PK = I BAT.5 I L where I BAT is the maximum battery charging current. When sizing the inductor make sure that the peak current will not exceed the saturation current of the inductors. Also, I L should never exceed.4(i BAT ) as this may interfere with proper operation of the output short-circuit protection comparator. 1.5µH provides reasonable inductor ripple current in a typical application. With 1.5µH and 2A charge current: 285V 285. V. I = 55. V L = 61A 15. µ H 15. MHz and I PK = 2.31A U W U U 2. P-P Remote Sensing For highest float voltage accuracy, tie GNDSENS and BATSENS directly to the battery terminals. In a similar fashion, tie BAT and PGND directly to the battery terminals. This eliminates IR drops in the GNDSENS and BATSENS lines by preventing charge current from flowing in them. Operation with a Current Limited Wall Adapter Wall adapters with or without current limiting may be used with the LTC41, however, lowest power dissipation battery charging occurs with a current limited wall adapter. To use this feature, the wall adapter must limit at a current smaller than the high rate charge current programmed into the LTC41. For example, if the LTC41 is programmed to charge at 2A, the wall adapter current limit must be less than 2A. To understand operation with a current limited wall adapter, assume battery voltage, V BAT, is initially below V TRIKL, the trickle charge threshold (Figure 5). Battery charging begins at approximately 5mA, well below the wall adapter current limit so the voltage into the LTC41 (V IN ) is the wall adapter s rated output voltage (V ADAPTER ). Battery voltage rises eventually reaching V TRIKL. The linear charger shuts off, the PWM (high rate) charger turns on and a softstart cycle begins. Battery charging current rises during the soft-start cycle causing a corresponding increase in wall adapter load current. When the wall adapter reaches current limit, the wall adapter output voltage collapses and the LTC41 PWM charger duty cycle ramps up to 1% (the topside PMOS switch in the LTC41 buck regulator stays on continuously). As the battery voltage approaches V FLOAT, the float voltage error amplifier commands the PWM charger to deliver less than I LIMIT. The wall adapter exits current limit and the V IN jumps back up to V ADAPTER. 14
15 APPLICATIO S I FOR ATIO U W U U LINEAR CHARGING V ADAPTER WALL ADAPTER IN CURRENT LIMIT PWM CHARGING V IN V BAT V DROP I BAT I LIMIT I TRICKLE V TRIKL V BAT V FLOAT 41 F5 Figure 5. Charging Characteristic Battery charging current continues to drop as the V BAT rises, dropping to zero at V FLOAT. Because the voltage drop in the LTC41 is very low when charge current is highest, power dissipation is also very low. Thermal Calculations (PWM and Trickle Charging) The LTC41 operates as a linear charger when conditioning (trickle) charging a battery and operates as a high rate buck battery charger at all other times. Power dissipation should be determined for both operating modes. For linear charger mode: P D = (V IN V BAT ) I TRIKL V IN I IN where I IN is V IN current consumed by the IC. Worst-case dissipation occurs for V BAT =, maximum V IN, and maximum quiescent and trickle charge current. For example with 5.5V maximum input voltage and 65mA worst case trickle charge current, and 2mA worst-case chip quiescent current: P D = (5.5 ) 65mA 5.5 2mA = 368.5mW LTC41 power dissipation is very low if a current limited wall adapter is used and allowed to enter current limit. When the wall adapter is in current limit, the voltage drop across the LTC41 charger is: V DROP = I LIMIT R PFET where I LIMIT is the wall adapter current limit and R PFET is the on resistance of the topside PMOS switch. The total LTC41 power dissipation during current limited charging is: P D = (V BAT V DROP ) (I IN I P ) V DROP I LIMIT where I IN is the chip quiescent current and I P is total current flowing through the IDET and PROG programming pins. Maximum dissipation in this mode occurs with the highest V BAT that keeps the wall adapter in current limit (which is very close to V FLOAT ), highest quiescent current I IN, highest PMOS on resistance R PFET, highest I LIMIT and highest programming current I P. Assume the LTC41 is programmed for 2A charging and 2mA IDET and that a 1.5A wall adapter is being used: I LIMIT = 15mA, R PFET = 127mΩ, I IN = 2mA, I P = 4mA and V BAT V FLOAT = 4.242V then: V DROP = 15mA 127mΩ = 19.5mV and: P D = (4.242V.195V) (2mA 4mA).195V 15mA = 312mW Power dissipation in buck battery charger mode may be estimated from the dissipation curves given in the Typical Performance Characteristics section of the data sheet. This will slightly overestimate chip power dissipation because it assumes all loss, including loss from external components, occurs within the chip. 15
16 APPLICATIO S I FOR ATIO U W U U Insert the highest power dissipation figure into the following equation to determine maximum junction temperature: T J = T A (P D 37 C/W) The LTC41 includes chip overtemperature protection. If junction temperature exceeds 16 C (typical), the chip will stop battery charging until chip temperature drops below 15 C. Using the LTC41 in Applications Without a Battery The LTC41 is normally used in end products that only operate with the battery attached (Figure 6). Under these conditions the battery is available to supply load transient currents. For indefinite operation with a powered wall adapter there are only two requirements that the average current drawn by the load is less than the high rate charge current, and that V BAT stays above the trickle charge threshold when the load is initially turned on and during other load transients. When making this determination take into account battery impedance. If battery voltage is less than the trickle charge threshold, the system load may be turned off until V BAT is high enough to meet these conditions. The situation changes dramatically with the battery removed (Figure 7). Since the battery is absent, V BAT begins at zero when a powered wall adapter is first connected to the battery charger. With a maximum load less than the LTC41 trickle charge current, battery voltage will ramp up until V BAT crosses the trickle charge threshold. When this occurs, the LTC41 switches over from trickle charge to high rate (PWM) charge mode but initially delivers zero current (because the soft-start pin is at zero). Battery voltage drops as a result of the system load, crossing below the trickle charge threshold. The charger re-enters trickle charge mode and the battery voltage ramps up again until the battery charger re-enters high rate mode. The soft-start voltage is slightly higher this time around (than in the previous PWM cycle). Every successive time that the charger enters high rate (PWM) charge mode, the soft-start pin is at a slightly higher voltage. Eventually high rate charge mode begins with a soft-start voltage that causes the PWM charger to provide more current than the system load demands, and V BAT rapidly rises until the float voltage is reached. For battery-less operation, system load current should be restricted to less than the worst case trickle charge current (preferably less than 3mA) when V BAT is less than 3.15V (through an undervoltage lockout or other means). Above V BAT = 3.15V, system load current less than or equal to the high rate charge current is allowed. If operation without a battery is required, additional low-esr output filtering improves start-up and other load transients. Battery-less start-up is also improved if a 1k resistor is placed in series with the soft-start capacitor. WALL ADAPTER LTC41 BATTERY CHARGER SYSTEM LOAD 41 F6 Li-Ion BATTERY Figure 6. Typical Application 16
17 APPLICATIO S I FOR ATIO U W U U 4 V BAT (V) TIME (ms) 5 V SS (mv) TIME (ms) PWM CHARGE TRICKLE CHARGE TIME (ms) 41 F7 Figure 7. Battery-Less Start-Up 17
18 APPLICATIO S I FOR ATIO U W U U Layout Considerations Switch rise and fall times are kept under 5ns for maximum efficiency. To minimize radiation, the SW pin and input bypass capacitor leads (between PV IN and PGND) should be kept as short as possible. A ground plane should be used under the switching circuitry to prevent interplane coupling. The Exposed Pad must be connected to the ground plane for proper power dissipation. The other paths contain only DC and/or 1.5MHz tri-wave ripple current and are less critical. With the exception of the input and output filter capacitors (which should be connected to PGND) all other components that return to ground should be connected to GNDSENS. Recommended Components Manufacturers For a list of recommend component manufacturers, contact the Linear Technology application department. L1 1.5µH V IN 4.5V TO 5.5V R1 1k C1 R2 1µF 1k D1 LED V INSENSE PV IN PGND CHRG SW LTC41 SENSE BATSENS BAT C4 1µF 2AHr 4.2V Li-Ion NTC TO µp FAULT R3 1k AT 25 C FROM µp R4 549Ω EN PROG IDET C2.22µF R5 549Ω TIMER SS GNDSENS C3.1µF L1: VISHAY DALE IHLP-2525AH-1 R3: NTC VISHAY DALE NTHS63N2N12J 41 F8 Figure 8. 2A Li-Ion Battery Charger with 3Hr Timer, Temperature Qualification, Soft-Start, Remote Sensing and C/1 Indication 18
19 PACKAGE DESCRIPTIO U UF Package 16-Lead Plastic QFN (4mm 4mm) (Reference LTC DWG # ).72 ± ± ± ±.5 (4 SIDES) PACKAGE OUTLINE.3 ±.5.65 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW EXPOSED PAD 4. ±.1.75 ±.5 R =.115 (4 SIDES) TYP PIN 1 TOP MARK (NOTE 6) 2.15 ±.1 (4-SIDES) PIN 1 NOTCH R =.2 TYP OR CHAMFER.55 ± REF..5 NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-22 VARIATION (WGGC) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE (UF16) QFN ±.5.65 BSC Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19
20 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT A Constant Current/Constant Voltage Battery Charger High Efficiency, Minimum External Components to Fast Charge Lithium, NIMH and NiCd Batteries, 24-Lead SO Package LT1513 SEPIC Constant or Programmable Current/Constant Charger Input Voltage May Be Higher, Equal to or Lower Than Battery Voltage Battery Charger Voltage, 5kHz Switching Frequency, DD Pak and TO-22 Packages LT A Switching Charger 1- or 2-Cell Li-Ion, 5kHz or 2kHz Switching Frequency, Termination Flag, 16- and 28-Lead SSOP Packages LTC1729 Li-Ion Battery Charger Termination Controller Trickle Charge Preconditioning, Temperature Charge Qualification, Time or Charge Current Termination, Automatic Charger and Battery Detection, and Status Output, MS8 and SO-8 Packages LT1769 2A Switching Charger Constant Current/Constant Voltage Switching Regulator, Input Current Limiting Maximizes Charge Current, 2-Lead TSSOP and 28-Lead SSOP Packages LTC42 Standalone Li-Ion Switch Mode Battery Charger Complete Charger for 1- or 2-Cell Li-Ion Batteries, Onboard Timer Termination, Up to 4A Charge Current, 1-Lead DFN and SO-8 Packages LTC46 Small, High Efficiency, Fixed Voltage Li-Ion Battery Complete Charger for 2-, 3- or 4-Cell Li-Ion Batteries, AC Adapter Charger with Termination Current Limit and Thermistor Sensor, 16-Lead Narrow SSOP Package LTC47 High Efficiency, Programmable Voltage Battery Complete Charger for 3- or 4-Cell Li-Ion Batteries, AC Adapter Current Charger with Termination Limit, Thermistor Sensor and Indicator Outputs, 24-Lead SSOP Package LTC48 4A, High Efficiency, Multi-Chemistry Battery Charger Complete Charger for 2- to 6-Cell Li-Ion Batteries or 4- to 18-Cell Nickel Batteries, Up to 96% Efficiency, 2-Lead SSOP Package 2 Linear Technology Corporation 163 McCarthy Blvd., Milpitas, CA LT 46 PRINTED IN THE USA (48) FAX: (48) LINEAR TECHNOLOGY CORPORATION 26
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Theory of Operation. Figure 1 illustrates a fan motor circuit used in an automobile application. The TPIC2101. 27.4 kω AREF.
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