Memories Are Made of This

Transcription

1 Memories Are Made of This Betriebssysteme 2012/ Oktober /94

2 History long tradition in operating systems Historically very important memory was very expensive ecient use of available memory huge cost factor memory prices are now comparatively negligible 2/94

3 But! modern software's memory requirements seem to increase faster than prices can decrease often require more main memory than historical machines had in permanent storage... derivative of Parkinsons Law (work expands so as to ll the time available for its completion): data expands to ll the space available for storage 3/94

4 Our dream Innite Memory innitely in size innitely fast persistent... and cheap as well... But - what is Memory? 4/94

5 Memory Memory: Something that doesn't forget. Sort of. Memory-Hierarchy slow, cheap, persistent mass-memory, terrabytes faster, non-persistent main memory, gigabyte extremely fast, non persistent, expensive cache, megabyte in this chapter: storage area a CPU can directly access using address/databus 5/94

6 Memory we will look at modern memory management at large, starting from hardware constraints to implications from virtualizing machines. lets rst dene the basic memory management functions an operating system has: memory allocation protection. 6/94

7 Memory Allocation only one program on a machine, memory management is boring more than one program on a single machine: these programs need to share the memory available programs generally are not - and should not need to be - aware of the environment they run in they can't really self organize this So: this is an important task of the operating system. 7/94

8 Monoprogramming Mainframes embedded systems MS-DOS, CP/M 8/94

9 Monoprogramming Single Program: world is simple historical operating system: CP/M (Control Program/Monitor or Control Program for Microcomputers). one program can run at a time. Memory was structured in a simple way. 9/94

10 CP/M FFFF BIOS / BDOS Command Line Interpreter DC00 Transient Program Area Low storage Abbildung: CP/M Memory Organisation 10/94

11 CP/M rst 256 bytes were reserved for the operating system, large chunk of memory on the upper end of the address range, containing the Basic Input-Output-System (BIOS), contains all hardware specic functionality the hardware independend parts of the operating system, called Basic Disk Operating System (BDOS) the command line interpreter (CLI).. Programs were loaded into the TPA - the Transient Program Area. All programs were compiled and linked to start at address 0x /94

12 Relocation consider running two programs simultaneously in such an environment it is not possible to do so, if both are assuming and even required to start at the same address better, more exible structure needed: First of all, the start address must be exible. ability to load a program into virtually any location in memory the OS considers best 12/94

13 Relocation Abbildung: Relocating Programs 13/94

14 Relocation program may be loaded to start at 0x100 or at 0x6D00 we don't know in advance, which address > linker can't link it to begin at a certain address best: link it to start at address 0x0 relocate the program at load time loader will need to change all address references by the required values. Lets look at a piece of code, conveniently written in assembly language. 14/94

15 Example checkit : ; test value mov [ Mem ], eax test %eax, eax jne NonZero ; ; do whatever has to be done, if Zero jmp done NonZero : ; do whatever has to be done, if not Zero done : leave ret Mem : DW 0 15/94

16 Example assume that the addresses used are absolute addresses three address references: the load of the memory location Mem two jumps to NonZero and done 16/94

17 Example 17/94

18 without hardware support loader replaces all address-references has to know all the locations with an address he can get this from the linker linker assumed the program runs at address 0 loader adds actual starting address of the program to each of the addresses simple - but not very ecient what if we want to move programs around after they have been started? 18/94

19 With help from hardware register, that contains the current starting address of the program content of this register is added to all addresses sent from the CPU to the memory easy to set up not very time consuming, if done in hardware. Segmentation and paging oer further options. We will look at these options later. 19/94

20 With help from hardware (2) Base-Register Address Adder Address 20/94

21 Logical and Physical Address separation of the address that is used within a process (linear or logical address) from the address that is sent to the memory (physical addresses). Both: unsigned integers > Zero and < highest address supported by the architecture (or 0xFFFFFFFF) for 32-Bit (or 0xFFFFFFFFFFFFFFFF) for 64 bit 21/94

22 Memory protection only one program on a machine - do we need protection? YES operating system also runs on that machine OS will need memory as well must be protected itself from malicious behaviour or faults from such a program Protection: user program cannot access memory locations that are reserved for the kernel Implementation: nothing goes without help from the hardware. 22/94

23 Basis-Limit-Register base-register not only oers relocation protects the system from any references below the start address unsigned values adding always results in a value equal to or larger than the base address accessible area Base-Register protected area 23/94

24 Basis-Limit-Register (2) no limit to the programm accessing any addresses above the value of the base register assume: another program located above that address could be accessed or overwritten need to limit the access possiblities in hardware invent another register, the limit register content informs the hardware, what chunk of memory above the starting address (== value of the base register) should be accessible this limits the area the program can access 24/94

25 Basis-Limit-Register (3) protected area Limit-Register Base-Register accessible area protected area 25/94

26 Basis-Limit-Register (4) How can our hardware implement this? 26/94

27 Basis-Limit-Register (4) How can our hardware implement this? we have an adder anyway adds the content of the base register to the logical address results in the physical address add a comparator: compares physical address to limit register if value exceeded, interrupt 26/94

28 Basis-Limit-Register (5) 27/94

29 Memory Management Issues so far: very simple means to allow multiple processes to coexist in memory some drawbacks assumed that all processes get the memory they need these needs will be heterogeneous. lets look at the statics and dynamics 28/94

30 Multiprogramming / Partitions Split physical memory into n partitions Queues same size or dierent size e.g. congured at start time one or multiple 29/94

31 Multiprogramming, xed partitions 30/94

32 Multiprogramming, xed partitions (2) unused space is lost using large partitions for small job: inecient not using large partitions for long time: inecient 31/94

33 Multiprogramming, xed partitions (3) 32/94

34 Multiprogramming, xed partitions (4) Use single queue select partition that ts optional: search queue for best tting job (beware starvation!) example system: IBM OS-360 MFT 33/94

35 Sidestep: modeling Multiprogramming improves CPU utilisation but by how much? 5 processes using 20% each > 100% utilization? Of course not. probabilistic view ist better: assume a process waits for I/O with probability p probability, that all processes wait: p n CPU-utilization: 1 p n 34/94

36 Sidestep: modeling 35/94

37 Sidestep: modeling Still simplied processes are rarely independend apply queuing-theory 36/94

38 Dynamics P3 P3 P4 P2 P2 P4 P3 P1 P1 P1 P P1 6 37/94

39 Dynamics ve states of the memory used for processes states 1, 2 and 3: three processes (P1, P2, P3) are created state 4: P2 is stopped and removed state 5: a process P4 appears, larger than the largest contiguous piece of memory available overall there would be enough memory available we can't start P4 without reorganizing our RAM 38/94

40 Compaction we need to do compaction remove all the holes free memory between allocated memory areas by moving the allocated areas to form a contiguous area of memory technically easy our relocation mechanisms cater for moving processes around very time consuming uses lots of CPU-cycles to do so State 6: result, with process 4 already loaded 39/94

41 Fragmentation processes get their memory in arbitrary and dierently sized chunks leave holes that can get smaller and smaller become unusable for loading processes > Compaction necessary this eect is called fragmentation Unusable memory outside of used regions is called external fragmentation 40/94

42 Fragmentation use chunks of a xed size compaction no longer needed inecient, if chunks too large: statistically wastes half of the size of the chunks available memory unuseable inside these xed chunks: internal fragmentation 41/94

43 Internal Fragmentation can turn out to be a lot, if chunks are large have no reality relation to the programs they are assigned to chunks should be sized as small as possible could limit the size of programs that can be run solution: multiple chunks of dierent size large programs would be run in the large chunks small programs could possibly run anywhere 42/94

44 Paging smaller chunks are better is the requirement that a program must t into one of this chunks necessary? No! Assigning a program multiple small chunks, enough to t in! One of these chunks: page the gure on next slide shows a program which has been allocated 12 pages, the last one is lled only partially 43/94

45 Paging page 0 page 1 page 2 page 3 page 4... Abbildung: Basic Paging 44/94

46 Paging external fragmentation still remains holes at least one page long always a multiple of the size of the page total size might be too small to make them useful for other program to be run in. contiguous hole needed 45/94

47 Paging all pages must be located contiguously no mechanism yet to allow us placing the pages wherever free space exists let's upgrade the hardware a little to allow us to do so 46/94

48 Paging What does the hardware need to be able to? a logical address refers to some byte in physical memory (and this will stay so of course). Logical addresses that are located besides each other are also located in adjacent locations in physical RAM This will need to change! So far: address translation was done by a simple addition. Now it gets a little more complicated. 47/94

49 Paging First: reinterprete the logical address So far: unstructured unsigned integer we now are using pages and page frames refer to a location in logical memory by the number of the page it is located on (page number) and the number of the byte (oset) we want to refer to page nr. offset 48/94

50 Page Size How large should we make a page? Theoretically: any size we want does it matter? lets experiment with a page size of 3 bytes 49/94

51 Page Size Byte Nr. page byte logical address /94

52 Page Size Byte Nr. page byte logical address where is 00011? where is 00111? /94

53 Page Size 3 drawback of the choice of pagesize: address arithmetic is a mess we need te be easily able calculate an address from a given address just by addition add 1 to the logical address of byte 2, we would get would be an invalid address rst requirement for a page size is: must be a power of 2 512, 1024, 2048 or 4096 are all good candidates other arguments: fragmentation and administrative overhead. No choice with e.g. Intel IA32-series: 4096 bytes are the norm 52/94

54 Page Size 4 Byte Nr. page byte logical address /94

55 Upgrading the hardware divide physical RAM into chunks of the same size as the pages page frames operating system can place any page from any program on any page frame in physical memory needs to record where it was placed record needs to be evaluated by the hardware at runtime 54/94

56 Mapping pages to page frames page 0 page 1 page 2 page 3 page 4... frame 0 frame 1 frame 2 frame 3 frame 4 frame 5 55/94

57 Page table need to make this information available to the hardware is done using a page table contains rows with page to page frame mappings one row per page page nr. frame nr page 0 page 1 page 2 page 3 page 4... frame 0 frame 1 frame 2 frame 3 frame 4 frame 5 56/94

58 page table calculating physical address (frame number and oset) from logical address (page number and oset) is easy now 57/94

59 address calculation 1 logical address split into components 1 the page number and the 2 oset 2 use page number to look up the frame number in the page table 1 page number as index into the page table 3 copy oset and combine with frame number 4 result is physical address 58/94

60 address calculation logical address 1 page number offset 2 page table 3 frame number offset 4 physical address 59/94

61 numeric example /94

62 Loading Programs lets talk about how to set up a page table program start: operating system has a few things to do e.g setting up the memory management for that process 61/94

63 Create page table Every process needs a page table allocate RAM for the page table assume 32 bit addresses and 4096 byte pages 12 bits for oset, 20 bits for page number each entry in page table (PTE): 4 byte size of page table: 2 22 bytes page nr. offset 62/94

64 Parse the headers parse the binary of the program nd out about the memory requirements binary will contain that information dierent format used.com - assumed that a program always starts at byte 256 (also used in CP/M,) a.out COFF main format used is the Executable and Linking Format (ELF) can be used for all types of binaries object les (compiled code) dynamic libraries static libraries 63/94

65 useless.c 64/94

66 memory layout of useless.c 65/94

67 memory layout of useless.c ve headers two need to be loaded from the the le (LOAD) code static data. GS (GNU_STACK): hint to the loading module to allocate a stack for the program NOTE: informative info about the type of system that this program can run on NULL: unused 66/94

68 info for the operating system Each of the entries also tells us where to nd the values on the le (Oset) how long they are on the le (FileSize) where to place them in the logical address space of the program (VirtAddr) and the space to be reserved there (MemSiz) Task of OS: For each program header in the ELF-le that requires memory, allocate the corresponding memory area. 67/94

69 loading size on le can be dierent from the size in memory second entry has 8 bytes on the le 64 bytes in memory corresponds to the two integers i and j that have been initialized to 3 resp. 4 memory area that has to be lled with zeroes The Flags-section marks areas readable (R), writable (W) and executable (E). stack has neither size nor address task of the operating system to locate a suitable address area for the stack dene the initial size of it's area 68/94

70 Load the program sections into memory we are now able to load the program into memory decisions to be made: Dene a location for the stack. Make sure that all memory allocated is inititialized properly either with values from the image or with Zeroes Otherwise potential security problem 69/94

71 Memory Layout at runtime 70/94

72 Memory Layout content of the section address range it uses protection information information on the le it has been or can be loaded from. 71/94

73 Memory Layout The code in line 1 loaded into area 1 recognisable also by the protection information given (r-xp): section is readonly, executable and private (i.e. not shared) The data part represented by lines 2 and 3 line 2 representing the initialized data line 3 the heap for dynamic memory allocation vsdo and vsyscall are pages that are mapped into all address spaces of all processes and are responsible for syscall-implementations nally the stack section Linux doesn't map the last page in the address space, to allow for catching any errors in addressing and does not use the rst page to catch all NULL-pointer-uses 72/94

74 address space layout randomization assignments not necessarily the same each time a program is run key data areas like base of the executable position of are randomized Why? libraries heap stack 73/94

75 address space layout randomization assignments not necessarily the same each time a program is run key data areas like base of the executable position of libraries heap stack are randomized Why? to make it more dicult for attackers to predict addresses 73/94

76 linear memory layout OS has to layout the linear or logical memory area for a process only addresses can be accessed that are mapped into the process address space via the page table mechanism, decision has to be made: do we want to make kernel memory accessible? 74/94

77 linear memory layout 4GB user space 4GB 3GB kernel user space 4GB 3GB 2GB 1:1 mapping kernel user space 4GB 2GB kernel user space 0GB Other 0GB Linux 0GB SWEB 0GB Windows XP 75/94

78 linear memory layout 32-bit addresses: memory locations between 0 and 4GBytes options: make the maximum range of 4GB available to the program no pages outside the user process are accessible switch into kernel mode (interrupts or system calls): need to recongure the MM reserve a chunk of the linear address space for the kernel memory management doesn't have to be recongured no easy access to usermode addresses need to do page table calculations in software or dynamically recongure MM 76/94

79 linear memory layout of a process xgb kernel Stack Mapping 0GB Heap BSS Data Text 77/94

80 linear memory layout multithreaded xgb kernel Stack Stack Stack 0GB Heap BSS Data Text 78/94

81 64 bit AMD: most widely used 64-bit architecture only 48 bits of the available 64 bits are supported. Further modes may become available in the future. two regions available: a higher half, growing downwards from 0xFFFFFFFFFFFFFFFF, typically used for the kernel lower half, growing upwards from 0x Addresses must be in canonical form must have the same value as bit 47 restricts programmers from misusing 79/94

82 64 bit 80/94

83 Virtual Memory basic paging: put pieces into any free location in memory What if we only load those parts of a program that are really used? Is this a good idea? You bet. typical oce software which of the millions of lines of code will you eectively be using? safe assuming that a large part of that code will not be of use to us, and thus not being used. no idea which will be the code pieces we want mechanism that takes care of that automatically 81/94

84 Virtual Memory Originally aiming at running software that uses more memory than available still true run huge software on a small machine lesser importance practically everybody can aord 4GByte RAM virtual memory allows us to keep dozens of processes concurrently active or run datacenters using virtual appliances 82/94

85 Virtual Memory Adding virtual memory doesn't require much one bit is sucient one bit of the PTE indicates, if the translation entry is valid if used by the MMU produces correct physical addresses for the given linear address valid bit or present bit MMU checks the valid bit in a PTE If 1, then the address translation is executed. If not, a page fault is thrown. 83/94

86 Virtual Memory Who sets the valid bit? The operating system does. loading data into RAM it maps the physical location, where the data actually is stored to the virtual address properly it sets the valid bit for all pages it maps, and only for those almost all that is needed to implement virtual memory. Almost... 84/94

87 Page Table Issues a typical 32-bit example assume (realistically) a page size of 4096 bytes 12 bits for the oset eld 20 bits for the page number could use less than the 20 bits would not utilise the full 4GB virtual address space. 85/94

88 Page Table Issues 20 bits for the page number 2 20 pages or (a binary million) page table has 2 20 entries they will need to be able to store the page frame number, likely of similar size PTE 4 bytes long full pagetable: 4MiB ~ 250 processes: 1 GB for pagetables 86/94

89 Page Table Issues hardware: takes the page number adds it to the start address of the page table fetch the PTE from memory page table will only be partially lled: still all entries are needed full page table needs to reside in memory 32-bit: 4 Mbytes 48-bit version of the AMD64-architecture; 2 36 pages - out of memory! 87/94

90 Page table issues get the pagetable out of memory good idea, most linear addresses (and thus their pages) are not needed two dierent ways multilevel pagetables inverted pagetables 88/94

91 Inverted pagetables size of the pagetable depends on the size of the linear address space size of the used part of the pagetable depends on the size of physical memory available table with one entry per page frame available in physical memory contains process id page number in the linear address space of the process size of the pagetable is xed irrespective of the number of processes inverted pagetable table lookup should be fast 89/94

92 PowerPC PowerPC-architecture uses 64bit linear addresses two page sizes 4kB larger, implementation dependent size between 2 13 and 2 28 hashed page table consisting dynamic number of Page Table Entry Groups (PTEG) PTEG contains eight PTEs of 16 bytes PTEGs are the starting point of PTE-searches 90/94

93 PowerPC (2) Two hashes are computed: primary hash secondary hash primary hash: XOR of a selection of bits of the Virtual Page Number together with some masking operations secondary hash: ones complement of the primary hash results in starting addresses for two PTEG PTEGs are checked if they translate the given virtual address If not, a page fault occurs doesn't necessarily mean that a PTE doesn't exist it just couldn't be found in the page table task of the operating system to react. 91/94

94 PowerPC 64 bit effective address ESID PageNr Offset SLBE 0 ESID V VSID Flags SLBE n VSID PageNr Offset HTABORG HTABMASK XOR AND PTEG 0 PTE0 PTE7 PTE0 PTE7 PTE0 PTE7 HTABORG PTEG n PTE0 PTE7 92/94

95 MIPS MIPS architecture: RISC architecture memory management is also as lightweight as possible MIPS doesn't support any page table structure 93/94

96 MIPS uses a TLB to cache 64 or more PTEs pagenumber cannot be found in the PTE TLB-miss-interrupt operating system can load the required PTE into the TLB up to the operating system to choose an ecient datastructure for the software page table 94/94