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2 ; Rev 3; 9/01 Monolithic CMOS Analog Multiplexers General Description Maxim s and are monolithic CMOS analog multiplexers (muxes): the is a single 8-channel (1-of-8) mux, and the is a differential 4-channel (2-of-8) mux. Both devices guarantee break-before-make switching. Maxim guarantees these muxes will not latch up if the power supplies are turned off with the input signals still present. Maxim also guarantees continuous operation when these devices are powered by supplies ranging from ±4.5V to ±18V. The / are plug-in upgrades for the industry-standard DG08A/, respectively. Maxim s parts have lower on-resistance, faster enable switching times, and significantly lower leakage currents. The / also consume significantly lower power, making them ideal for portable equipment. Control Systems Data Logging Systems Aircraft Heads-Up Displays Data-Acquisition Systems Signal Routing Applications Typical Operating Circuits -15V -15V Improved Second Source Operate from ±4.5V to ±18V Supplies Symmetrical, Bidirectional Operation Logic and Enable Inputs, TTL and CMOS Compatible Latchup-Proof Construction Monolithic, Low-Power CMOS Design TOP VIEW A A1 Features Ordering Information PART TEMP RANGE PIN-PACKAGE CJ 0 C to +70 C 16 Plastic DIP CWE 0 C to +70 C 16 Wide SO C/D 0 C to +70 C Dice* BK -20 C to +85 C 16 CERDIP DJ 16 Plastic DIP DY 16 Narrow SO EGE 16 QFN EWE 16 Wide SO AK -55 C to +125 C 16 CERDIP Ordering Information continued at end of data sheet. *Contact factory for dice specifications. Pin Configurations / CLOCK IN B IN ANALOG INPUT (OUTPUTS) +15V Q B Q C V- S1 S2 S3 S4 S5 D S6 S7 S8 A0 A1 A2 EN ANALOG OUTPUT (INPUTS) EN V- S1 S2 S3 S4 D A A2 S5 S6 S7 S8 A1 N.C. A IN r01 +15V Q D Q r02 A N.C. EN V- S1A S2A S1B S2B S3A 6 11 S3B S4A 7 10 S4B ENABLE IN (MUX ON/OFF CONTROL) DA 8 9 DB 8-CHANNEL SEQUENTIAL MUX/DEMUX Typical Operating Circuits continued at end of data sheet. DIP/SO Pin Configurations continued at end of data sheet. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

3 / ABSOLUTE MAXIMUM RATINGS Voltage Referenced to V V V Digital Inputs, V S and V D (Note 1)...-2V to ( + 2V) or 20mA, whichever occurs first Current (any terminal, except S or D)...30mA Continuous Current, S or D...20mA Peak Current, S or D (pulsed at 1ms, 10% duty cycle max)..40ma Continuous Power Dissipation (T A = +70 C) Plastic DIP (derate 10.53mW/ C above +70 C)...842mW QFN (derate 19.2mW/ C above +70 C) mW Narrow SO (derate 8.70mWI C above +70 C)...696mW Wide SO (derate 9.52mW/ C above +70 C)...762mW CERDIP (derate 10.00mW/ C above +70 C)...800mW Operating Temperature Ranges: DG50_ACJ/CWE/CGE...0 C to +70 C DG50_ABK C to +85 C DGS0_ADJ/DY/EWE/EGE... DG50_AAK C to +125 C Storage Temperature Range C to +150 C Lead Temperature (soldering, 10s) C Note 1: Signals on S_, D_, or IN_ exceeding or V- are clamped by internal diodes. Limit forward-diode current to maximum current ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS ( = 15V, V- = -15V, = OV, T A = +25 C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS A A D/E/B/C D/E/B/C MIN TYP MAX MIN TYP MAX Anal og S i g nal Rang e V ANALOG V UNITS Drain-Source On- Resistance R DS(ON) Sequence each switch on, V AL = 0.8V, V AH = 2.4V (Note 4) V D = 10V, I S = -200µA V D = 10V, I S = -200µA Ω Greatest Change in Drain-Source On- Resistance Between Channels R R DS( ON) max RDS( ON) min DS(ON) =, R R DS(ON) DS( ON) 6 6 % -10V V S 10V Source Off- Leakage Current D r ai n O ff- Leakag e C ur r ent D r ai n O n- Leakag e C ur r ent I S(OFF) I D(OFF) I D(ON) V EN = 0V V EN = 0V V S = 10V, V D = -10V V S = -10V, V D = 10V V D = 10V, V S = -10V V D = 10V, V S = -10V V D = 10V, V S = -10V V D = -10V, V S = 10V Sequence each V S(all) = V D = 10V switch on, V S(all) = V D = -10V V AL = 0.8V V V S(all) = V D = 10V AH = 2.4V (Note 2) V S(all) = V D = -10V na na na 2

4 ELECTRICAL CHARACTERISTICS (continued) ( = 15V, V- = -15V, = OV, T A = +25 C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS LOGIC INPUT Logic Input Current, Input Voltage High Logic Input Current, Input Voltage Low DYNAMIC A A D/E/B/C D/E/B/C MIN TYP MAX MIN TYP MAX V A = 24V I AH V A = 15V All V V EN = 2.4V I A = AL 0V V EN = 0V M ul ti p l exer S w i tchi ng Ti m e t transition Figure µs Break-Before-Make Interval t OPEN Figure µs Enable Turn-On Time t ON(EN) Figure µs Enable Turn-Off Time t OFF(EN) Figure µs Off-Isolation OIRR V EN = 0V, R L = 1kΩ, C L = l5pf, V S = 7V RMS f = 500kHz (Note 3) UNITS µa µa db Source Off-Capacitance C S(OFF) V S = 0V, V EN = 0V, f = 140kHz 5 5 pf Drain Off- Capacitance SUPPLY I C D(OFF) V S = 0V, V EN = 0V, f = 140kHz DGS09A Positive Supply Current I+ V EN = 2.4V, all V A = 0V or 2.4V ma Negative Supply Current I- V EN = 2.4V, all V A = 0V or 2.4V ma Positive Supply Current in Standby Negative Supply Current in Standby Power-Supply Range for Continuous Operation I+ V EN = 0V, all V A = 0V or 2.4V ma I- V EN = 0V, all V A = 0V or 2.4V ma V-, (Notes 4, 5) ±4.5 ±18.0 ±4.5 ±18.0 V pf / 3

5 / ELECTRICAL CHARACTERISTICS ( = 15V, = 0V, T A = T MIN to T MAX, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS A A D/E/B/C D/E/B/C MIN TYP MAX MIN TYP MAX Analog Signal Range V ANALOG V Drain-Source On- Resistance Source Off-Leakage Current Drain Off- Leakage Current Drain On- Leakage Current LOGIC INPUT Logic Input Current, Input Voltage High Logic Input Current, Input Voltage Low R DS(ON) I S(OFF) I D(OFF) I D(ON) S eq uence each sw i tch on, V AL = 0.8V, V AH = 2.4V V EN = 0V V EN = 0V S eq uence each sw i tch on, V AL = 0.8V, V AH = 2.4V (Note 2) V D = 10V, I S = -200µA V D = 10V, I S = -200µA V S = 10V, V D = -10V V S = -10V, V D = -10V V D = 10V, V S = -10V V D = -10V, V S = -10V V D = 10V, V S = -10V V D = -10V, V S = -10V V S(all) = V D = 10V V S(all) = V D = -10V V S(all) = V D = 10V V S(all) = V D = -10V V A = 2.4V I AH V A = 15V I AL All V A = 0V V EN = 2.4V V EN = 0V UNITS Ω na na na µa µa Note 2: I D(ON) is leakage from driver into on switch. IVSI Note 3: Off-isolation = 20log IVDI V S = input to off switch, V D = output due to V S. Note 4: Electrical characteristics (such as on-resistance) change when power supplies other than ±15V are used. Note 5: For designs requiring single 5V or dual ±5V operation, refer to Maxim s improved MAX338 and MAX339. Minimum operating voltage for DY and DY is ±9V. 4

6 PIN NAME FUNCTION DIP/SO QFN DIP/SO QFN 1, 15, 16 15, 14, 13 A0, A2, A1 Address Input 1, 16 15, 14 A0, A1 Address Input EN Enable V- Negative-Supply Voltage Input S1 S4 Analog Inputs, Bidirectional S1A S4A Analog Inputs, Bidirectional 8 6 D Analog Outputs, Bidirectional 8, 9 6, 7 DA, DB Analog Outputs, Bidirectional S8 S5 Analog Inputs, Bidirectional S4B S1B Analog Inputs, Bidirectional Positive-Supply Voltage Input Ground Pin Description / Functional Diagrams V- V- S1 S1A S2 S3 S2A S3A DA S4 S5 D S4A S1B S6 S7 S2B S3B DB S8 S4B CMOS DECODE LOGIC CMOS DECODE LOGIC A2 A1 A0 EN 8-CHANNEL SINGLE ENDED MULTIPLEXER A1 A0 EN DIFFERENTIAL 4-CHANNEL MULTIPLEXER 5

7 / LOGIC INPUT +2.4V +15V EN S1 ±10V S2 S7 A0 A1 S8 A2 D V- 50Ω 1MΩ -15V OUTPUT V D 35pF LOGIC INPUT +2.4V +15V 50Ω EN S1 ±10V A0 A1 S1A S4A, DA, S2B, S3B V- -15V S4B DB 1MΩ OUTPUT V DS 35pF Figure 1a. Switching-Time Test Circuit Figure 1b. Switching-Time Test Circuit +15V +15V EN S1-5V EN S1B -5V A0 S2 S7 S1A S4A, DA, S2B, S3B LOGIC INPUT 50Ω A1 A2 V- -15V D 1kΩ OUTPUT V D 35pF LOGIC INPUT 50Ω A0 A1 V- -15V DB 1kΩ OUTPUT V DS 35pF Figure 2a. Enable-Time Test Circuit Figure 2b. Enable-Time Test Circuit 6

8 LOGIC INPUT +2.4V +15V 50Ω EN A0, A1, (A2) ALL S AND DA DB, D V- -15V Figure 3. Break-Before-Make Test Circuit +5V 1kΩ OUTPUT V D 35pF LOGIC INPUT t r < 20ns t f < 20ns OUTPUT V D (SEE FIG. 1) TRANSITION TIME OUTPUT V D (SEE FIG. 2) TENABLE t (ON) t (OFF) TIME OUTPUT V D (SEE FIG. 3) OPEN TIME (B.B.M INTERVAL) 3V 50% 0 V S1 0.8V S V S8 V S8 t transition S 1 ON 0 0.1V 0 0.9V 0 V 0 V S V S 50% 0V t ON (EN) t open S 8 ON t transition t OFF (EN) / Figure 4. Timing Diagram for Figures 1, 2, and 3 Table 1a. Truth Table A2 A1 A0 EN ON X X X 0 NONE X = Don t care. Table 1 b. Truth Table A1 A0 EN ON X X 0 NONE X = Don t care. 7

9 / CLOCK IN DIFFERENTIAL ANALOG INPUTS (OUTPUTS) +15V J Q 1/2MM747C73 CLOCK Typical Operating Circuits (continued) -15V -15V V- S1A S2A S3A DA S4A S1B S2B DB S3B S4B A0 A1 EN J Q 1/2MM747C73 DIFFERENTIAL ANALOG OUTPUTS (INPUTS) Ordering Information (continued) PART TEMP RANGE PIN-PACKAGE CJ 0 C to +70 C 16 Plastic DIP CWE 0 C to +70 C 16 Wide SO C/D 0 C to +70 C Dice* BK -20 C to +85 C 16 CERDIP DJ 16 Plastic DIP DY 16 Narrow SO EGE 16 QFN EWE 16 Wide SO AK -55 C to +125 C 16 CERDIP *Contact factory for dice specifications. K CLEAR Q N.C. K Q RESET ENABLE DIFFERENTIAL 4-CHANNEL SEQUENTIAL MUX/DEMUX Pin Configurations (continued) TOP VIEW EN A0 A1 A2 V S S2 3 DG S5 S3 4 9 S EN A0 A1 V S1A 2 11 S1B S2A 3 DG S2B S3A 4 9 S3B 5 6 S4 D S8 S7 S4A DA DB S4B 7 8 QFN QFN 8

10 Chip Topographies / 9

11 / Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to 32L QFN.EPS PACKAGE OUTLINE, 16,20,28,32L QFN, 5x5x0.90 MM I

12 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to / PACKAGE OUTLINE, 16,20,28,32L QFN, 5x5x0.90 MM I 2 2 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

13 ENGLISH 简 体 中 文 日 本 語 한국어 WHAT'S NEW PRODUCTS SOLUTIONS DESIGN APPNOTES SUPPORT BUY COMPANY MEMBERS Part Number Table Notes: 1. See the QuickView Data Sheet for further information on this product family or download the full data sheet (PDF, 1.1MB). 2. Other options and links for purchasing parts are listed at: 3. Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day. 4. Part number suffixes: T or T&R = tape and reel; + = RoHS/lead-free; # = RoHS/lead-exempt. More: See full data sheet or Part Naming Conventions. 5. * Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Part Number Free Sample Direct Package: TYPE PINS SIZE DRAWING CODE/VAR * Temp RoHS/Lead-Free? CK Ceramic DIP;16 pin;.300" 0 C to +70 C BK Sample Ceramic DIP;16 pin;.300" AK Ceramic DIP;16 pin;.300" AK/883B Ceramic DIP;16 pin;.300" AK/HR Ceramic DIP;16 pin;.300" -20 C to +85 C -55 C to +125 C -55 C to +125 C -55 C to +125 C C/D

14 AL/883B -55 C to +125 C AZ/883B LCC;20 pin;.350" Square Dwg: B (PDF) Use pkgcode/variation: L20-3* -55 C to +125 C CJ Sample PDIP;16 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P16-1* 0 C to +70 C CJ-2 0 C to +70 C CJ+ Sample DJ+ Sample DJ Sample CWE Sample PDIP;16 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P16+1* PDIP;16 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P16+1* PDIP;16 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P16-1* SOIC;16 pin;.300" Use pkgcode/variation: W16-2* CWE+T SOIC;16 pin;.300" Use pkgcode/variation: W16+2* CWE-T SOIC;16 pin;.300" Use pkgcode/variation: W16-2* CWE+ Sample DY Sample SOIC;16 pin;.300" Use pkgcode/variation: W16+2* SOIC;16 pin;.150" Dwg: B (PDF) Use pkgcode/variation: S16-2* EWE+ Sample SOIC;16 pin;.300" Use pkgcode/variation: W16+2* DY+T SOIC;16 pin;.150" Dwg: B (PDF) Use pkgcode/variation: S16+2* 0 C to +70 C RoHS/Lead-Free: Yes RoHS/Lead-Free: Yes 0 C to +70 C 0 C to +70 C RoHS/Lead-Free: Yes 0 C to +70 C 0 C to +70 C RoHS/Lead-Free: Yes RoHS/Lead-Free: Yes RoHS/Lead-Free: Yes

15 DY+ Sample SOIC;16 pin;.150" Dwg: B (PDF) Use pkgcode/variation: S16+2* EWE-T SOIC;16 pin;.300" Use pkgcode/variation: W16-2* EWE Sample SOIC;16 pin;.300" Use pkgcode/variation: W16-2* DY-T SOIC;16 pin;.150" Dwg: B (PDF) Use pkgcode/variation: S16-2* RoHS/Lead-Free: Yes EWE+T RoHS/Lead-Free: Yes Didn't Find What You Need? CONTACT US: SEND US AN Copyright 2007 by Maxim Integrated Products, Dallas Semiconductor Legal Notices Privacy Policy

16 ENGLISH 简 体 中 文 日 本 語 한국어 WHAT'S NEW PRODUCTS SOLUTIONS DESIGN APPNOTES SUPPORT BUY COMPANY MEMBERS Part Number Table Notes: 1. See the QuickView Data Sheet for further information on this product family or download the full data sheet (PDF, 1.1MB). 2. Other options and links for purchasing parts are listed at: 3. Didn't Find What You Need? Ask our applications engineers. Expert assistance in finding parts, usually within one business day. 4. Part number suffixes: T or T&R = tape and reel; + = RoHS/lead-free; # = RoHS/lead-exempt. More: See full data sheet or Part Naming Conventions. 5. * Some packages have variations, listed on the drawing. "PkgCode/Variation" tells which variation the product uses. Part Number Free Sample Direct Package: TYPE PINS SIZE DRAWING CODE/VAR * Temp RoHS/Lead-Free? CK Ceramic DIP;16 pin;.300" 0 C to +70 C BK Ceramic DIP;16 pin;.300" -20 C to +85 C AK Sample Ceramic DIP;16 pin;.300" AK/883B Ceramic DIP;16 pin;.300" AK/HR Ceramic DIP;16 pin;.300" -55 C to +125 C -55 C to +125 C -55 C to +125 C C/D

17 AL/883B -55 C to +125 C AZ/883B LCC;20 pin;.350" Square Dwg: B (PDF) Use pkgcode/variation: L20-3* -55 C to +125 C CJ Sample PDIP;16 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P16-1* 0 C to +70 C CJ-2 0 C to +70 C CJ+ Sample DJ Sample PDIP;16 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P16+1* PDIP;16 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P16-1* DJ+ Sample PDIP;16 pin;.300" Dwg: D (PDF) Use pkgcode/variation: P16+1* CWE+T SOIC;16 pin;.300" Use pkgcode/variation: W16+2* CWE+ Sample SOIC;16 pin;.300" Use pkgcode/variation: W16+2* CWE-T SOIC;16 pin;.300" Use pkgcode/variation: W16-2* CWE Sample SOIC;16 pin;.300" Use pkgcode/variation: W16-2* 0 C to +70 C RoHS/Lead-Free: Yes RoHS/Lead-Free: Yes 0 C to +70 C RoHS/Lead-Free: Yes 0 C to +70 C RoHS/Lead-Free: Yes 0 C to +70 C 0 C to +70 C EWE-T EWE Sample SOIC;16 pin;.300" Use pkgcode/variation: W16-2* DY+T SOIC;16 pin;.150" Dwg: B (PDF) Use pkgcode/variation: S16+2* RoHS/Lead-Free: Yes

18 DY-T SOIC;16 pin;.150" Dwg: B (PDF) Use pkgcode/variation: S16-2* DY Sample SOIC;16 pin;.150" Dwg: B (PDF) Use pkgcode/variation: S16-2* EWE+ Sample SOIC;16 pin;.300" RoHS/Lead-Free: Yes Use pkgcode/variation: W16+2* EWE+T RoHS/Lead-Free: Yes DY+ Sample SOIC;16 pin;.150" Dwg: B (PDF) Use pkgcode/variation: S16+2* RoHS/Lead-Free: Yes Didn't Find What You Need? CONTACT US: FEEDBACK, QUESTIONS RATE THIS PAGE MAIL THIS PAGE Copyright 2007 by Maxim Integrated Products, Dallas Semiconductor Legal Notices Privacy Policy