Mixed-Criticality: Integration of Different Models of Computation. University of Siegen, Roman Obermaisser

Save this PDF as:
 WORD  PNG  TXT  JPG

Size: px
Start display at page:

Download "Mixed-Criticality: Integration of Different Models of Computation. University of Siegen, Roman Obermaisser"

Transcription

1 Workshop on "Challenges in Mixed Criticality, Real-time, and Reliability in Networked Complex Embedded Systems" Mixed-Criticality: Integration of Different Models of Computation University of Siegen, Roman Obermaisser

2 Overview Mixed-Criticality Systems Models of Computation Platforms for Mixed Criticality Systems Platform Support for Models of Computation Integration Levels DREAMS Platform for Heterogeneous Models of Computation in Mixed-Criticality Systems 2

3 Mixed-Criticality Systems Need for mixed-criticality systems due to pressing requirement to reduce the number of nodes and cables Integration of functions with different importance and certification assurance levels on a shared computing platform Trend to multi-core platforms due to limited scalability of uniprocessors (Pollacks rule) Latest processors in industrial applications with multiple cores, but typically only one core is used when highly-critical tasks are involved 3

4 Heterogeneity of Mixed-Criticality Systems Different safety assurance levels (e.g., SIL1-4 in IEC61508, Class A-E in DO178B) Different timing models (e.g., periodic, sporadic and aperiodic activities) Multiple models of computation (e.g., timetriggered, data flow, client/server) Interaction paradigms (e.g., message passing vs. distributed shared memory) 4

5 Interaction Paradigms Shared Memory vs. Message Passing Shared Memory Natural interaction paradigm for several application types (e.g., image processing) Memory hierarchies and coherence protocols significantly contribute to temporal unpredictability Message Passing Explicit timing and better temporal predictability Support for fault containment in time domain Suitable for high computation/communication ratio, which is typical for many safety-relevant services Avoid communication overhead and hardware complexity of the coordination protocol needed for cache coherence 5

6 Examples of Models of Computation (1) Event-Triggered Computing Data flow Directed graph with flow of data between operations Asynchronous model Static or dynamic mapping between producers and consumer Client/server computing Separation of control and data flow Knowledge about minimum time between successive requests and maximum response time of servers required 6

7 Examples of Models of Computation (2) Time-Triggered Computing Typical sequence of activities in a distributed control system Cyclic model of time appropriate to specify temporal structure Event can be specified by the cycle number and the phase offset from the cycle start Temporal alignment on sparse time base

8 System Architecture for Mixed-Criticality Systems Architectural style with rules for the design of a mixedcriticality system Structuring the system into components (e.g., component model, interface types) Defining component interactions and linking interfaces (LIFs), e.g., time model, interaction patterns, fault model Platform with architectural services (e.g., communication, diagnosis, fault-tolerance) as a stable baseline for the implementation and integration of applications 8

9 Mixed-Criticality Integration Levels Software Execution Environments based on Operating Systems and Hypervisors (e.g., PikeOS, VxWorks, XtratuM) Temporal isolation typically based on time partition scheduling at top level combined with different scheduling policies inside partitions Spatial isolation based on MMU Multi-Core Platforms Deterministic chip-level architectures with restrictive models of computation (e.g., GENESYS SoC, PARMERASA) Complex hardware architecture with sources of indeterminism (e.g., caches, buses and shared memories) Distributed Mixed-Criticality Systems (e.g., DIMA) Temporal and spatial partitioning between different nodes Off-chip communication networks without inter-node effects (e.g., TTEthernet) or bounded effects (e.g., AFDX) 9

10 Example: Time-Triggered SoC Architecture Time-Triggered Network-on-a-Chip Clock synchronization for the establishment of a global time base despite multiple clock domains Assignment of exclusive communication slots to the components using a TDMA scheme Communication interface as guardian for a component Trusted Resource Manager (TRM) as guardian for configuration Trusted Subsystem Trusted Resource Manager (TRM) Communication Interface Component Communication Interface Application-Specific Subsystem Component Communication Interface Time-Triggered Network-on-Chip Communication Interface Communication Interface Component Communication Interface Communication Interface Component Component Component Component

11 European Research Project DREAMS Project full title: Distributed REal-time Architecture for Mixed criticality Systems Project duration: October 1, 2013 Sept. 30, 2017 Type of project: Integrated Project (IP) Budget Total: 15.5 mill. EUR Industry SME Thales SA Alstom Wind S.L. STMicroelectronics TÜV Rheinland TTTech RealTime At Work Virtual Open Systems FENTISS France Spain France Germany Austria France France Spain Research O. Univ. ONERA Ikerlan SINTEF Fortiss Universität Siegen TU Kaiserslautern UPV TEI France Spain Norway Germany Germany Germany Spain Greece 11

12 Project Description Mixed-criticality architecture based on networked multicore chips 1. Architectural style and modelling methods 2. Virtualization technologies for security, safety, real-time performance, integrity in networked multi-core chips 3. Adaptation strategies for mixed-criticality systems 4. Development methodology and tools based on modeldriven engineering 5. Certification and mixed-criticality product lines 6. Feasibility of DREAMS architecture in real-world scenarios 7. Promoting widespread adoption and community building

13 Multiple Models of Computation in the DREAMS Mixed-Criticality Architecture Platform as basis for implementation and integration of components Minimal set of core services to ensure arch. properties (e.g., TSP) Hierarchical system with multiple integration levels Integration of different timing models and interaction mechanisms HEALTHCARE AVIONICS WIND POWER Avionic Flight Control Service (Safety Critical, Class A) Entertainment / Multimedia (Not Safety-Relevant) PID Pilot Controls Controller Services of APEX Diagnosis Service Robustness Services Sensors Services of IEC I/O Service Storage Domain-Independent Core Services for Mixed-Criticality Systems Secure and Fault-Tolerant. Timely and Secure Timely and Secure Integrated Resource Global Time. Communication Execution Management Base. for TSP for TSP for TSP Different implementation choices at chip-level and cluster level

14 DREAMS: Network Multi-Core Chips 14

15 Integration of Timing Models Support for periodic time-triggered, sporadic rate-constrained and aperiodic messages Off-chip network (e.g., TTEthernet) On-chip network (e.g., integration of TTNoC and STNoC) Temporal and spatial partitioning based on a priori knowledge of permitted component behavior Gateways for end-to-end communication channels 15

16 Integration of Interaction Paradigms Unidirectional message passing as basic interaction mechanism Every message has one sender and one or more receivers (multicasting) Messages can be used for the data exchange and for synchronization Connection-oriented communication (e.g., virtual links) and connectionless message transfers (e.g., best-effort aperiodic messages) Temporal and spatial partitioning based on a priori knowledge of permitted component behavior Rationale: Message passing facilitates encapsulation, reconfiguration and recovery Multicasting is required in many real-time applications Non-intrusive observation of component interactions by independent FCRs Shared memory realized on top of a basic message passing service Gateways for end-to-end interactions using msg. passing and shared mem. 16

17 Main Outcome and Results Reduced development cost and time-to-market for mixedcriticality applications Exploitation of economies of scale through cross-domain components and tools Consolidation and integration of virtualization solutions and development methods from previous projects Significant advances in virtualization techniques leading to higher reliability, security and safety Higher flexibility, adaptability and energy efficiency through integrated resource management Leverage multi-core platforms for a system perspective of mixed-criticality applications combining the chip-level and network-level

18 Conclusion Increasing importance of mixed-criticality systems based on networked multi-core processors Technological challenges in end-to-end virtualization of resources and heterogeneous models of computations Temporal and spatial partitioning is a foundation for mixed-criticality integration and modular certification DREAMS will combine multiple timing models and interaction paradigms in networked multicore chips 18

HIPEAC 2015. Segregation of Subsystems with Different Criticalities on Networked Multi-Core Chips in the DREAMS Architecture

HIPEAC 2015. Segregation of Subsystems with Different Criticalities on Networked Multi-Core Chips in the DREAMS Architecture HIPEAC 2015 Segregation of Subsystems with Different Criticalities on Networked Multi-Core Chips in the DREAMS Architecture University of Siegen Roman Obermaisser Overview Mixed-Criticality Systems Modular

More information

Mixed-Criticality Systems Based on Time- Triggered Ethernet with Multiple Ring Topologies. University of Siegen Mohammed Abuteir, Roman Obermaisser

Mixed-Criticality Systems Based on Time- Triggered Ethernet with Multiple Ring Topologies. University of Siegen Mohammed Abuteir, Roman Obermaisser Mixed-Criticality s Based on Time- Triggered Ethernet with Multiple Ring Topologies University of Siegen Mohammed Abuteir, Roman Obermaisser Mixed-Criticality s Need for mixed-criticality systems due to

More information

Distributed Real-time Architecture for Mixed Criticality Systems

Distributed Real-time Architecture for Mixed Criticality Systems Distributed Real-time Architecture for Mixed Criticality Systems Architectural Style of DREAMS D 1.2.1 Project Acronym DREAMS Grant Agreement Number FP7-ICT-2013.3.4-610640 Document Version 1.0 Date 2014-07-31

More information

MultiPARTES. Virtualization on Heterogeneous Multicore Platforms. 2012/7/18 Slides by TU Wien, UPV, fentiss, UPM

MultiPARTES. Virtualization on Heterogeneous Multicore Platforms. 2012/7/18 Slides by TU Wien, UPV, fentiss, UPM MultiPARTES Virtualization on Heterogeneous Multicore Platforms 2012/7/18 Slides by TU Wien, UPV, fentiss, UPM Contents Analysis of scheduling approaches Virtualization of devices Dealing with heterogeneous

More information

XtratuM integration on bespoke TTNoCbased. Assessment of the HW/SW.

XtratuM integration on bespoke TTNoCbased. Assessment of the HW/SW. XtratuM integration on bespoke TTNoCbased HW. Assessment of the HW/SW. Deliverable 6.5.3 Project acronym : MultiPARTES Project Number: 287702 Version: v1.1 Due date of deliverable: September 2014 Submission

More information

Industrial Application of MultiPARTES

Industrial Application of MultiPARTES Industrial Application of MultiPARTES January 21st, 2012 HiPEAC Workshop 2013 Integration of mixed-criticality subsystems on multi-core processors David Gonzalez (dgonzalez@ikerlan.es) 1 Definitions and

More information

The Temporal Firewall--A Standardized Interface in the Time-Triggered Architecture

The Temporal Firewall--A Standardized Interface in the Time-Triggered Architecture 1 The Temporal Firewall--A Standardized Interface in the Time-Triggered Architecture H. Kopetz TU Vienna, Austria July 2000 Outline 2 Introduction Temporal Accuracy of RT Information The Time-Triggered

More information

XtratuM hypervisor redesign for LEON4 multicore processor

XtratuM hypervisor redesign for LEON4 multicore processor XtratuM hypervisor redesign for LEON4 multicore processor E.Carrascosa, M.Masmano, P.Balbastre and A.Crespo Universidad Politécnica de Valencia, Spain Outline Motivation/Introduction XtratuM hypervisor

More information

Open Source Implementation of Hierarchical Scheduling for Integrated Modular Avionics

Open Source Implementation of Hierarchical Scheduling for Integrated Modular Avionics Open Source Implementation of Hierarchical Scheduling for Integrated Modular Avionics Juan Zamorano, Juan A. de la Puente Universidad Politécnica de Madrid (UPM) E-28040 Madrid, Spain jzamora@fi.upm.es,

More information

A Data Centric Approach for Modular Assurance. Workshop on Real-time, Embedded and Enterprise-Scale Time-Critical Systems 23 March 2011

A Data Centric Approach for Modular Assurance. Workshop on Real-time, Embedded and Enterprise-Scale Time-Critical Systems 23 March 2011 A Data Centric Approach for Modular Assurance The Real-Time Middleware Experts Workshop on Real-time, Embedded and Enterprise-Scale Time-Critical Systems 23 March 2011 Gabriela F. Ciocarlie Heidi Schubert

More information

Applying Multi-core and Virtualization to Industrial and Safety-Related Applications

Applying Multi-core and Virtualization to Industrial and Safety-Related Applications White Paper Wind River Hypervisor and Operating Systems Intel Processors for Embedded Computing Applying Multi-core and Virtualization to Industrial and Safety-Related Applications Multi-core and virtualization

More information

Towards a European Strategy for Cyber Physical Systems

Towards a European Strategy for Cyber Physical Systems Towards a European Strategy for Cyber Physical Systems Concertation Workshop on Mixed Criticality Systems and Multicore MultiPARTES Dr. Salvador Trujillo IK4 IKERLAN Project General Information Project

More information

PikeOS: Multi-Core RTOS for IMA. Dr. Sergey Tverdyshev SYSGO AG 29.10.2012, Moscow

PikeOS: Multi-Core RTOS for IMA. Dr. Sergey Tverdyshev SYSGO AG 29.10.2012, Moscow PikeOS: Multi-Core RTOS for IMA Dr. Sergey Tverdyshev SYSGO AG 29.10.2012, Moscow Contents Multi Core Overview Hardware Considerations Multi Core Software Design Certification Consideratins PikeOS Multi-Core

More information

IPR issues update Deliverable 8.2

IPR issues update Deliverable 8.2 IPR issues update Deliverable 8.2 Project acronym : MultiPARTES Project Number: 287702 Version: v1.0 Due date of deliverable: December 2014 Submission date: 26/01/2015 Dissemination level: PUBLIC Author:

More information

Multicore partitioned systems based on hypervisor

Multicore partitioned systems based on hypervisor Preprints of the 19th World Congress The International Federation of Automatic Control Multicore partitioned systems based on hypervisor A. Crespo M. Masmano J. Coronel S. Peiró P. Balbastre J. Simó Universitat

More information

System Software and TinyAUTOSAR

System Software and TinyAUTOSAR System Software and TinyAUTOSAR Florian Kluge University of Augsburg, Germany parmerasa Dissemination Event, Barcelona, 2014-09-23 Overview parmerasa System Architecture Library RTE Implementations TinyIMA

More information

Experience with the integration of distribution middleware into partitioned systems

Experience with the integration of distribution middleware into partitioned systems Experience with the integration of distribution middleware into partitioned systems Héctor Pérez Tijero (perezh@unican.es) J. Javier Gutiérrez García (gutierjj@unican.es) Computers and Real-Time Group,

More information

Outline. Introduction. Multiprocessor Systems on Chip. A MPSoC Example: Nexperia DVP. A New Paradigm: Network on Chip

Outline. Introduction. Multiprocessor Systems on Chip. A MPSoC Example: Nexperia DVP. A New Paradigm: Network on Chip Outline Modeling, simulation and optimization of Multi-Processor SoCs (MPSoCs) Università of Verona Dipartimento di Informatica MPSoCs: Multi-Processor Systems on Chip A simulation platform for a MPSoC

More information

Architectures for Distributed Real-time Systems

Architectures for Distributed Real-time Systems SDP Workshop Nashville TN 13 Dec 2001 Architectures for Distributed Real-time Systems Michael W. Masters NSWCDD Building Systems for the Real World What is the Problem? Capability sustainment Affordable

More information

Software Stacks for Mixed-critical Applications: Consolidating IEEE 802.1 AVB and Time-triggered Ethernet in Next-generation Automotive Electronics

Software Stacks for Mixed-critical Applications: Consolidating IEEE 802.1 AVB and Time-triggered Ethernet in Next-generation Automotive Electronics Software : Consolidating IEEE 802.1 AVB and Time-triggered Ethernet in Next-generation Automotive Electronics Soeren Rumpf Till Steinbach Franz Korf Thomas C. Schmidt till.steinbach@haw-hamburg.de September

More information

Methods and Tools For Embedded Distributed System Scheduling and Schedulability Analysis

Methods and Tools For Embedded Distributed System Scheduling and Schedulability Analysis Methods and Tools For Embedded Distributed System Scheduling and Schedulability Analysis Steve Vestal Honeywell Labs Steve.Vestal@Honeywell.com 18 October 2005 Outline Background Binding and Routing Scheduling

More information

ARINC-653 Inter-partition Communications and the Ravenscar Profile

ARINC-653 Inter-partition Communications and the Ravenscar Profile ARINC-653 Inter-partition Communications and the Ravenscar Profile Jorge Garrido jgarrido@dit.upm.es Juan Zamorano jzamora@datsi.fi.upm.es Universidad Politécnica de Madrid (UPM), Spain Juan A. de la Puente

More information

Real-time Operating Systems. VO Embedded Systems Engineering Armin Wasicek 11.12.2012

Real-time Operating Systems. VO Embedded Systems Engineering Armin Wasicek 11.12.2012 Real-time Operating Systems VO Embedded Systems Engineering Armin Wasicek 11.12.2012 Overview Introduction OS and RTOS RTOS taxonomy and architecture Application areas Mixed-criticality systems Examples:

More information

Deeply Embedded Real-Time Hypervisors for the Automotive Domain Dr. Gary Morgan, ETAS/ESC

Deeply Embedded Real-Time Hypervisors for the Automotive Domain Dr. Gary Morgan, ETAS/ESC Deeply Embedded Real-Time Hypervisors for the Automotive Domain Dr. Gary Morgan, ETAS/ESC 1 Public ETAS/ESC 2014-02-20 ETAS GmbH 2014. All rights reserved, also regarding any disposal, exploitation, reproduction,

More information

Introduction to Exploration and Optimization of Multiprocessor Embedded Architectures based on Networks On-Chip

Introduction to Exploration and Optimization of Multiprocessor Embedded Architectures based on Networks On-Chip Introduction to Exploration and Optimization of Multiprocessor Embedded Architectures based on Networks On-Chip Cristina SILVANO silvano@elet.polimi.it Politecnico di Milano, Milano (Italy) Talk Outline

More information

Boeing B-777. 29.1 Introduction. 29.2 Background. Michael J. Morgan

Boeing B-777. 29.1 Introduction. 29.2 Background. Michael J. Morgan 29 Boeing B-777 Michael J. Morgan Honeywell 29.1 Introduction 29.2 Background 29.3 Boeing 777 Airplane Information Management System (AIMS) 29.4 Cabinet Architecture Overview 29.5 Backplane Bus 29.6 Maintenance

More information

Ada Real-Time Services and Virtualization

Ada Real-Time Services and Virtualization Ada Real-Time Services and Virtualization Juan Zamorano, Ángel Esquinas, Juan A. de la Puente Universidad Politécnica de Madrid, Spain jzamora,aesquina@datsi.fi.upm.es, jpuente@dit.upm.es Abstract Virtualization

More information

Proactive, Resource-Aware, Tunable Real-time Fault-tolerant Middleware

Proactive, Resource-Aware, Tunable Real-time Fault-tolerant Middleware Proactive, Resource-Aware, Tunable Real-time Fault-tolerant Middleware Priya Narasimhan T. Dumitraş, A. Paulos, S. Pertet, C. Reverte, J. Slember, D. Srivastava Carnegie Mellon University Problem Description

More information

Aperiodic Task Scheduling

Aperiodic Task Scheduling Aperiodic Task Scheduling Jian-Jia Chen (slides are based on Peter Marwedel) TU Dortmund, Informatik 12 Germany Springer, 2010 2014 年 11 月 19 日 These slides use Microsoft clip arts. Microsoft copyright

More information

Ethernet A Survey on its Fields of Application

Ethernet A Survey on its Fields of Application Ethernet A Survey on its Fields of Application Fachtagung ITG FA 5.2 "Zukunft der Netze" Jörg Sommer et al. joerg.sommer@ikr.uni-stuttgart.de 7. Oktober 2010 Universität Stuttgart Institut für Kommunikationsnetze

More information

BASIC CONCEPTS AND RELATED WORK

BASIC CONCEPTS AND RELATED WORK Chapter 2 BASIC CONCEPTS AND RELATED WORK This chapter presents the basic concepts and terminology used in this book and gives an overview of system architectures for ultra-dependable, distributed real-time

More information

Designing Real-Time and Embedded Systems with the COMET/UML method

Designing Real-Time and Embedded Systems with the COMET/UML method By Hassan Gomaa, Department of Information and Software Engineering, George Mason University. Designing Real-Time and Embedded Systems with the COMET/UML method Most object-oriented analysis and design

More information

Secure Containers. Jan 2015 www.imgtec.com. Imagination Technologies HGI Dec, 2014 p1

Secure Containers. Jan 2015 www.imgtec.com. Imagination Technologies HGI Dec, 2014 p1 Secure Containers Jan 2015 www.imgtec.com Imagination Technologies HGI Dec, 2014 p1 What are we protecting? Sensitive assets belonging to the user and the service provider Network Monitor unauthorized

More information

A Real-time Ethernet Prototype Platform for Automotive Applications

A Real-time Ethernet Prototype Platform for Automotive Applications A Real-time Ethernet Prototype Platform for Automotive Applications Kai Müller, Till Steinbach, Franz Korf, Thomas C. Schmidt Department of Computer Science Hamburg University of Applied Sciences, Germany

More information

Partition Scheduling in APEX Runtime Environment for Embedded Avionics Software

Partition Scheduling in APEX Runtime Environment for Embedded Avionics Software Partition Scheduling in APEX Runtime Environment for Embedded Avionics Software Yang-Hang Lee CISE Department, University of Florida Gainesville, FL 32611 Phone: (352) 392-1536 Fax: (352) 392-1220 Email:

More information

Embedded Systems. 6. Real-Time Operating Systems

Embedded Systems. 6. Real-Time Operating Systems Embedded Systems 6. Real-Time Operating Systems Lothar Thiele 6-1 Contents of Course 1. Embedded Systems Introduction 2. Software Introduction 7. System Components 10. Models 3. Real-Time Models 4. Periodic/Aperiodic

More information

Model-Based Development of Safety-Critical Systems

Model-Based Development of Safety-Critical Systems Model-Based Development of Safety-Critical Systems Matthias Regensburger (regensbu@in.tum.de) Christian Buckl (buckl@in.tum.de) 08.05.2007 1 Overview Motivation Approach: Template Based Development Models

More information

Resource Monitoring in GRID computing

Resource Monitoring in GRID computing Seminar May 16, 2003 Resource Monitoring in GRID computing Augusto Ciuffoletti Dipartimento di Informatica - Univ. di Pisa next: Network Monitoring Architecture Network Monitoring Architecture controls

More information

Cloud Computing and Robotics for Disaster Management

Cloud Computing and Robotics for Disaster Management 2016 7th International Conference on Intelligent Systems, Modelling and Simulation Cloud Computing and Robotics for Disaster Management Nitesh Jangid Information Technology Department Green Research IT

More information

An Event-Triggered Smart Sensor Network Architecture

An Event-Triggered Smart Sensor Network Architecture An Event-Triggered Smart Sensor Network Architecture Erico Meneses Leão, Luiz Affonso Guedes, and Francisco Vasques, Member, IEEE, Abstract A smart transducer is the integration of a sensor/actuator element,

More information

Real-Time Systems Hermann Härtig Real-Time Communication (following Kopetz, Liu, Schönberg, Löser)

Real-Time Systems Hermann Härtig Real-Time Communication (following Kopetz, Liu, Schönberg, Löser) Real-Time Systems Hermann Härtig Real-Time Communication (following Kopetz, Liu, Schönberg, Löser) 05/02/15 Contents Overview IO Busses: PCI Networks as schedulable resources: Priority / Time-Driven /

More information

Comparison of FlexRay and CAN-bus for Real-Time Communication

Comparison of FlexRay and CAN-bus for Real-Time Communication Comparison of FlexRay and CAN-bus for Real-Time Communication Andreas Forsberg Mälardalen University Högskoleplan 1 721 23 Västerås +46 768011236 afg05001@student.mdh.se Johan Hedberg Mälardalen University

More information

Virtualization for Hard Real-Time Applications Partition where you can Virtualize where you have to

Virtualization for Hard Real-Time Applications Partition where you can Virtualize where you have to Virtualization for Hard Real-Time Applications Partition where you can Virtualize where you have to Hanspeter Vogel Triadem Solutions AG Real-Time Systems GmbH Gartenstrasse 33 D-88212 Ravensburg Germany

More information

FlexRay A Communications Network for Automotive Control Systems

FlexRay A Communications Network for Automotive Control Systems FlexRay A Communications Network for Automotive Control Systems WFCS 2006 Rainer Makowitz Automotive Systems Engineering, EMEA Freescale and the Freescale logo are trademarks of Freescale Semiconductor,

More information

Memory Isolation in Many-Core Embedded Systems

Memory Isolation in Many-Core Embedded Systems Memory Isolation in Many-Core Embedded Systems Juan Zamorano and Juan A. de la Puente Universidad Politécnica de Madrid (UPM), Abstract. The current approach to developing mixed-criticality systems is

More information

Simple and error-free startup of the communication cluster. as well as high system stability over long service life are

Simple and error-free startup of the communication cluster. as well as high system stability over long service life are Network Management for FlexRay New network topologies tested in practice Simple and error-free startup of the communication cluster as well as high system stability over long service life are required

More information

Embedded & Real-time Operating Systems

Embedded & Real-time Operating Systems Universität Dortmund 12 Embedded & Real-time Operating Systems Peter Marwedel, Informatik 12 Germany Application Knowledge Structure of this course New clustering 3: Embedded System HW 2: Specifications

More information

A Dual-Layer Bus Arbiter for Mixed-Criticality Systems with Hypervisors

A Dual-Layer Bus Arbiter for Mixed-Criticality Systems with Hypervisors A Dual-Layer Bus Arbiter for Mixed-Criticality Systems with Hypervisors Bekim Cilku, Bernhard Frömel, Peter Puschner Institute of Computer Engineering Vienna University of Technology A1040 Wien, Austria

More information

A distributed system is defined as

A distributed system is defined as A distributed system is defined as A collection of independent computers that appears to its users as a single coherent system CS550: Advanced Operating Systems 2 Resource sharing Openness Concurrency

More information

Hitachi Virtage Embedded Virtualization Hitachi BladeSymphony 10U

Hitachi Virtage Embedded Virtualization Hitachi BladeSymphony 10U Hitachi Virtage Embedded Virtualization Hitachi BladeSymphony 10U Datasheet Brings the performance and reliability of mainframe virtualization to blade computing BladeSymphony is the first true enterprise-class

More information

Quality of Service Management for Teleteaching Applications Using the MPEG-4/DMIF

Quality of Service Management for Teleteaching Applications Using the MPEG-4/DMIF Quality of Service Management for Teleteaching Applications Using the MPEG-4/DMIF Gregor v. Bochmann and Zhen Yang University of Ottawa Presentation at the IDMS conference in Toulouse, October 1999 This

More information

Designing Predictable Multicore Architectures for Avionics and Automotive Systems extended abstract

Designing Predictable Multicore Architectures for Avionics and Automotive Systems extended abstract Designing Predictable Multicore Architectures for Avionics and Automotive Systems extended abstract Reinhard Wilhelm, Christian Ferdinand, Christoph Cullmann, Daniel Grund, Jan Reineke, Benôit Triquet

More information

Weighted Total Mark. Weighted Exam Mark

Weighted Total Mark. Weighted Exam Mark CMP2204 Operating System Technologies Period per Week Contact Hour per Semester Total Mark Exam Mark Continuous Assessment Mark Credit Units LH PH TH CH WTM WEM WCM CU 45 30 00 60 100 40 100 4 Rationale

More information

AFDX/ARINC 664 Concept, Design, Implementation and Beyond

AFDX/ARINC 664 Concept, Design, Implementation and Beyond SYSGO White Paper White Paper AFDX/ARINC 664 Concept, Design, Implementation and Beyond By Detlev Schaadt, CTO, SYSGO AG Whitepaper AFDX/ARINC 664 Concept, Design, Implementation and Beyond Introduction

More information

Real-Time Component Software. slide credits: H. Kopetz, P. Puschner

Real-Time Component Software. slide credits: H. Kopetz, P. Puschner Real-Time Component Software slide credits: H. Kopetz, P. Puschner Overview OS services Task Structure Task Interaction Input/Output Error Detection 2 Operating System and Middleware Applica3on So5ware

More information

The GENESYS Architecture: A Conceptual Model for Component-Based Distributed Real-Time Systems

The GENESYS Architecture: A Conceptual Model for Component-Based Distributed Real-Time Systems The GENESYS Architecture: A Conceptual Model for -Based Distributed Real-Time Systems Roman Obermaisser and Bernhard Huber Vienna University of Technology, Austria Abstract. This paper proposes a conceptual

More information

Introduction to TTP and FlexRay real-time protocols

Introduction to TTP and FlexRay real-time protocols Introduction to TTP and FlexRay real-time protocols 15.11.2005 IDA/DSFD meeting 15.11.2005 at IHA Århus by Finn Overgaard Hansen, Ingeniørhøjskolen i Århus foh@iha.dk Agenda Application areas for Time

More information

Improved Handling of Soft Aperiodic Tasks in Offline Scheduled Real-Time Systems using Total Bandwidth Server

Improved Handling of Soft Aperiodic Tasks in Offline Scheduled Real-Time Systems using Total Bandwidth Server Improved Handling of Soft Aperiodic Tasks in Offline Scheduled Real-Time Systems using Total Bandwidth Server Gerhard Fohler, Tomas Lennvall Mälardalen University Västeras, Sweden gfr, tlv @mdh.se Giorgio

More information

Linux A multi-purpose executive support for civil avionics applications?

Linux A multi-purpose executive support for civil avionics applications? August 2004 Serge GOIFFON Pierre GAUFILLET AIRBUS France Linux A multi-purpose executive support for civil avionics applications? Civil avionics software context Main characteristics Required dependability

More information

From Bus and Crossbar to Network-On-Chip. Arteris S.A.

From Bus and Crossbar to Network-On-Chip. Arteris S.A. From Bus and Crossbar to Network-On-Chip Arteris S.A. Copyright 2009 Arteris S.A. All rights reserved. Contact information Corporate Headquarters Arteris, Inc. 1741 Technology Drive, Suite 250 San Jose,

More information

Performance Analysis of Time-Triggered Ether-Networks Using Off-The-Shelf-Components

Performance Analysis of Time-Triggered Ether-Networks Using Off-The-Shelf-Components of Time-Triggered Ether-Networks Using Off-The-Shelf-Components AMICS Workshop 2011 Till Steinbach, Franz Korf, Thomas C. Schmidt {florian.bartols,till.steinbach,korf,schmidt} @informatik.haw-hamburg.de

More information

DDS-Enabled Cloud Management Support for Fast Task Offloading

DDS-Enabled Cloud Management Support for Fast Task Offloading DDS-Enabled Cloud Management Support for Fast Task Offloading IEEE ISCC 2012, Cappadocia Turkey Antonio Corradi 1 Luca Foschini 1 Javier Povedano-Molina 2 Juan M. Lopez-Soler 2 1 Dipartimento di Elettronica,

More information

VtRES 2013. Towards Hardware Embedded Virtualization Technology: Architectural Enhancements to an ARM SoC. ESRG Embedded Systems Research Group

VtRES 2013. Towards Hardware Embedded Virtualization Technology: Architectural Enhancements to an ARM SoC. ESRG Embedded Systems Research Group Towards Hardware Embedded Virtualization Technology: Architectural Enhancements to an ARM SoC VtRES 2013 P. Garcia, T. Gomes, F. Salgado, J. Monteiro, A. Tavares Summary 1. Current landscape in 2. Embedded

More information

THE RTOS AS THE ENGINE POWERING THE INTERNET OF THINGS

THE RTOS AS THE ENGINE POWERING THE INTERNET OF THINGS THE RTOS AS THE ENGINE POWERING THE INTERNET OF THINGS By Bill Graham and Michael Weinstein INNOVATORS START HERE. EXECUTIVE SUMMARY Driven by the convergence of cloud technology, rapidly growing data

More information

Software Engineering for Real- Time Systems.

Software Engineering for Real- Time Systems. Software Engineering for Real- Time Systems. Presented by Andrew Dyer-Smith and Jamie McClelland Overview What are Real-Time Systems. Requirements of Real-Time Systems Current Technology Construction 1

More information

Vortex White Paper. Simplifying Real-time Information Integration in Industrial Internet of Things (IIoT) Control Systems

Vortex White Paper. Simplifying Real-time Information Integration in Industrial Internet of Things (IIoT) Control Systems Vortex White Paper Simplifying Real-time Information Integration in Industrial Internet of Things (IIoT) Control Systems Version 1.0 February 2015 Andrew Foster, Product Marketing Manager, PrismTech Vortex

More information

Linear Motion and Assembly Technologies Pneumatics Service. Industrial Ethernet: The key advantages of SERCOS III

Linear Motion and Assembly Technologies Pneumatics Service. Industrial Ethernet: The key advantages of SERCOS III Electric Drives and Controls Hydraulics Linear Motion and Assembly Technologies Pneumatics Service profile Drive & Control Industrial Ethernet: The key advantages of SERCOS III SERCOS III is the open,

More information

FOUNDATION Fieldbus High Speed Ethernet Control System

FOUNDATION Fieldbus High Speed Ethernet Control System FOUNDATION Fieldbus High Speed Ethernet Control System Sean J. Vincent Fieldbus Inc. Austin, TX, USA KEYWORDS Fieldbus, High Speed Ethernet, H1, ABSTRACT FOUNDATION fieldbus is described in part by the

More information

Notes and terms of conditions. Vendor shall note the following terms and conditions/ information before they submit their quote.

Notes and terms of conditions. Vendor shall note the following terms and conditions/ information before they submit their quote. Specifications for ARINC 653 compliant RTOS & Development Environment Notes and terms of conditions Vendor shall note the following terms and conditions/ information before they submit their quote. 1.

More information

OpenMTC. M2M Solutions for Smart Cities and the Internet of Things. www.open-mtc.org info@open-mtc.org

OpenMTC. M2M Solutions for Smart Cities and the Internet of Things. www.open-mtc.org info@open-mtc.org OpenMTC M2M Solutions for Smart Cities and the Internet of Things www.open-mtc.org info@open-mtc.org 2. March März 2, 2013 Understanding M2M Machine-to-Machine (M2M) is a paradigm in which the end-to-end

More information

Title: Partitioned Embedded Architecture based on Hypervisor: the XtratuM approach. Authors: S. Peiró, A. Crespo, I. Ripoll, M.

Title: Partitioned Embedded Architecture based on Hypervisor: the XtratuM approach. Authors: S. Peiró, A. Crespo, I. Ripoll, M. Title: Partitioned Embedded Architecture based on Hypervisor: the XtratuM approach. Authors: S. Peiró, A. Crespo, I. Ripoll, M. Masmano Affiliation: Instituto de Informática Industrial, Universidad Politécnica

More information

SOC architecture and design

SOC architecture and design SOC architecture and design system-on-chip (SOC) processors: become components in a system SOC covers many topics processor: pipelined, superscalar, VLIW, array, vector storage: cache, embedded and external

More information

Client/Server Computing Distributed Processing, Client/Server, and Clusters

Client/Server Computing Distributed Processing, Client/Server, and Clusters Client/Server Computing Distributed Processing, Client/Server, and Clusters Chapter 13 Client machines are generally single-user PCs or workstations that provide a highly userfriendly interface to the

More information

Making Multicore Work and Measuring its Benefits. Markus Levy, president EEMBC and Multicore Association

Making Multicore Work and Measuring its Benefits. Markus Levy, president EEMBC and Multicore Association Making Multicore Work and Measuring its Benefits Markus Levy, president EEMBC and Multicore Association Agenda Why Multicore? Standards and issues in the multicore community What is Multicore Association?

More information

CHAPTER 1: OPERATING SYSTEM FUNDAMENTALS

CHAPTER 1: OPERATING SYSTEM FUNDAMENTALS CHAPTER 1: OPERATING SYSTEM FUNDAMENTALS What is an operating? A collection of software modules to assist programmers in enhancing efficiency, flexibility, and robustness An Extended Machine from the users

More information

International Summer School on Embedded Systems

International Summer School on Embedded Systems International Summer School on Embedded Systems Shenzhen Institutes of Advanced Technology, Chinese Academy of Sciences Shenzhen, July 30 -- August 3, 2012 Sponsored by Chinese Academy of Sciences and

More information

PART II. OPS-based metro area networks

PART II. OPS-based metro area networks PART II OPS-based metro area networks Chapter 3 Introduction to the OPS-based metro area networks Some traffic estimates for the UK network over the next few years [39] indicate that when access is primarily

More information

QLogic 16Gb Gen 5 Fibre Channel in IBM System x Deployments

QLogic 16Gb Gen 5 Fibre Channel in IBM System x Deployments QLogic 16Gb Gen 5 Fibre Channel in IBM System x Deployments Increase Virtualization Density and Eliminate I/O Bottlenecks with QLogic High-Speed Interconnects Key Findings Support for increased workloads,

More information

COS 318: Operating Systems. Virtual Machine Monitors

COS 318: Operating Systems. Virtual Machine Monitors COS 318: Operating Systems Virtual Machine Monitors Andy Bavier Computer Science Department Princeton University http://www.cs.princeton.edu/courses/archive/fall10/cos318/ Introduction Have been around

More information

M.Sc. IT Semester III VIRTUALIZATION QUESTION BANK 2014 2015 Unit 1 1. What is virtualization? Explain the five stage virtualization process. 2.

M.Sc. IT Semester III VIRTUALIZATION QUESTION BANK 2014 2015 Unit 1 1. What is virtualization? Explain the five stage virtualization process. 2. M.Sc. IT Semester III VIRTUALIZATION QUESTION BANK 2014 2015 Unit 1 1. What is virtualization? Explain the five stage virtualization process. 2. What are the different types of virtualization? Explain

More information

Radware ADC-VX Solution. The Agility of Virtual; The Predictability of Physical

Radware ADC-VX Solution. The Agility of Virtual; The Predictability of Physical Radware ADC-VX Solution The Agility of Virtual; The Predictability of Physical Table of Contents General... 3 Virtualization and consolidation trends in the data centers... 3 How virtualization and consolidation

More information

Cisco and EMC Solutions for Application Acceleration and Branch Office Infrastructure Consolidation

Cisco and EMC Solutions for Application Acceleration and Branch Office Infrastructure Consolidation Solution Overview Cisco and EMC Solutions for Application Acceleration and Branch Office Infrastructure Consolidation IT organizations face challenges in consolidating costly and difficult-to-manage branch-office

More information

STUDY AND SIMULATION OF A DISTRIBUTED REAL-TIME FAULT-TOLERANCE WEB MONITORING SYSTEM

STUDY AND SIMULATION OF A DISTRIBUTED REAL-TIME FAULT-TOLERANCE WEB MONITORING SYSTEM STUDY AND SIMULATION OF A DISTRIBUTED REAL-TIME FAULT-TOLERANCE WEB MONITORING SYSTEM Albert M. K. Cheng, Shaohong Fang Department of Computer Science University of Houston Houston, TX, 77204, USA http://www.cs.uh.edu

More information

174: Scheduling Systems. Emil Michta University of Zielona Gora, Zielona Gora, Poland 1 TIMING ANALYSIS IN NETWORKED MEASUREMENT CONTROL SYSTEMS

174: Scheduling Systems. Emil Michta University of Zielona Gora, Zielona Gora, Poland 1 TIMING ANALYSIS IN NETWORKED MEASUREMENT CONTROL SYSTEMS 174: Scheduling Systems Emil Michta University of Zielona Gora, Zielona Gora, Poland 1 Timing Analysis in Networked Measurement Control Systems 1 2 Introduction to Scheduling Systems 2 3 Scheduling Theory

More information

Architectures and Platforms

Architectures and Platforms Hardware/Software Codesign Arch&Platf. - 1 Architectures and Platforms 1. Architecture Selection: The Basic Trade-Offs 2. General Purpose vs. Application-Specific Processors 3. Processor Specialisation

More information

CHAPTER 2 MODELLING FOR DISTRIBUTED NETWORK SYSTEMS: THE CLIENT- SERVER MODEL

CHAPTER 2 MODELLING FOR DISTRIBUTED NETWORK SYSTEMS: THE CLIENT- SERVER MODEL CHAPTER 2 MODELLING FOR DISTRIBUTED NETWORK SYSTEMS: THE CLIENT- SERVER MODEL This chapter is to introduce the client-server model and its role in the development of distributed network systems. The chapter

More information

Real-Time Operating Systems for MPSoCs

Real-Time Operating Systems for MPSoCs Real-Time Operating Systems for MPSoCs Hiroyuki Tomiyama Graduate School of Information Science Nagoya University http://member.acm.org/~hiroyuki MPSoC 2009 1 Contributors Hiroaki Takada Director and Professor

More information

OPART: Towards an Open Platform for Abstraction of Real-Time Communication in Cross-Domain Applications

OPART: Towards an Open Platform for Abstraction of Real-Time Communication in Cross-Domain Applications OPART: Towards an Open Platform for Abstraction of Real-Time Communication in Cross-Domain Applications Simplification of Developing Process in Real-time Networked Medical Systems Morteza Hashemi Farzaneh,

More information

EMC VPLEX FAMILY. Continuous Availability and Data Mobility Within and Across Data Centers

EMC VPLEX FAMILY. Continuous Availability and Data Mobility Within and Across Data Centers EMC VPLEX FAMILY Continuous Availability and Data Mobility Within and Across Data Centers DELIVERING CONTINUOUS AVAILABILITY AND DATA MOBILITY FOR MISSION CRITICAL APPLICATIONS Storage infrastructure is

More information

Virtualizing Exchange

Virtualizing Exchange Virtualizing Exchange Simplifying and Optimizing Management of Microsoft Exchange Server Using Virtualization Technologies By Anil Desai Microsoft MVP September, 2008 An Alternative to Hosted Exchange

More information

Parallels Virtuozzo Containers vs. VMware Virtual Infrastructure:

Parallels Virtuozzo Containers vs. VMware Virtual Infrastructure: Parallels Virtuozzo Containers vs. VMware Virtual Infrastructure: An Independent Architecture Comparison TABLE OF CONTENTS Introduction...3 A Tale of Two Virtualization Solutions...5 Part I: Density...5

More information

COS 318: Operating Systems. Virtual Machine Monitors

COS 318: Operating Systems. Virtual Machine Monitors COS 318: Operating Systems Virtual Machine Monitors Kai Li and Andy Bavier Computer Science Department Princeton University http://www.cs.princeton.edu/courses/archive/fall13/cos318/ Introduction u Have

More information

Protocols and Architecture. Protocol Architecture.

Protocols and Architecture. Protocol Architecture. Protocols and Architecture Protocol Architecture. Layered structure of hardware and software to support exchange of data between systems/distributed applications Set of rules for transmission of data between

More information

Advanced Operating Systems (M) Dr Colin Perkins School of Computing Science University of Glasgow

Advanced Operating Systems (M) Dr Colin Perkins School of Computing Science University of Glasgow Advanced Operating Systems (M) Dr Colin Perkins School of Computing Science University of Glasgow Rationale Radical changes to computing landscape; Desktop PC becoming irrelevant Heterogeneous, multicore,

More information

Core Syllabus. Version 2.6 C OPERATE KNOWLEDGE AREA: OPERATION AND SUPPORT OF INFORMATION SYSTEMS. June 2006

Core Syllabus. Version 2.6 C OPERATE KNOWLEDGE AREA: OPERATION AND SUPPORT OF INFORMATION SYSTEMS. June 2006 Core Syllabus C OPERATE KNOWLEDGE AREA: OPERATION AND SUPPORT OF INFORMATION SYSTEMS Version 2.6 June 2006 EUCIP CORE Version 2.6 Syllabus. The following is the Syllabus for EUCIP CORE Version 2.6, which

More information

Virtualization Technologies and Blackboard: The Future of Blackboard Software on Multi-Core Technologies

Virtualization Technologies and Blackboard: The Future of Blackboard Software on Multi-Core Technologies Virtualization Technologies and Blackboard: The Future of Blackboard Software on Multi-Core Technologies Kurt Klemperer, Principal System Performance Engineer kklemperer@blackboard.com Agenda Session Length:

More information

Flight Processor Virtualization

Flight Processor Virtualization National Aeronautics and Space Administration Flight Processor Virtualization Alan Cudmore / Code 582 9/11/2013 www.nasa.gov 1 Agenda Introduction to Virtualization Benefits of Virtualization for Satellite

More information

December, 7th, 2015, Assises de l Embarqué

December, 7th, 2015, Assises de l Embarqué S3P Project Announcement December, 7th, 2015, Assises de l Embarqué 1 2015 Embedded France 16 novembre 2015 Agenda The IoT Opportunity The «Smart, Safeand Secure Platform» (S3P) Project The «S3P Alliance»

More information

A Network Management Framework for Emerging Telecommunications Network. asamba@kent.edu

A Network Management Framework for Emerging Telecommunications Network. asamba@kent.edu Symposium on Modeling and Simulation Tools for Emerging Telecommunication Networks: Needs, Trends, Challenges, Solutions Munich, Germany, Sept. 8 9, 2005 A Network Management Framework for Emerging Telecommunications

More information

An Active Packet can be classified as

An Active Packet can be classified as Mobile Agents for Active Network Management By Rumeel Kazi and Patricia Morreale Stevens Institute of Technology Contact: rkazi,pat@ati.stevens-tech.edu Abstract-Traditionally, network management systems

More information