Getting the most TCP/IP from your Embedded Processor
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1 Getting the most TCP/IP from your Embedded Processor
2 Overview Introduction to TCP/IP Protocol Suite Embedded TCP/IP Applications TCP Termination Challenges TCP Acceleration Techniques 2 Getting the most TCP/IP from your Embedded Processor
3 Overview Introduction to TCP/IP Protocol Suite Embedded TCP/IP Applications TCP Termination Challenges TCP Acceleration Techniques 3 Getting the most TCP/IP from your Embedded Processor
4 Why do we care about TCP/IP? TCP/IP is the most popular networking protocol TCP has become the de-facto standard for data communications between computer systems Ethernet is the most popular LAN technology 95%* of all LAN implementations use Ethernet Over 750 million* Ethernet ports deployed worldwide * Source: Instat/MDR 4 Getting the most TCP/IP from your Embedded Processor
5 TCP/IP Defined TCP/IP is a suite of protocols that allow computer systems to communicate with each other TCP/IP is an open standard Internet Engineering Task Force Protocol suite is layered Application: handles details of particular application Transport: provides flow of data Network: handles movement (routing) of packets around the network Data Link: device driver + network interface Application Presentation Session Transport Network Data Link Physical Telnet, FTP, , etc. TCP, UDP IP Ethernet device driver and interface card 5 Getting the most TCP/IP from your Embedded Processor
6 TCP/IP Protocols TCP : Transmission Control Protocol [RFC 793] Connection oriented, reliable, byte stream transport UDP : User Datagram Protocol [RFC 768] Simple datagram oriented, unreliable transport IP : Internet Protocol [RFC 791] [RFC 791] Connectionless datagram delivery service TCP and UDP data are transmitted as IP datagrams 6 Getting the most TCP/IP from your Embedded Processor
![transport IP : Internet Protocol [RFC 791] [RFC 791] Connectionless datagram delivery service TCP](/docs-images/45/9106062/images/page_6.jpg "and UDP data are transmitted as IP datagrams 6 Getting the most TCP/IP from your Embedded")
7 Protocol Encapsulation Data is sent down protocol stack through each layer until it is finally sent over Ethernet media Each layer prepends a header that helps to provide the service of the each protocol TCP Segment: data that TCP layer sends to IP layer IP datagram: data that IP layer sends to network interface Ethernet Frame: stream of bits sent over Ethernet media 7 Getting the most TCP/IP from your Embedded Processor
8 Protocol Demultiplexing Ethernet frames received on network interface travel up the protocol stack Headers are removed and parsed by each successive protocol layer Identifiers in the headers determine which next upper layer should receive the data Each TCP Connection can uniquely be identified by 4 pieces of information (a socket): Client IP address Client port number Server IP address Server port number 8 Getting the most TCP/IP from your Embedded Processor
9 TCP/IP Summary TCP/IP is a suite of protocols that allow computer systems to communicate with each other Protocols are layered (like OSI model) Main Protocols that make up TCP/IP Protocol Suite TCP, UDP, IP 9 Getting the most TCP/IP from your Embedded Processor
10 Overview Introduction to TCP/IP Protocol Suite Embedded TCP/IP Applications TCP Termination Challenges Further TCP Acceleration Techniques TCP/IP Customer Ready Demo 10 Getting the most TCP/IP from your Embedded Processor
11 High Resolution Imaging over TCP Image Protocol Interface to Imaging device GbE PowerPC takes data from Imaging device and transfers to remote Workstation using TCP Workstation stores image data and performs post processing Ethernet interface to Workstation 11 Getting the most TCP/IP from your Embedded Processor
12 Remote Monitoring & Control Xilinx Enables Remote Monitoring/Control Legacy Implementation TCP/IP Internet Network RS232 Hardware: Microblaze, 10/100 MAC, UART, GPIO Software: XMK, Http server, SNMP agent, HTML pages - Monitor parameters acquired by the controller (volts, amps, usage..) - Configure the controller settings (set alarm conditions,..) - Operate the Controller and the associated Power System A Power Monitoring/Control Unit - An old and outdated System - Monitors and Controls the power system for Telecom equipment - Operated by a simple command line interface over RS Getting the most TCP/IP from your Embedded Processor
13 Overview Introduction to TCP/IP Protocol Suite Embedded TCP/IP Applications TCP Termination Challenges TCP Acceleration Techniques 13 Getting the most TCP/IP from your Embedded Processor
14 System Level Considerations Memory Bandwidth Lots of memory bandwidth is required to support wire-speed TCP/Ethernet plus processor instruction/data fetches with reasonable latency CPU Performance PowerPC in Xilinx FPGA ~300MHz General Rule of thumb 1 MHz of CPU per 1 Mbits of TCP PPC can t touch payload data bytes PPC can not produce or consume TCP payload So compression or any other byte touching operation is out 14 Getting the most TCP/IP from your Embedded Processor
15 What Limits TCP Performance? Supporting functions are source of most overhead TCP protocol processing is not to blame Research Papers: End-System Optimizations for High-Speed TCP TCP/IP at Near-Gigabit Speeds TCP Performance Re-Visited 15 Getting the most TCP/IP from your Embedded Processor
16 Classification of TCP/IP Overheads Per-Byte Overhead Data buffer copies Checksum calculation Per-Packet Overhead Interrupt overhead Buffer Management Protocol Processing Per-Connection Overhead More Opportunity for hardware to affect system performance 16 Getting the most TCP/IP from your Embedded Processor
17 Per-Byte vs. Per-Packet Overheads 17 Getting the most TCP/IP from your Embedded Processor
18 Per-Byte Overhead Sockets API uses buffer copying to queue user application data (user-to-kernel space) Current TCP stacks have zero-copy APIs For example, Linux has sendfile( ) Additional buffer copies are also required if Ethernet Interface s DMA engine restricts alignment of data buffers TCP checksum requires 16-bit calculations over header and payload data bytes 18 Getting the most TCP/IP from your Embedded Processor
19 Per-Packet Overhead CPU Interrupt Buffer Management Process Management RX and TX Interrupts impose high overhead Gigabit Ethernet 1518 byte frame transferred every 12us 3651 CPU cycles between frames (300Mhz CPU) 19 Getting the most TCP/IP from your Embedded Processor
20 Gigabit System Reference Design (XAPP536) Processor does not touch payload data TCP Zero-Copy software APIs Transmit and Receive Checksum offload in FPGA fabric DMA with Data Realignment Engine Multi Port Memory Controller Efficiently shares DDR SDRAM memory resource between processor and DMA devices Allows point-to-point connection between high bandwidth peripherals and memory no shared bus Getting started with GSRD: (XAPP536) 20 Getting the most TCP/IP from your Embedded Processor
21 Gigabit System Reference Design GSRD is an EDK-based reference system tuned for maximum TCP/IP performance GSRD uses custom IP blocks LocalLink Gigabit Ethernet MAC (LLGMAC, XAPP536) Communications DMA Controller (CDMAC, XAPP535) Multi Port Memory Controller (MPMC, XAPP535) TCP transmit rates as high as 780 Mbps Ideal for applications requiring high performance bridging between TCP/IP and user data interfaces 21 Getting the most TCP/IP from your Embedded Processor
22 Checksum Offload Implementation Processor incurs severe penalty for checksum computation Ethernet packet ingress to memory PPC extraction of header from memory Processing of header with software and data structures from memory Processed packet assembled in memory Egress of packet to the host Functionality can easily be offloaded into FPGA fabric Simple state machine implements and inserts the checksum logic Implemented in ~ 100 LUT s Software stack needs minor corresponding change Many TCP/IP stacks have pre-built support for checksum offload TX LocalLink DataStream TX FIFO MUX GMAC TX DMA Descriptor Checksum Compute Control Insert CSUM FIFO 22 Getting the most TCP/IP from your Embedded Processor
23 Transmit Performance Comparison With Checksum Offload Mbs Checksum in SW Checksum in HW GSRD 1.8X X Byte Packet 9000 Byte Packet - Zero Copy API, 1MB TCP Window - Treck TCP/IP Stack (Jumbo Frames) 23 Getting the most TCP/IP from your Embedded Processor
24 TCP Termination Challenges Summary Memory Bandwidth is important High bandwidth peripherals such as 1 Gigabit Ethernet Processor(s) instruction/data fetches PPC can t touch payload data bytes TCP Protocol Processing not to blame for low performance Supping functions like buffer copies, checksums, etc. are to blame 24 Getting the most TCP/IP from your Embedded Processor
25 Overview Introduction to TCP/IP Protocol Suite Embedded TCP/IP Applications TCP Termination Challenges TCP Acceleration Techniques 25 Getting the most TCP/IP from your Embedded Processor
26 Improving TCP TX Performance Reduce occurrence of per packet Overhead Decrease number of CPU generated packets TCP Segmentation Offload (TSO) CPU generates large TCP frames (64 KB) Hardware segments into smaller frames (1.5 KB) LLGMAC optionally coalesces received ACKs 26 Getting the most TCP/IP from your Embedded Processor
27 TX Performance Projections Linux Netperf Transmit Performance (Sendfile vs Non-sendfile) Sendfile Non-sendfile Poly. (Sendfile) Log. (Non-sendfile) Throughput ( Mbits/sec) Frame size ( bytes) 27 Getting the most TCP/IP from your Embedded Processor
28 TSO Algorithm (1) MAC HEADER IP HEADER TCP HEADER TCP PAYLOAD MAC HEADER IP HEADER TCP HEADER TCP PAYLOAD MAC HEADER IP HEADER TCP HEADER TCP PAYLOAD... MAC HEADER IP HEADER TCP HEADER TCP PAYLOAD LLGMAC uses TCP/IP frame header as template LLGMAC generates multiple standard sized frames 28 Getting the most TCP/IP from your Embedded Processor
29 Template TCP/IP Header MAC Header DESTINATION MAC ADDRESS 1 DESTINATION MAC ADDRESS SOURCE MAC ADDRESS 2 SOURCE MAC ADDRESS 3 ETHERNET-II TYPE VERS HLEN SERVICE TYPE IP Header 4 5 FLAGS TOTAL LENGTH IDENTIFICATION FRAGMENT OFFSET TIME TO LIVE PROTOCOL 6 HEADER CHECKSUM SOURCE IP ADDRESS 7 SOURCE IP ADDRESS DESTINATION IP ADDRESS 8 DESTINATION IP ADDRESS IP OPTIONS (IF ANY) 9 PADDING SOURCE PORT TCP Header 10 DESTINATION PORT SEQUENCE NUMBER 11 SEQUENCE NUMBER ACKNOWLEGEMENT NUMBER 12 ACKNOWLEGEMENT NUMBER HLEN RESERVED CODE BITS 13 WINDOW CHECKSUM 14 URGENT POINTER OPTIONS (IF ANY) 15 PADDING DATA Getting the most TCP/IP from your Embedded Processor
30 TSO Algorithm (2) false IP Total Length - change to new IP frame size IP Identification - generate new value IP Checksum - calculate IP header csum TCP Seq Number - increment by bytes sent TCP Checksum - calculate TCP csum TCP Flags - update based on rules i += frame_size; i == CPU_MTU Each generated frame 200 cycles of processing of assembly code 2uS at 100MHz FPGA Implementation FSM controlled data path -OR- Microprocessor in fabric IEEE Paper Deferred Segmentation for Wire-Speed Transmission of Large TCP Frames over Standard GbE networks 30 Getting the most TCP/IP from your Embedded Processor
31 TCP Acceleration Platform CDMAC LLGMAC RX1 LocalLink TX1 LocalLink RX_DMAC_IF HEADER STRIP TX_DMAC_ IF RX STATUS FIFO RX FIFO Protocol Control Engine Protocol Control Engine HEADER FIFO TX FIFO HEADER STRIP RX_GMAC_IF TX_GMAC_IF LogiCORE 1-Gigabit Ethernet MAC 31 Getting the most TCP/IP from your Embedded Processor
32 32 Getting the most TCP/IP from your Embedded Processor Appendix
33 Glossary Of Terms XPS: Xilinx Platform Studio. SW to design with Xilinx processors EDK: Bundling on XPS with Processor IP lwip: Light Weight Internet Protocol TCP/IP Stack IP: Intellectual Property, pre engineered blocks of logic implementing specific functions EMAC: Ethernet MAC GEMAC: Gigabit Ethernet MAC TEMAC: Tri-Mode Ethernet MAC GSRD Gigabit Ethernet Reference Design Protocol: A formal specification of how things should communicate. Think of it as the language used for networks to communicate with each other. OSI: Open Systems Interconnection. The standard model to describe how computer networks should work Transmission Control Protocol/Internet Protocol (TCP/IP) is a group or suite of protocols that is widely used in networking. The Internet uses TCP/IP. TCP Stack: Library of functions that implement various layers of the communication protocol in Software 33 Getting the most TCP/IP from your Embedded Processor
34 Virtex-4 Tri-Mode EMAC (TEMAC) Virtex4-FX devices include 2 or 4 dedicated TEMACs 10/100/1000 Mb/s with auto-detect Can be used standalone or with embedded PPC405 Seamless connection to MGT TX/RX Statistics gathering Jumbo Frame Support Processor can control the EMAC via Device Control Register* A memory mapped host interface UNH compliance tested Accessible through EDK Version 6.3i SP1 Processor Block Test APU Control Reset & Control DCR Control *DCR is part of IBM s CoreConnect Bus APU ISPLB DSPLB DCR ISOCM Control ISOC M 405 Core DSOCM DSOCM Control EMAC Block DCR I/F PHY I/F PHY I/F EMAC EMAC Client I/F Client I/F Statistics I/F Host Interface Statistics I/F 34 Getting the most TCP/IP from your Embedded Processor
35 Hard EMAC Frees Up Logic Resources In FPGA Logic Cells x GSRD Design in V-4 V 4 takes 15% less resources compared to Virtex-II Pro +25% +16% +15% +11% max Logic saved by EMACs Logic available in device 10 0 FX12 FX20 FX40 FX60 # of EMACs/device ** Comparison based on 1G PLB EMAC implementation; Higher savings realized when TEMAC features like Tri-speed, RGMII, SGMII, address match, multicast address table lookup are used 35 Getting the most TCP/IP from your Embedded Processor
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