POET Technologies Enabling the Future. Corporate Overview February 2015

Size: px
Start display at page:

Download "POET Technologies Enabling the Future. Corporate Overview February 2015"

Transcription

1 POET Technologies Enabling the Future Corporate Overview February 2015

2 Safe Harbor The following presentation, other than statements of historical fact, may include certain forward-looking statements within the meaning of the United States Private Litigation Reform Act of 1995 and applicable Canadian securities laws. These forward looking statements are made under the Safe Harbor provisions of the aforesaid act and laws. All statements regarding future plans and objectives are forward-looking statements. Words such as expect, anticipate, estimate, future plans, may, will, should, intend, believe, opportunities, and other similar expressions are forward-looking statements. Forward-looking statements are subject to risks, uncertainties, assumptions and are not guarantees of future results, but rather reflect current views with respect to future events. Important factors that could cause actual results to differ materially from those expressed or implied in the forward looking statements include risks and factors disclosed under the heading Risk Factors in the public documents filed from time to time with the System for Electronic Document Analysis and Retrieval ( SEDAR ). Readers should not place undue reliance on any forward-looking statements. We disclaim any obligation to update or revise any forward looking statements, except as required by law to reflect any change in expectations, events, conditions or circumstances on which any of the forward looking statements are based, or that may affect the likelihood that actual results will differ from those set forth in the forward-looking statements. 2

3 Corporate Introduction POET Technologies has created a revolutionary semiconductor technology ultimately replacing current siliconbased IC devices while delivering up to 90% power savings and dramatic performance gains in like applications. 3

4 Company Overview Who Is POET? POET Technologies, Inc., is a semiconductor technology development company Full and/or Exclusive IP Ownership Has been granted 34 patents with 7 additional patents pending Continues to drive IP pipeline Currently listed on the TSX Venture Exchange and OTC QX (US) Fully SEC compliant (20-F) Lab facilities at Storrs Connecticut. HQ in Toronto, Canada Background & Objectives POET provides revolutionary and disruptive III-V semiconductor process and device intellectual property (IP) Vs. existing technologies, POET enables: þ Increased performance þ Lower power consumption þ Novel devices with wider range of functionality in integrated solutions þ Lower system cost through device consolidation and power reduction POET will license process IP and generate revenue from fabs and customers 4

5 Management Team Peter Copetti Exec. Co-Chairman & Interim CEO Ajit Manocha Exec. Co-Chairman Dr. Geoffrey Taylor Chief Scientist Daniel DeSimone Chief Technology Officer Stephane Gagnon Chief Operating Officer Chief architect and strategist of POET transformation Leading POET s resurgence and monetization activities Capital markets expertise 35 years of semiconductor industry experience with deep knowledge of the technology and operations Most recently CEO of GlobalFoundries (Multi-Billions $US Revenues) Strategic direction advisor to the CEO Technology and IP generation pioneer and world renowned expert in GaAs and inventor of the POET platform POET technology development for over 20 years 30+ years of semiconductor development and fabrication experience Responsible for process IP product development 20+ years of semiconductor and telecom management experience Responsible for overall operations and business development 5

6 Dr. Geoff Taylor Chief Scientist Biography Professor of Electrical & Computer Engineering at the University of Connecticut Co-Founder & Chief Scientist of POET Technologies Inc. Has dedicated more than 25 years towards the development of a gallium arsenide (GaAs) semiconductor chip Began research on the GaAs semiconductor chip while working at Bell Laboratories in New Jersey Background in the areas of materials, devices and circuits for microelectronics 34+ patents issued and 150+ journal papers published B.Sc, Electrical Engineering, Queens University (1966) M.A.Sc, Electrical Engineering, University of Toronto (1968) Ph.D, Electrical Engineering, University of Toronto (1972) 6

7 Total Addressable Markets $120 $100 Global market is expected to reach $628 billion, according to MarketLine Integrated Circuit semiconductors is the leading market segment with 54% of overall market $80 $60 $40 $20 Global Electronic Component and Semiconductor Industry PC & Cellphone IC Markets ($Billions) Cellphone ICs! Tablet & Other PC ICs! Standard PC ICs! $119 $102 Specific Market TAM Examples Cellphone ICs ($119 billion 2016F) Standard PC and Tablets ICs ($102 billion 2016F) MOS Memories: DRAM, SRAM and Flash ($89.3 billion 2016F) General Purpose Logic ($108 billion 2016F) Sensors and Actuators ($13 billion 2016F) Source: IC Insights $ E 2014E 2015E 2016E Example of POET s addressable market: PC & Cellphone IC market is growing to over $220 billion by 2016 Source: IC Insight 7

8 The Problem Silicon node migration is hitting physical barriers: Silicon clock speed is flattening out Power is flattening out with silicon Performance / clock is flattening with silicon Chip tapeout Non Recurring Engineering (NRE) costs are escalating geometrically with node Source: Herb Sutter, The Free Lunch Is Over: A Fundamental Turn Toward Concurrency in Software, Dr. Dobb s Journal, 30(3), March 2005 (graph updated in 2009) 8

9 The Solution Change the Semiconductor Material III-V transistors perform at least 5X better than Si based transistors at same node. Our projection is that logic performance in our technology should be equivalent to a 3 to 4 node jump in Si technology III-V transistors also make much better analog circuitry which results in far superior mixed signal performance that is key to today s SoCs III-V materials make for excellent photonic devices Plus INTEGRATE Novel and Disruptive Capabilities New active and passive optical devices to overcome on- and off-chip interconnect limitations of current Silicon CMOS solutions Novel OE bipolar transistor and thyristor action without stored charge enables very high speeds PLUS act as photo detectors and emitters New applications made possible by novel devices and integration Optoelectronic functions implemented as co-packaged discrete devices replaced with single integrated device POET will enable integration at lower manufacturing costs 9

10 Semiconductor Industry Value Chain Investment costs to keep up with semiconductor performance demand are increasingly high, and few Fab vendors can afford to keep up The integrated model is prohibitively high in today s market Raw Materials Semiconductor Design Semiconductor Manufacturing Packaging Assembly & Testing End Products Fabless Design TCAD Foundry Outsourced Assembly & Testing OEMs Software allowing foundries to read design recipes POET can make use of the existing semiconductor manufacturing infrastructure 10

11 Inventions and Process IP POET - Planar Opto-Electronic Technology PET - Electrical only Technology Extremely low power -- 4 nodes ahead of Silicon CMOS - PET & POET offer V operation vs 0.8V in Silicon CMOS High performance applications Up to 10x faster than current technologies Multiple optical colors at rates of up to 50 Gbps per color Main Inventions Never before realized in GaAs First GaAs process technology to support integrated HFETs and HBTs (complementary logic) - New GaAs p and n HFET devices - New GaAs p and n HBT devices POET Applications Digital Mixed mode Analog High voltage Optical PET Applications Digital Mixed signal Analog Supports concurrent fabrication of fully integrated electrical and optical circuit components - New GaAs Optical Thyristor device 11

12 Process Characteristics POET (Planar Opto-Electronic Technology) is a novel III-V compound semiconductor process technology which utilizes InGaAs modulation doped Quantum Wells First GaAs process technology to support complementary HFETs enabling significant static power savings compared to bipolar or active load compound semiconductor processes in use today POET supports concurrent fabrication of a full range of highly efficient electrical and optical circuit components on a single die in a single process Provides density similar to traditional Silicon CMOS Provides dramatically reduced switching and non-switching power consumption compared to silicon technologies Compatible with existing and planned package technology Standard wafer epitaxy techniques and equipment Standard lithography-based fabrication techniques and equipment Provides traditional GaAs compound semiconductor electrical and optical performance capabilities Supports fabrication of vertical and horizontal laser cavities 12

13 Value Proposition for Foundry Partner Increase serviceable addressable markets (SAM) by offering - Speed and power upgrades for high speed digital offering - Photonics - Analog, Mixed Signals, Digital and optical integration capabilities - Universal memory cell (NVRAM, DRAM and SRAM) - Radiation Hardness - IGBT implementation for power applications/epitaxy in GaN PET and POET process will match power/performance roadmap 3-4 node sizes ahead of Silicon CMOS - Extends Moore s laws for foundries at much lower R&D and new investments costs - Lowers tapeout costs for fabless customers (see comparisons on slides 4 & 5) Roadmap to integration of QUBIT blocks with conventional logic for Quantum Computing future application 13

14 Value Proposition for Datacenter Key Value Proposition Significant server farm computational efficiency savings True acceleration of single-thread computing at higher clock frequencies with lower power Novel system partitioning, reducing electrical noise and power, utilizing chip to chip optical interconnect capable of 50 gbps per I/O (DWDM capable) POET enables on-chip coexistence of analog, digital, optical, and mixed-signal functions Full on-device optical circuit capability, same-die same PIC (Photonic Integrated Circuit) capable process Denser and lower noise designs are now possible using multi-color optical generation and global distribution of signals (e.g. clocks) Lower operating voltage provides reduced power even at higher clock rates Advanced optical capabilities, novel system interconnect via chip to chip optical, onchip and inter-chip switching fabric, optical computing are all possible with POET 14

15 Universal Memory Cell Memory architecture simplification of datacenter representing huge costs savings POET supports a high speed, very high density thyristor-based universal memory cell A single memory array can be operated as an SRAM, a DRAM, or NVRAM depending on controller configuration NVRAM capability is phase-change type so no write-based device reliability issues like NAND flash Can eliminate need for dedicated NVRAM for system backup and recovery since all embedded memories already have NVRAM capability Density comparable to leading edge DRAM, and much higher than existing SRAM, NAND flash, NOR flash, or PCRAM technologies Wide band gap material provides much higher noise immunity than Silicon-based technologies (several orders of magnitude improvement in soft error rates) 15

16 Application Examples vs. POET Capabilities Analog and Digital Processors and SoCs Optical Applications Data Centers Servers High Performance and Power step function Low voltage operation è V Analog and Mixed signal integration of arbitrary functions CCD imaging, visible and IR Applicable at all geometry levels from 3u to sub 28nm TJ solar cell integrated with power control for all mobile systems Enabling microprocessor design at > 20GHz Memory structures for NVRAM, SRAM and DRAM Enabling Opto-Electronic designs on the same die Optical Components VCSELs, 2D VCSEL arrays with integrated drivers High speed tunable lasers with integrated drivers TW detectors, SOA s, modulators with electronics 3D Packaging electrical and optical 16

17 Manageable adoption for Industry Partners Fabless Design TCAD Design Industry standard design tool flows Addresses multiple process nodes Low adoption cost Foundry Outsourced Assembly & Testing Manufacturing and Testing Supports existing manufacturing and testing infrastructure Employs all existing test on wafers techniques Supports existing Silicon CMOS post fabrication procedures OEMs Performance and Integration Up to 90% solution power savings versus existing technologies Low core voltage operations possible down to 300mV Supports electrical devices switching at over 500 GHz 17

18 Monetization Strategy Direct Foundry NRE Paid by foundries for POET to transfer and enable their foundry with PET/POET flow Replaces R&D $$$ they would have spent on developing this capability in-house Foundry Design KIT Flow-through NRE Royalties Percentage of the POET foundry design kit revenue from foundries that develop libraries and specific design kits targeting the POET process that they will sell to their customers Market Leaders NRE Industry leaders in specific markets to buy exclusivity rights - Lock in POET IP keeping their competition out from using POET IP Semiconductor Chip Sales Royalties Royalties on future semiconductor chip sale POET enabled from the foundry flow Initial NRE revenues expected to start in 2H2015 End customer NRE, Foundry NREs, or a combination thereof 18

19 Synopsys TCAD and Enablement POET Process Design Kit (PDK) Development POET and Synopsys are collaborating on the deployment of Sentaurus TCAD for the PDK project Synopsys Sentaurus Process and Device TCAD software is used to accelerate development of a POET PDK for technology transfers to potential manufacturing partners Process parameters and device design are optimized for manufacturability and performance Calibration to measured structures ensures and verifies quality and accuracy of the technology description minimizing process transfer qualification time POET PDK Development TCAD is also used to provide a pre-fabrication PDK suitable for design exploration Allows early stage exploration for System on a Chip (SoC) and optical interconnect architectures leveraging unique functionality and performance of novel POET/PET technologies 19

20 Achieved Technical Milestones Milestone! Date! Technical Achievement! Definitions! Q2-11! Integrated Pulsed Laser" General purpose laser for on-chip use." Q2-11! Q4-12! Q1-13! Q1-14! Q2-13! Q1-14! Q3-14! p and n channel Complementary Heterostructure Field Effect Transistor Validation 1" Continuous Wave Vertical Cavity Surface Emitting Laser Demonstration" n-channel and p-channel Complementary Heterostructure Field Effect Transistor Radio Frequency Validation 1 3/4 Terminal Switching Laser Demonstration" Complementary Heterostructure Field Effect Transistorbased Inverter/Oscillator Demonstration" Optical Thyristor-based Infrared Detector Array Fabrication and Validation 1" Demonstration of 100 nm or below PET n- and p- channel device" High performance, power efficient transistors. World s first complementary GaAs HFETs." High density laser design for surface-emitting applications (e.g. chip-to-chip in stacked-die array)." Demonstrating radio frequency and microwave performance of revolutionary complementary HFETs." High quality pulsed laser type for critical signal propagation (e.g. clocks, optical line signaling)." Complementary HFET-based ring oscillator (standard circuit configuration used to demonstrate process performance)." An array of optical thyristors configured as infrared detectors." Demonstration of p and n type HFETs and BJTs at sub-100 nm feature size." Performance optimization phase on-going." Q1-14! POET TDK (Technical Design Kit) Documentation" Full POET platform TDK documentation release." Note 1: Milestones noted above were accomplished with a 3 rd party fab partner, an international defense services company that is a global leader in military electronic systems design, development, manufacturing and integration. The 3rd party partner has world-class GaAs research facilities and has numerous PhD researchers. POET s partnership has successfully reproduced the POET technology as published, by producing and testing the critical electrical elements of POET Platform sub-process steps for transistors. 20

21 Future Technical Milestones and 2015 Roadmap Milestone Timeframe* Technical Milestone Defini4ons Q1-15 Completed PET Founda+on PDK (Process Design Kit) targe+ng 40nm (V 1.0) 3 rd Party Foundry 40/100nm transfer Design rules and parameters library models for PET process. Devices include complementary HFET and HBT transistor and a thyristor with both op+cal and electrical opera+on. Bring up cri+cal layers manufacturing capability in external foundry. Accelerates comple+on of development and op+miza+on learning cycles on 100 and 40nm structures. Also enables more complex test structures. Q1-15 Electrical 100nm ring oscillator Demonstra+on vehicle for high speed performance and power at 100nm process node. Reference standard to compare to Silicon CMOS. Q GHz VCSEL 50 GHz DWDM (dense wavelength division mul+plexing) ver+cal cavity laser device Milestone Timeframe* Capability Development! Roadmap Definitions! 2015 PET PDK v2.0 Adds mixed signal and I/O capability Op+cal On- Chip Signal Distribu+on Components SRAM Structure Demonstra+on Digital Cell Library Adds high frequency low noise devices for analog and 2.5V HEMTs for electrical I/O to the PET PDK. Update PDK with new devices and calibra+on. Develop and successful demonstra+on of individual components necessary to build WDM op+cal distribu+on and conversion from E- O and O- E. Develop and successful demonstra+on of 2T thyristor- based bit cell, read and write amps. Goal of layout density greater than equivalent CMOS bit cell at same node. Create basic set of digital cells suitable for trial SoC block post layout performance evalua+on. * Note: Please see Milestone Disclaimer on the next page 21

22 Milestone Disclaimer The Milestone schedule contained in this presentation was prepared in good faith; however, the Company does not warrant that it will achieve any results projected in this presentation. This presentation contains "forward-looking information" (within the meaning of applicable Canadian securities laws) and "forward -looking statements" (within the meaning of the U.S. Private Securities Litigation Reform Act of 1995). Such statements include all aspects of the milestones scheduled to be performed after the date of this presentation. Such forward-looking information or statements are based on a number of risks, uncertainties and assumptions which may cause actual results or other expectations to differ materially from those anticipated and which may prove to be incorrect. Assumptions have been made regarding, among other things, plans for and completion of projects by the Company s third party relationships, availability of capital, and the necessity to incur capital and other expenditures. Actual results could differ materially due to a number of factors, including, without limitation, operational risks in the completion of the Company s anticipated projects, delays or changes in plans with respect to the development of the Company s anticipated projects by the Company s third party relationships, risks affecting the Company s ability to execute projects, the ability to attract and retain key personnel, and the inability to raise additional capital. Although the Company believes that the expectations reflected in the forward-looking information or statements are reasonable, you should not place undue reliance on forward-looking statements because the Company can provide no assurance that such expectations will prove to be correct. Forward- looking information and statements contained in this presentation are as of the date of this presentation and the Company assumes no obligation to update or revise this forward-looking information and statements except as required by law. 22

23 Operational Roadmap Expansion of POET Lab Facility into a 3 rd Party Fab Provides POET with operational backup plan (disaster relief) Increase the capacity of our R&D process and device IP development Replication and transfer of current process at a larger scale Multi-wafer and multi-lot Automated production manufacturing with concurrent development capability ISO Certified Facility 3 and 6 wafer sizes capabilities Packaging, package and wafer level automated test capabilities Prototyping capability at 100-nm critical features with a goal to reduce to 40-nm 23

24 Summary POET - Ready at the right time Silicon CMOS evolution is ending POET will provide a much needed performance and power correction to Moore s Law Industry s doubt that Silicon CMOS nodes of 10 and 7nm will succeed Industry is ready for a paradigm shift for the fabrication of complementary logic semiconductor devices POET enables new innovations POET enables mixing on the same chip analog, digital and optical devices that will lead to new innovative products and device consolidation never before possible POET offers a III-V process with very high performance gains over Silicon CMOS POET low voltage operation enables up to a 90% application power savings POET enables system cost savings Possible device consolidation will lower manufacturing costs at the module and system level POET will enable much lower system OPEX due to application power savings 24

Implementation of Short Reach (SR) and Very Short Reach (VSR) data links using POET DOES (Digital Opto- electronic Switch)

Implementation of Short Reach (SR) and Very Short Reach (VSR) data links using POET DOES (Digital Opto- electronic Switch) Implementation of Short Reach (SR) and Very Short Reach (VSR) data links using POET DOES (Digital Opto- electronic Switch) Summary POET s implementation of monolithic opto- electronic devices enables the

More information

State-of-Art (SoA) System-on-Chip (SoC) Design HPC SoC Workshop

State-of-Art (SoA) System-on-Chip (SoC) Design HPC SoC Workshop Photos placed in horizontal position with even amount of white space between photos and header State-of-Art (SoA) System-on-Chip (SoC) Design HPC SoC Workshop Michael Holmes Manager, Mixed Signal ASIC/SoC

More information

Development Background

Development Background Safe Harbor The following presentation, other than statements of historical fact, may include certain forward-looking statements within the meaning of the United States Private Litigation Reform Act of

More information

POET TECHNOLOGIES INC.

POET TECHNOLOGIES INC. POET TECHNOLOGIES INC. Management s Discussion and Analysis Year ended December 31, 2014 TABLE OF CONTENTS Forward Looking Statements... 1 Business Overview. 1 Industry Outlook.. 3 Key Success Drivers

More information

Corporate Presentation March 2014

Corporate Presentation March 2014 Corporate Presentation March 2014 Safe Harbor The following presentation, other than statements of historical fact, may include certain forward-looking statements within the meaning of the United States

More information

POET TECHNOLOGIES INC.

POET TECHNOLOGIES INC. POET TECHNOLOGIES INC. Management s Discussion and Analysis 9-months ended September 30, 2014 TABLE OF CONTENTS Forward Looking Statements. 1 Business Overview. 1 a) Semiconductor Technology. 2 Industry

More information

OPEL Solar International Inc. NEWS RELEASE. OPEL Announces Third Party Valuation of its POET Technology

OPEL Solar International Inc. NEWS RELEASE. OPEL Announces Third Party Valuation of its POET Technology NEWS RELEASE OPEL Announces Third Party Valuation of its POET Technology OPEL Solar International Inc. Head Office: Operations Office: Suite 501, 121 Richmond Street West 3 Corporate Drive, Suite 204 Toronto,

More information

L innovazione tecnologica dell industria italiana verso la visione europea del prossimo futuro

L innovazione tecnologica dell industria italiana verso la visione europea del prossimo futuro L innovazione tecnologica dell industria italiana verso la visione europea del prossimo futuro Mercoledì 2 Aprile 2014 Antonio D Errico, Francesco Testa, Roberto Sabella, Ericsson Silicon Photonics Opportunities

More information

ASML 2011 Third Quarter Results Confirming expectation for record sales year Oct 12, 2011

ASML 2011 Third Quarter Results Confirming expectation for record sales year Oct 12, 2011 ASML 2011 Third Quarter Results Confirming expectation for record sales year Oct 12, 2011 / Slide 1 Safe Harbor "Safe Harbor" Statement under the US Private Securities Litigation Reform Act of 1995: the

More information

A Career that Revolutionises & Improves Lives

A Career that Revolutionises & Improves Lives OPTION GROUP B ELECTRONIC ENGINEERING presented by K Radha Krishnan Associate Professor, EEE 25 February 2015 1 A Career that Revolutionises & Improves Lives Scientists investigate that which already is,

More information

Mellanox / IPtronics Investor Presentation

Mellanox / IPtronics Investor Presentation Mellanox / IPtronics Investor Presentation Eyal Waldman President and CEO (Mellanox) Jacob Shulman Chief Financial Officer (Mellanox) Niels Finseth- Co-Founder and CEO (IPtronics) Safe Harbor Statement

More information

Agenda. Michele Taliercio, Il circuito Integrato, Novembre 2001

Agenda. Michele Taliercio, Il circuito Integrato, Novembre 2001 Agenda Introduzione Il mercato Dal circuito integrato al System on a Chip (SoC) La progettazione di un SoC La tecnologia Una fabbrica di circuiti integrati 28 How to handle complexity G The engineering

More information

1.1 Silicon on Insulator a brief Introduction

1.1 Silicon on Insulator a brief Introduction Table of Contents Preface Acknowledgements Chapter 1: Overview 1.1 Silicon on Insulator a brief Introduction 1.2 Circuits and SOI 1.3 Technology and SOI Chapter 2: SOI Materials 2.1 Silicon on Heteroepitaxial

More information

Recent developments in high bandwidth optical interconnects. Brian Corbett. www.tyndall.ie

Recent developments in high bandwidth optical interconnects. Brian Corbett. www.tyndall.ie Recent developments in high bandwidth optical interconnects Brian Corbett Outline Introduction to photonics for interconnections Polymeric waveguides and the Firefly project Silicon on insulator (SOI)

More information

7a. System-on-chip design and prototyping platforms

7a. System-on-chip design and prototyping platforms 7a. System-on-chip design and prototyping platforms Labros Bisdounis, Ph.D. Department of Computer and Communication Engineering 1 What is System-on-Chip (SoC)? System-on-chip is an integrated circuit

More information

Semiconductor design Outsourcing: Global trends and Indian perspective. Vasudevan A Date: Aug 29, 2003

Semiconductor design Outsourcing: Global trends and Indian perspective. Vasudevan A Date: Aug 29, 2003 Semiconductor design Outsourcing: Global trends and Indian perspective Vasudevan A Date: Aug 29, 2003 Role of Semiconductors in Products Source: IC Insights Semiconductor content in end product increasing

More information

Nanotechnologies for the Integrated Circuits

Nanotechnologies for the Integrated Circuits Nanotechnologies for the Integrated Circuits September 23, 2015 Dr. Bertrand Cambou Professor of Practice NAU, Cybersecurity School of Informatics, Computing, and Cyber-Systems Agenda The Market Silicon

More information

Data center day. a silicon photonics update. Alexis Björlin. Vice President, General Manager Silicon Photonics Solutions Group August 27, 2015

Data center day. a silicon photonics update. Alexis Björlin. Vice President, General Manager Silicon Photonics Solutions Group August 27, 2015 a silicon photonics update Alexis Björlin Vice President, General Manager Silicon Photonics Solutions Group August 27, 2015 Innovation in the data center High Performance Compute Fast Storage Unconstrained

More information

Hi, we re. October 2015 Investor Presentation

Hi, we re. October 2015 Investor Presentation Hi, we re October 2015 Investor Presentation Disclaimer THIS PRESENTATION IS NOT A PROSPECTUS NOR AN OFFER FOR SECURITIES IN ANY JURISDICTION NOR A SECURITIES RECOMMENDATION. THE INFORMATION IN THIS PRESENTATION

More information

Intel Labs at ISSCC 2012. Copyright Intel Corporation 2012

Intel Labs at ISSCC 2012. Copyright Intel Corporation 2012 Intel Labs at ISSCC 2012 Copyright Intel Corporation 2012 Intel Labs ISSCC 2012 Highlights 1. Efficient Computing Research: Making the most of every milliwatt to make computing greener and more scalable

More information

A Look Inside Smartphone and Tablets

A Look Inside Smartphone and Tablets A Look Inside Smartphone and Tablets Devices and Trends John Scott-Thomas TechInsights Semicon West July 9, 2013 Teardown 400 phones and tablets a year Four areas: Customer Focus Camera Display Manufacturer

More information

EEM870 Embedded System and Experiment Lecture 1: SoC Design Overview

EEM870 Embedded System and Experiment Lecture 1: SoC Design Overview EEM870 Embedded System and Experiment Lecture 1: SoC Design Overview Wen-Yen Lin, Ph.D. Department of Electrical Engineering Chang Gung University Email: wylin@mail.cgu.edu.tw Feb. 2013 Course Overview

More information

Static-Noise-Margin Analysis of Conventional 6T SRAM Cell at 45nm Technology

Static-Noise-Margin Analysis of Conventional 6T SRAM Cell at 45nm Technology Static-Noise-Margin Analysis of Conventional 6T SRAM Cell at 45nm Technology Nahid Rahman Department of electronics and communication FET-MITS (Deemed university), Lakshmangarh, India B. P. Singh Department

More information

Midwest Investment Conference

Midwest Investment Conference June 22 2016 Midwest Investment Conference Lee D. Rudow President and CEO Michael J. Tschiderer Chief Financial Officer 1 Safe Harbor Statement This presentation contains forward looking statements within

More information

Advanced Materials & Technologies for the Solar and Semiconductor industry. The Merger of Two Leading Technology Companies

Advanced Materials & Technologies for the Solar and Semiconductor industry. The Merger of Two Leading Technology Companies Advanced Materials & Technologies for the Solar and Semiconductor industry The Merger of Two Leading Technology Companies ABOUT US HPQT is being created from the combination of Magnolia Solar and Solar

More information

Area 3: Analog and Digital Electronics. D.A. Johns

Area 3: Analog and Digital Electronics. D.A. Johns Area 3: Analog and Digital Electronics D.A. Johns 1 1970 2012 Tech Advancements Everything but Electronics: Roughly factor of 2 improvement Cars and airplanes: 70% more fuel efficient Materials: up to

More information

Intel s Revolutionary 22 nm Transistor Technology

Intel s Revolutionary 22 nm Transistor Technology Intel s Revolutionary 22 nm Transistor Technology Mark Bohr Intel Senior Fellow Kaizad Mistry 22 nm Program Manager May, 2011 1 Key Messages Intel is introducing revolutionary Tri-Gate transistors on its

More information

Volumes. Goal: Drive optical to high volumes and low costs

Volumes. Goal: Drive optical to high volumes and low costs First Electrically Pumped Hybrid Silicon Laser Sept 18 th 2006 The information in this presentation is under embargo until 9/18/06 10:00 AM PST 1 Agenda Dr. Mario Paniccia Director, Photonics Technology

More information

Windows Embedded Security and Surveillance Solutions

Windows Embedded Security and Surveillance Solutions Windows Embedded Security and Surveillance Solutions Windows Embedded 2010 Page 1 Copyright The information contained in this document represents the current view of Microsoft Corporation on the issues

More information

Introduction to Silicon Labs. November 2015

Introduction to Silicon Labs. November 2015 Introduction to Silicon Labs November 2015 1 Company Background Global mixed-signal semiconductor company Founded in 1996; public since 2000 (NASDAQ: SLAB) >1,100 employees and 11 R&D locations worldwide

More information

MSPP, MSTP and MSSP Network Elements. What s the Difference and Do We Need All of this Terminology?

MSPP, MSTP and MSSP Network Elements. What s the Difference and Do We Need All of this Terminology? MSPP, MSTP and MSSP Network Elements What s the Difference and Do We Need All of this Terminology? Introduction Carriers have successfully deployed legacy SONET NEs in North America for the past 15 years.

More information

White Paper: Pervasive Power: Integrated Energy Storage for POL Delivery

White Paper: Pervasive Power: Integrated Energy Storage for POL Delivery Pervasive Power: Integrated Energy Storage for POL Delivery Pervasive Power Overview This paper introduces several new concepts for micro-power electronic system design. These concepts are based on the

More information

The 50G Silicon Photonics Link

The 50G Silicon Photonics Link The 50G Silicon Photonics Link The world s first silicon-based optical data connection with integrated lasers White Paper Intel Labs July 2010 Executive Summary As information technology continues to advance,

More information

EEC 119B Spring 2014 Final Project: System-On-Chip Module

EEC 119B Spring 2014 Final Project: System-On-Chip Module EEC 119B Spring 2014 Final Project: System-On-Chip Module Dept. of Electrical and Computer Engineering University of California, Davis Issued: March 14, 2014 Subject to Revision Final Report Due: June

More information

Enablence Technologies announces several strategic milestones and provides a business update, including financing

Enablence Technologies announces several strategic milestones and provides a business update, including financing Enablence Technologies announces several strategic milestones and provides a business update, including financing Toronto, Canada October 15, 2012 - Enablence Technologies Inc. ( Enablence or the Company

More information

ASML reports Q3 results as guided and remains on track for record 2015 sales Two new lithography scanners launched

ASML reports Q3 results as guided and remains on track for record 2015 sales Two new lithography scanners launched ASML reports Q3 results as guided and remains on track for record 2015 sales Two new lithography scanners launched ASML 2015 Third Quarter Results Veldhoven, the Netherlands Forward looking statements

More information

Introduction to Digital System Design

Introduction to Digital System Design Introduction to Digital System Design Chapter 1 1 Outline 1. Why Digital? 2. Device Technologies 3. System Representation 4. Abstraction 5. Development Tasks 6. Development Flow Chapter 1 2 1. Why Digital

More information

Dialog Semiconductor Q4 and FY 2011 Financial Results 22 February 2012

Dialog Semiconductor Q4 and FY 2011 Financial Results 22 February 2012 Dialog Semiconductor Q4 and FY 2011 Financial Results 22 February 2012 Forward Looking Statements This presentation contains forward-looking statements that reflect management s current views with respect

More information

Flash Technology Update from Micron and Intel

Flash Technology Update from Micron and Intel Flash Technology Update from Micron and Intel 3D NAND Technology Announcement Brian Shirley, Vice President, Memory and Technology Solutions, Micron Technology Scott DeBoer, Vice President, Research and

More information

Figure 1. New Wafer Size Ramp Up as a Percentage of World Wide Silicon Area Versus Years Elapsed Since the New Size Was Introduced [1].

Figure 1. New Wafer Size Ramp Up as a Percentage of World Wide Silicon Area Versus Years Elapsed Since the New Size Was Introduced [1]. White Paper Forecasting the 45mm Ramp Up IC Knowledge LLC, PO Box 2, Georgetown, MA 1833 Tx: (978) 352 761, Fx: (978) 352 387, email: info@icknowledge.com Introduction The introduction and ramp up of 45mm

More information

DEVELOPMENTS & TRENDS IN FEOL MATERIALS FOR ADVANCED SEMICONDUCTOR DEVICES Michael Corbett mcorbett@linx-consulting.com Semicon Taiwan2015

DEVELOPMENTS & TRENDS IN FEOL MATERIALS FOR ADVANCED SEMICONDUCTOR DEVICES Michael Corbett mcorbett@linx-consulting.com Semicon Taiwan2015 DEVELOPMENTS & TRENDS IN FEOL MATERIALS FOR ADVANCED SEMICONDUCTOR DEVICES Michael Corbett mcorbett@linx-consulting.com Semicon Taiwan2015 LINX BACKGROUND Linx Consulting 1. We help our clients to succeed

More information

BUILD VERSUS BUY. Understanding the Total Cost of Embedded Design. www.ni.com/buildvsbuy

BUILD VERSUS BUY. Understanding the Total Cost of Embedded Design. www.ni.com/buildvsbuy BUILD VERSUS BUY Understanding the Total Cost of Embedded Design Table of Contents I. Introduction II. The Build Approach: Custom Design a. Hardware Design b. Software Design c. Manufacturing d. System

More information

Craig-Hallum Alpha Select Conference. October 2011

Craig-Hallum Alpha Select Conference. October 2011 Craig-Hallum Alpha Select Conference October 2011 Forward Looking Statements Except for historical information, statements made in the course of this presentation that state the company s or management

More information

International Journal of Electronics and Computer Science Engineering 1482

International Journal of Electronics and Computer Science Engineering 1482 International Journal of Electronics and Computer Science Engineering 1482 Available Online at www.ijecse.org ISSN- 2277-1956 Behavioral Analysis of Different ALU Architectures G.V.V.S.R.Krishna Assistant

More information

8 Gbps CMOS interface for parallel fiber-optic interconnects

8 Gbps CMOS interface for parallel fiber-optic interconnects 8 Gbps CMOS interface for parallel fiberoptic interconnects Barton Sano, Bindu Madhavan and A. F. J. Levi Department of Electrical Engineering University of Southern California Los Angeles, California

More information

Complete ASIC & COT Solutions 1986-2008

Complete ASIC & COT Solutions 1986-2008 Complete ASIC & COT Solutions 1986-2008 www.avnet-asic.com Nadav Ben-Ezer Managing Director 1 March 5th, 2008 Core Business ASIC/SoC Design and Implementation RTL Design Sub-system IP Integration RTL to

More information

THE NEXT FRONTIER IN COMPUTING QUANTUM OPTICAL COMPUTING. Presentation For Venture Capital Investment

THE NEXT FRONTIER IN COMPUTING QUANTUM OPTICAL COMPUTING. Presentation For Venture Capital Investment THE NEXT FRONTIER IN COMPUTING QUANTUM OPTICAL COMPUTING Presentation For Venture Capital Investment Dr. Brian Antao, CEO and Founder tundrasystems.eu 1 OPTICONDUCTORS: THE FUTURE OF SEMICONDUCTORS Mission:

More information

Investor Presentation June 2016

Investor Presentation June 2016 A global leader powered by engineered material solutions that fully satisfy our customers Investor Presentation June 2016 Our Technologies for Tomorrow s Innovations www.ii vi.com NASDAQ: IIVI Safe Harbor

More information

NVM memory: A Critical Design Consideration for IoT Applications

NVM memory: A Critical Design Consideration for IoT Applications NVM memory: A Critical Design Consideration for IoT Applications Jim Lipman Sidense Corp. Introduction The Internet of Things (IoT), sometimes called the Internet of Everything (IoE), refers to an evolving

More information

Computer Systems Structure Main Memory Organization

Computer Systems Structure Main Memory Organization Computer Systems Structure Main Memory Organization Peripherals Computer Central Processing Unit Main Memory Computer Systems Interconnection Communication lines Input Output Ward 1 Ward 2 Storage/Memory

More information

SEMICONDUCTOR INDUSTRY ASSOCIATION FACTBOOK

SEMICONDUCTOR INDUSTRY ASSOCIATION FACTBOOK SEMICONDUCTOR INDUSTRY ASSOCIATION FACTBOOK The data included in the 2014 SIA Factbook helps demonstrate the strength and promise of the U.S. semiconductor industry and why it is critical for policymakers

More information

Embedded Systems: Technologies and Markets

Embedded Systems: Technologies and Markets Jan 2012 IFT016D Use this report to: Understand the market for embedded technology through 2015, considering macroeconomic factors and dynamics of the markets for various end products. Gain an understanding

More information

We know how to write nanometer. extreme lithography. extreme lithography. xlith Gesellschaft für Hochauflösende Lithografie Support & Consulting mbh

We know how to write nanometer. extreme lithography. extreme lithography. xlith Gesellschaft für Hochauflösende Lithografie Support & Consulting mbh extreme lithography extreme lithography xlith Gesellschaft für Hochauflösende Lithografie Support & Consulting mbh Wilhelm-Runge-Str. 11 89081 Ulm Germany phone +49 731 505 59 00 fax +49 731 505 59 05

More information

The SA601: The First System-On-Chip for Guitar Effects By Thomas Irrgang, Analog Devices, Inc. & Roger K. Smith, Source Audio LLC

The SA601: The First System-On-Chip for Guitar Effects By Thomas Irrgang, Analog Devices, Inc. & Roger K. Smith, Source Audio LLC The SA601: The First System-On-Chip for Guitar Effects By Thomas Irrgang, Analog Devices, Inc. & Roger K. Smith, Source Audio LLC Introduction The SA601 is a mixed signal device fabricated in 0.18u CMOS.

More information

Solid State Electronics and Photonics Electrical and Computer Engineering The Ohio State University

Solid State Electronics and Photonics Electrical and Computer Engineering The Ohio State University Solid State Electronics and Photonics Electrical and Computer Engineering The Ohio State University An Overview for Prospective Students http://www.ece.osu.edu/ssep SSEP Area: Who Are We? First Row Betty

More information

Riding silicon trends into our future

Riding silicon trends into our future Riding silicon trends into our future VLSI Design and Embedded Systems Conference, Bangalore, Jan 05 2015 Sunit Rikhi Vice President, Technology & Manufacturing Group General Manager, Intel Custom Foundry

More information

K&S to Acquire Assembléon Transaction Overview

K&S to Acquire Assembléon Transaction Overview K&S to Acquire Assembléon Transaction Overview Safe Harbor Statement In addition to historical statements, this presentation and oral statements made in connection with it may contain statements relating

More information

ECE 410: VLSI Design Course Introduction

ECE 410: VLSI Design Course Introduction ECE 410: VLSI Design Course Introduction Professor Andrew Mason Michigan State University Spring 2008 ECE 410, Prof. A. Mason Lecture Notes Page i.1 Age of electronics microcontrollers, DSPs, and other

More information

MMIC Design and Technology. Fabrication of MMIC

MMIC Design and Technology. Fabrication of MMIC MMIC Design and Technology Fabrication of MMIC Instructor Dr. Ali Medi Substrate Process Choice Mobility & Peak Velocity: Frequency Response Band-Gap Energy: Breakdown Voltage (Power-Handling) Resistivity:

More information

The Fastest Path to the Cloud Building Your SaaS Company on Force.com

The Fastest Path to the Cloud Building Your SaaS Company on Force.com The Fastest Path to the Cloud Building Your SaaS Company on Force.com Kai Mäkelä salesforce.com kmakela@salesforce.com Safe Harbor Safe harbor statement under the Private Securities Litigation Reform Act

More information

Advanced Test Equipment Can Shorten TIme To Market For New Fiber Optic Communication Gear. Raj Nair Keithley Instruments Inc.

Advanced Test Equipment Can Shorten TIme To Market For New Fiber Optic Communication Gear. Raj Nair Keithley Instruments Inc. Advanced Test Equipment Can Shorten TIme To Market For New Fiber Optic Communication Gear Raj Nair Keithley Instruments Inc. The recent battering of optical network and related stocks, along with those

More information

FPGAs in Next Generation Wireless Networks

FPGAs in Next Generation Wireless Networks FPGAs in Next Generation Wireless Networks March 2010 Lattice Semiconductor 5555 Northeast Moore Ct. Hillsboro, Oregon 97124 USA Telephone: (503) 268-8000 www.latticesemi.com 1 FPGAs in Next Generation

More information

AIXTRON Investor Presentation. Fiscal Year 2014 Results (February 24, 2015)

AIXTRON Investor Presentation. Fiscal Year 2014 Results (February 24, 2015) AIXTRON Investor Presentation Fiscal Year 2014 Results (February 24, 2015) DISCLAIMER Forward-Looking Statements 2 This document may contain forward-looking statements regarding the business, results of

More information

Testing of Digital System-on- Chip (SoC)

Testing of Digital System-on- Chip (SoC) Testing of Digital System-on- Chip (SoC) 1 Outline of the Talk Introduction to system-on-chip (SoC) design Approaches to SoC design SoC test requirements and challenges Core test wrapper P1500 core test

More information

Technology Roadmap Comparisons for TAPE, HDD, and NAND Flash: Implications for Data Storage Applications

Technology Roadmap Comparisons for TAPE, HDD, and NAND Flash: Implications for Data Storage Applications R. Fontana¹, G. Decad¹, S. Hetzler² ¹IBM Systems Technology Group, ²IBM Research Division 20 September 2012 Technology Roadmap Comparisons for TAPE, HDD, and NAND Flash: Implications for Data Storage Applications

More information

Management Discussion and Analysis For The 9 Months Ended, June 30 2015

Management Discussion and Analysis For The 9 Months Ended, June 30 2015 Management Discussion and Analysis For The 9 Months Ended, June 30 2015 The following discussion and analysis as of August 31, 2015 should be read in conjunction with the consolidated financial statements

More information

Converged, Real-time Analytics Enabling Faster Decision Making and New Business Opportunities

Converged, Real-time Analytics Enabling Faster Decision Making and New Business Opportunities Technology Insight Paper Converged, Real-time Analytics Enabling Faster Decision Making and New Business Opportunities By John Webster February 2015 Enabling you to make the best technology decisions Enabling

More information

14 nm Process Technology: Opening New Horizons

14 nm Process Technology: Opening New Horizons 14 nm Process Technology: Opening New Horizons Mark Bohr Intel Senior Fellow Logic Technology Development SPCS010 Agenda Introduction 2 nd Generation Tri-gate Transistor Logic Area Scaling Cost per Transistor

More information

Semtech Corporation Conflict Minerals Report for the Year Ended December 31, 2015

Semtech Corporation Conflict Minerals Report for the Year Ended December 31, 2015 Semtech Corporation Conflict Minerals Report for the Year Ended December 31, 2015 This Conflict Minerals Report of Semtech Corporation ( Semtech ) for calendar year 2015 is filed in accordance with Rule

More information

Digital Integrated Circuit (IC) Layout and Design

Digital Integrated Circuit (IC) Layout and Design Digital Integrated Circuit (IC) Layout and Design! EE 134 Winter 05 " Lecture Tu & Thurs. 9:40 11am ENGR2 142 " 2 Lab sections M 2:10pm 5pm ENGR2 128 F 11:10am 2pm ENGR2 128 " NO LAB THIS WEEK " FIRST

More information

Welcome to the Real-Time Cloud

Welcome to the Real-Time Cloud Welcome to the Real-Time Cloud Daniel Burton Sr. Vice President, Global Public Policy salesforce.com dburton@salesforce.com Safe Harbor Safe harbor statement under the Private Securities Litigation Reform

More information

Photonic Networks for Data Centres and High Performance Computing

Photonic Networks for Data Centres and High Performance Computing Photonic Networks for Data Centres and High Performance Computing Philip Watts Department of Electronic Engineering, UCL Yury Audzevich, Nick Barrow-Williams, Robert Mullins, Simon Moore, Andrew Moore

More information

Delivering Vertical Solutions to a Global Market

Delivering Vertical Solutions to a Global Market PARTNERSHIP Microsoft Dynamics AX Microsoft Dynamics Industry Solutions Delivering Vertical Solutions to a Global Market White Paper July 2007 http://www.microsoft.com/dynamics/ax/product/industrysolutions.mspx

More information

Technology White Papers nr. 13 Paul Holister Cristina Román Vas Tim Harper

Technology White Papers nr. 13 Paul Holister Cristina Román Vas Tim Harper QUANTUM DOTS Technology White Papers nr. 13 Paul Holister Cristina Román Vas Tim Harper QUANTUM DOTS Technology White Papers nr. 13 Release Date: Published by Científica Científica, Ltd. www.cientifica.com

More information

Data center day. Data Center Strategy. Diane Bryant Senior Vice President & General Manager Data Center Group August 27, 2015

Data center day. Data Center Strategy. Diane Bryant Senior Vice President & General Manager Data Center Group August 27, 2015 Data Center Strategy Diane Bryant Senior Vice President & General Manager Data Center Group August 27, 2015 Welcome Market Growth Drivers HPC Cloud Network Transformation Big Data Growth Beyond CPUs Silicon

More information

INF4420 Introduction

INF4420 Introduction INF4420 Introduction Spring 2012 Jørgen Andreas Michaelsen (jorgenam@ifi.uio.no) Outline Practical information about the course. Context (placing what we will learn in a larger context) Outline of the

More information

PowerPC Microprocessor Clock Modes

PowerPC Microprocessor Clock Modes nc. Freescale Semiconductor AN1269 (Freescale Order Number) 1/96 Application Note PowerPC Microprocessor Clock Modes The PowerPC microprocessors offer customers numerous clocking options. An internal phase-lock

More information

Creating Affordable Silicon

Creating Affordable Silicon Creating Affordable Silicon John Tinson VP Sales Sondrel 2016 03/05/2016 Presentation Title 1 The IoT Challenge Existing OEM s and start ups would benefit from a custom ASIC to prove their application

More information

MirrorBit Technology: The Foundation for Value-Added Flash Memory Solutions FLASH FORWARD

MirrorBit Technology: The Foundation for Value-Added Flash Memory Solutions FLASH FORWARD MirrorBit Technology: The Foundation for Value-Added Flash Memory Solutions FLASH FORWARD MirrorBit Technology: The Future of Flash Memory is Here Today Spansion is redefining the Flash memory industry

More information

Silicon Photonics Market & Applications

Silicon Photonics Market & Applications Silicon Photonics Market & Applications 2013 Fields of Expertise Yole Developpement is a market, technology and strategy consulting company, founded in 1998. We operate in the following areas: Power Electronics

More information

Thin Is In, But Not Too Thin!

Thin Is In, But Not Too Thin! Thin Is In, But Not Too Thin! K.V. Ravi Crystal Solar, Inc. Abstract The trade-off between thick (~170 microns) silicon-based PV and thin (a few microns) film non-silicon and amorphous silicon PV is addressed

More information

The Impact of IoT on Semiconductor Companies

The Impact of IoT on Semiconductor Companies Advisory The Impact of IoT on Semiconductor Companies Rajesh Mani Director, Strategy and Operations April 15, 2015 The Internet of Things (IoT) has been defined in multiple ways here s our take! The collection

More information

Samsung emcp. WLI DDP Package. Samsung Multi-Chip Packages can help reduce the time to market for handheld devices BROCHURE

Samsung emcp. WLI DDP Package. Samsung Multi-Chip Packages can help reduce the time to market for handheld devices BROCHURE Samsung emcp Samsung Multi-Chip Packages can help reduce the time to market for handheld devices WLI DDP Package Deliver innovative portable devices more quickly. Offer higher performance for a rapidly

More information

DESIGN CHALLENGES OF TECHNOLOGY SCALING

DESIGN CHALLENGES OF TECHNOLOGY SCALING DESIGN CHALLENGES OF TECHNOLOGY SCALING IS PROCESS TECHNOLOGY MEETING THE GOALS PREDICTED BY SCALING THEORY? AN ANALYSIS OF MICROPROCESSOR PERFORMANCE, TRANSISTOR DENSITY, AND POWER TRENDS THROUGH SUCCESSIVE

More information

Medical Center Trims Budget by $600,000 by Switching to Hyper-V Private Cloud

Medical Center Trims Budget by $600,000 by Switching to Hyper-V Private Cloud Medical Center Trims Budget by $600,000 by Switching to Hyper-V Private Customer: UConn Health Website: www.uchc.edu Number of Employees: 5000 Customer profile: St. UConn Health is a vibrant, integrated

More information

SAN Conceptual and Design Basics

SAN Conceptual and Design Basics TECHNICAL NOTE VMware Infrastructure 3 SAN Conceptual and Design Basics VMware ESX Server can be used in conjunction with a SAN (storage area network), a specialized high speed network that connects computer

More information

Introducción. Diseño de sistemas digitales.1

Introducción. Diseño de sistemas digitales.1 Introducción Adapted from: Mary Jane Irwin ( www.cse.psu.edu/~mji ) www.cse.psu.edu/~cg431 [Original from Computer Organization and Design, Patterson & Hennessy, 2005, UCB] Diseño de sistemas digitales.1

More information

Electromagnetic. Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking EMI CONTROL. The authors describe the

Electromagnetic. Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking EMI CONTROL. The authors describe the From September 2011 High Frequency Electronics Copyright 2011 Summit Technical Media, LLC Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking By Jeffrey Batchelor and Jimmy Ma Silicon

More information

3D NAND Technology Implications to Enterprise Storage Applications

3D NAND Technology Implications to Enterprise Storage Applications 3D NAND Technology Implications to Enterprise Storage Applications Jung H. Yoon Memory Technology IBM Systems Supply Chain Outline Memory Technology Scaling - Driving Forces Density trends & outlook Bit

More information

Class 18: Memories-DRAMs

Class 18: Memories-DRAMs Topics: 1. Introduction 2. Advantages and Disadvantages of DRAMs 3. Evolution of DRAMs 4. Evolution of DRAMs 5. Basics of DRAMs 6. Basics of DRAMs 7. Write Operation 8. SA-Normal Operation 9. SA-Read Operation

More information

A Gigabit Transceiver for Data Transmission in Future HEP Experiments and An overview of optoelectronics in HEP

A Gigabit Transceiver for Data Transmission in Future HEP Experiments and An overview of optoelectronics in HEP A Gigabit Transceiver for Data Transmission in Future HEP Experiments and An overview of optoelectronics in HEP Ken Wyllie, CERN 1 Outline Optoelectronics What? Why? How? Experience in HEP (LHC) & future

More information

Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking

Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking Reducing EMI and Improving Signal Integrity Using Spread Spectrum Clocking Electromagnetic interference (EMI), once the exclusive concern of equipment designers working with high-speed signals, is no longer

More information

Optimizing Configuration and Application Mapping for MPSoC Architectures

Optimizing Configuration and Application Mapping for MPSoC Architectures Optimizing Configuration and Application Mapping for MPSoC Architectures École Polytechnique de Montréal, Canada Email : Sebastien.Le-Beux@polymtl.ca 1 Multi-Processor Systems on Chip (MPSoC) Design Trends

More information

UBS Technology Conference

UBS Technology Conference UBS Technology Conference London, 13 March 2013 Ulrich Pelzer Corporate Vice President Finance, Treasury & Investor Relations Table of Contents Infineon at a Glance Power Semiconductors and Manufacturing

More information

VON BRAUN LABS. Issue #1 WE PROVIDE COMPLETE SOLUTIONS ULTRA LOW POWER STATE MACHINE SOLUTIONS VON BRAUN LABS. State Machine Technology

VON BRAUN LABS. Issue #1 WE PROVIDE COMPLETE SOLUTIONS ULTRA LOW POWER STATE MACHINE SOLUTIONS VON BRAUN LABS. State Machine Technology VON BRAUN LABS WE PROVIDE COMPLETE SOLUTIONS WWW.VONBRAUNLABS.COM Issue #1 VON BRAUN LABS WE PROVIDE COMPLETE SOLUTIONS ULTRA LOW POWER STATE MACHINE SOLUTIONS State Machine Technology IoT Solutions Learn

More information

Concevoir et produire des semiconducteurs en Europe: une Utopie? Let s have a look

Concevoir et produire des semiconducteurs en Europe: une Utopie? Let s have a look Concevoir et produire des semiconducteurs en Europe: une Utopie? Let s have a look Gérard MATHERON MIDIS MINATEC 24 avril 2009 1 Advanced Wafer Manufacturing Challenges Advanced Wafer Manufacturing Challenges

More information

Chapter 1 Introduction to The Semiconductor Industry 2005 VLSI TECH. 1

Chapter 1 Introduction to The Semiconductor Industry 2005 VLSI TECH. 1 Chapter 1 Introduction to The Semiconductor Industry 1 The Semiconductor Industry INFRASTRUCTURE Industry Standards (SIA, SEMI, NIST, etc.) Production Tools Utilities Materials & Chemicals Metrology Tools

More information

Technology. Accenture Data Center Services

Technology. Accenture Data Center Services Technology Accenture Data Center Services 2 Accenture employs marketleading technologies and processes to help clients design, implement and manage data center solutions that align to business priorities,

More information

The Diode. Diode Operation

The Diode. Diode Operation The Diode The diode is a two terminal semiconductor device that allows current to flow in only one direction. It is constructed of a P and an N junction connected together. Diode Operation No current flows

More information

Business Case for S/Gi Network Simplification

Business Case for S/Gi Network Simplification Business Case for S/Gi Network Simplification Executive Summary Mobile broadband traffic growth is driving large cost increases but revenue is failing to keep pace. Service providers, consequently, are

More information