How To Write A Gmii Electrical Specifier
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1 GMII Electrical Specification IEEE Interim Meeting, San Diego, January 1997 Dave Fifield N
2 GMII Electrical Specification - Goals Compatibility with ANSI TR/X x Revision 2.3 Fibre Channel - 10-bit Interface specification Compatibility with IEEE 802.3u Clause 22.4 MII Electrical Characteristics Manufacturable/Implementable using current technology Page 2
3 Why Compatibility With 10b and MII? * Allows us to use current technology for 1000Mb/s and provide backward compatibility with 10/100 Mb/s Page 3
4 1000BASE-X Implementations LAN CSMA/CD LAYERS DEVICE PARTITIONING MAC MAC PCS PMA GMII LOGICAL GMII CLAUSE 36 PCS 10b I/F * PCS/PMA interface must be 10b compatible so current SerDes devices can be used PMD SERDES CLAUSE 39 PMD I/F CLAUSE 38 FIBEROPTIC TRANSCEIVER Page 4
5 1000BASE-T Implementations LAN CSMA/CD LAYERS MAC PCS PMA PMD GMII DEVICE PARTITIONING MAC GMII CLAUSE 40 PCS/PMA/PMD 1000BASE-T PHY * GMII Electrical Specification is required to ensure vendor interoperability * Sensible to make it compatible with 10b Electrical Specification so MAC device can be the same one used for 1000BASE-X (but with the 8b/10b PCS bypassed) Page 5
6 Mixed 10/100/1000BASE-T Implementaions LAN CSMA/CD LAYERS MAC DEVICE PARTITIONING 10/100/1000 Mb/s MAC * Multi-speed MACs are likely to be implemented * This requires compatibility with the existing 10/100 MII electrical specification GMII/MII GMII/MII (A GMII with an MII stub is recommended) not 10/100/1000 Mb/s PHY CLAUSE 40 PCS/PMA/PMD 1000BASE-T PHY 10BASE-T AND/OR 100BASE-T PHY Page 6
7 10b Electrical Specifications TTL/CMOS input and output compatible Tolerance for mismatched input levels is optional Eg. a 5V output driving a 3.3V input Devices that meet this specification but are not tolerant of mismatched input levels are still regarded as compliant Source - ANSI TR/X x Revision 2.3 Fibre Channel - 10-bit Interface Specification Page 7
8 MII Electrical Specifications TTL/CMOS input and output compatible MII receivers required to be tolerant of all input potentials from 0V to +5.5V and (15ns) transients from -1.8V to +7.3V More stringent than the 10b specification Symbol Parameter Conditions Min Typ Max Units V OH Output High Voltage I OH = -4mA 2.4 V V OL Output Low Voltage I OL = 4mA 0.4 V V IH Input High Voltage 2.0 V V IL Input Low Voltage 0.8 V I IH Input High Current V i = 5.25V ua I IL Input Low Current V i = 0.00V -20 ua C in Input Capacitance 8 pf d t MII Cable Delay Variation (Skew) 0.1 ns Source - IEEE 802.3u Clause 22.4, MII Electrical Characteristics Page 8
9 Combining the Electrical Specifications Not practical to force the higher current MII drive specifications on existing SerDes devices GMII specifies no connector or cable - 10b drive levels are sufficient With a voluntary restriction (recommendation?) to use GMII in MII mode only over short, matched, PCB traces, the 10b specification will provide adequate compatibility with existing 10/100 Mb/s PHY devices This restriction cannot be standardized (define short!?) Could add a note in Clause 42 System Considerations Page 9
10 10b/MII Compatibility 10b DRIVER 3 Inches of PCB 1.5pF per Inch = 4.5pF MII RECEIVER Cin = 8.0pF max (2.0pF typ) GROUND Since the transmission line is very short, it can be treated as as a lumped capacitance output load Total load on the 10b driver = 12.5pF max, 6.5pF typ All 10b AC specifications are specified with an output load of 10pF Ran out of time to do the math, sorry! All the indications are that this should work Page 10
11 Hooking up a 1000BASE-X PHY 1Gb/s NIC DEVICE (TXD<7:0>) (TX_EN:TX_ER) (GTX_CLK) TX[0:7] TX[8:9] TBC SERDES DEVICE (PMA) MAC CONTROL (OPTIONAL) 1Gb/s MAC GMII (RXD<7:0>) CLAUSE 36 PCS (RX_DV:RX_ER) RX[0:7] RX[8:9] RBC[0:1] RBC[0:1] COM_DET COM_DET FIBER PMD PHY Type? STATION MANAGEMENT MDC MDIO EWRAP -LCK_REF REFCLK EN_CDET Page 11
![(RXD<7:0>) CLAUSE 36 PCS (RX_DV:RX_ER) RX[0:7] RX[8:9] RBC[0:1] RBC[0:1] COM_DET](/docs-images/41/6507281/images/page_11.jpg "COM_DET FIBER PMD PHY Type?")
12 Hooking up the GMII BASE-T 1Gb/s NIC DEVICE GMII TXD<7:0> TX_EN TX_ER GTX_CLK (125MHz) TX_CLK COL RXD<7:0> RX_ER RX_CLK (125MHz) CRS CLAUSE 40 PCS/PMA/PMD 1000BASE-T PHY Hybrid Transformer Thingy RJ45 MAC CONTROL (OPTIONAL) 1Gb/s MAC CLAUSE 36 PCS - BYPASSED RX_DV STATION MANAGEMENT MDC MDIO Page 12
13 Hooking up the GMII - 10/100BASE-T 10/100/1000 Mb/s NIC DEVICE GMII in MII Mode TXD<3:0> TXD<4:7> TX_EN TX_ER GTX_CLK TX_CLK COL RXD<3:0> RXD<4:7> RX_ER RX_CLK 10/100BASE-T PHY Magnetics RJ45 MAC CONTROL (OPTIONAL) 1Gb/s MAC CLAUSE 36 PCS - BYPASSED CRS RX_DV STATION MANAGEMENT MDC MDIO Page 13
14 GMII - Work to do Complete math to prove 10b/MII compatibility Using Asif Iqbal s work on timing as a basis, write Clause 35.3 Signal Timing Characteristics Include worst case permissible delay, skew and capacitance of the GMII transmission medium (PCB trace specifications) Using 10b specification as a basis (as it already is in Draft D1), edit Clause 35.4 Electrical Characteristics Signal termination DC specifications Speed selection and Fiber PHY type selection method Selector pins on GMII? Page 14
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