Design Consideration for Configuration, Topology & Control Schemes of DSTATCOM Implemented on Distribution Systems

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1 Leture otes o Ifortio Theory Vol., o. 3, Septeer 203 Desig Cosidertio for Cofigurtio, Topology & Cotrol Shees of DSTATCOM Ipleeted o Distriutio Systes S. P. Gwde Yeshwtro Chv College of Egieerig, Deprtet of Eletril Egieerig, gpur, Idi Eil: spgwde_8@yhoo.o S. Kh d M. R. Rteke Visesvry tiol Istitute of Tehology, Deprtet of Eletril Egieerig, gpur, Idi Eil: skh923@gil.o, rrteke@rediffil.o Astrt With the iresig eed of eletril eergy, the ded for reeivig the high qulity eletril eergy is eig iresed i distriutio systes. But due to the differet distures ffetig the power qulity, the power qulity i the preset dy distriutio systes is deteriorted due to high retive power urde, hroi urret, lod ule, exessive eutrl urret et. There re vrious power qulity proles fed y utilities, idustril osuer, equipet like PLC (Progrle Logi Cotroller), & ASD (Adjustle Speed Drives).The differet usto power devies re ville for itigtio of power qulity proles. DSTATCOM (Distriutio Stti Copestor) is oe of the shut oeted devie used for opestig vrious power qulity proles i distriutio systes. This pper presets oprehesive review of DSTATCOM ofigurtio, topology & differet otrol shees used for power qulity iproveet o distriutio syste iorportig ultiple pplitios. Idex Ters usto power, dstto, power qulity. I. ITRODUCTIO POWER Qulity (PQ) is ter whih rodly refers to itiig er siusoidl wvefor of power distriutio us voltges t rted voltge d frequey. Power Qulity (PQ) relted issues re of ost oer owdys. The widespred use of eletroi equipet, suh s ifortio tehology equipet, power eletrois suh s djustle speed drives (ASD), progrle logi otrollers (PLC), eergy-effiiet lightig, leds to oplete hge of eletri lods ture. These lods re siulteously the jor users d the jor vitis of power qulity proles. Due to their o-lierity, ll these lods use distures i the voltge wvefor. Vrious Power Qulity (PQ) proles ffetig idustril ustoers thus ffetig idustril produtio proess ledig to reveue loss []. Vrious ethods hve ee pplied to redue or itigte the PQ proles. The ovetiol ethods re y usig pitor ks, itrodutio of ew prllel feeders d y istllig uiterruptile power supplies Musript reeived oveer 30, 202; revised Mrh 20, 203 (UPS). However, the PQ proles re ot solved opletely due to uotrollle retive power opestio d high osts of ew feeders d UPS. Covetiolly, Stti Vr Copestors (SVCs) hve ee used i ojutio with pssive filters t the distriutio Level for retive power opestio d itigtio of the power qulity prole. Though SVCs re very effetive syste otrollers used to provide retive power opestio t the trsissio level, their liited dwidth, higher pssive eleet out tht ireses size d losses, d slower respose ke the usuitle for the oder dy distriutio requireet. Aother opestig syste hs ee proposed y eployig oitio of SVC d tive power filter, whih opeste three phse lods i iiu of two yles. Thus, otroller whih otiuously oitors the lod voltges d urrets to deterie the right out of opestio required y the syste d the less respose tie should e vile ltertive. Distriutio Stti Copestor (DSTATCOM) hs the pity to overoe the ove drwks y providig preise otrol d fst respose durig trsiet d stedy stte, with redued foot prit d weight. The DSTATCOM hs eerged s proisig devie to provide solutio ot oly for voltge relted issues ut host of other urret relted power qulity prole s solutios suh s voltge regultio, lod lig, retive power opestio, power ftor orretio & iproveet d urret hroi otrol [2]. This pper is t presetig oprehesive review of DSTATCOM for power qulity iproveet o distriutio syste. This pper overs the differet ofigurtios used, the otrol ethodologies, d their seletio for speifi pplitios. II. TOPOLOGIES & COFIGURATIOS DSTATCOM e lssified o the sis of differet topologies d the uer of phses. For power qulity iproveet the voltge soure iverter (VSI) ridge struture is geerlly used while the use of urret soure iverter (CSI) is less. The differet types of ofigurtio of DSTATCOM re s follows 203 Egieerig d Tehology Pulishig doi: /lit

2 Leture otes o Ifortio Theory Vol., o. 3, Septeer 203 A. Coverter sed Clssifitio DSTATCOM utilizes either voltge-soure iverter (VSI) or urret-soure iverter (CSI). VSI use pitive eergy storge, while CSI use idutive eergy storge i their respetive d liks for voltge d urret [3]. However, the voltge soure iverters re widely used due to the sller size, the less het dissipted d the less ost of the pitor opred to the idutor, used i the CSI, for the se power rtig [4]. The VSI oeted i shut with the syste provides ultifutiol topology whih e used for up to three quite distit purposes, voltge regultio d opestio of retive power, orretio of power ftor; d eliitio of urret hrois. Voltge soure iverter (VSI) topology is populr euse it e expdle to ultilevel, ultistep & ultihi topology to ehe the perfore with lower swithig frequey d iresed power hdlig pity. Vrious ultilevel topologies re PC/Diode lp ultilevel iverter, Csded H-ridge & Flyig pitor ultilevel iverter re s show i Fig.(,,) & further sded odulr ultilevel iverter. Vd/4 Vd/4 Vd/4 Vd/4 S S7 S8 Vo C C2 S8 Figure. Topologies of ultilevel iverter ( 5-level) Diode lp ultilevel iverter, sded H-ridge ultilevel IVERTER, Flyig pitor ultilevel iverter. ) Diode lped ultilevel iverter: A -level diode-lp overter typilly hve ( ) pitors o the d us d produes levels of the phse voltge. A sigle-phse full ridge 5-level diodelp overter i whih the d us osists of four pitors, C, C 2, C 3, d C 4,. For d us voltge V d, the voltge ross eh pitor is V d 4, d eh devie voltge stress will e liited to oe pitor voltge level, V d /4, through lpig diodes s show i Fig.(). 2) Csde H -ridge ultilevel iverter: I Csded H-ridge iverters seprte d soures (SDC s) re itrodued. This ew overter void extr lpig diodes or voltge lig pitors. Fig.() Shows the si struture of the 5-level sded-iverters with SDC s, show i sigle-phse ofigurtio. Eh SDC is ssoited with siglephse full-ridge iverter. To sythesize ultilevel wvefor, the output of eh of the differet level H- ridge ells is oeted i series. The uer of output phse voltge levels i sded iverter is defied y = 2H, where H = o. of H-ridges; while the reltio etwee phse voltge d lie voltges is se s diode lped iverter. S S7 C C2 C3 C4 C3 C3 C3 C2 C2 C S S7 S8 Vo 3) Flyig pitor ultilevel iverter: A sigle phse full-ridge flyig-pitor sed 5- level overter is show i Fig.(), ssuig tht eh pitor hs the se voltge rtig. Three ier-loop lig pitors for phse leg, C, C 2, d C 3 re idepedet fro those for phse leg. All phse legs shre the se d lik pitors C -C 4. The voltge level defied i the flyig-pitor overter is siilr to tht (). The phse voltge of -level overter hs levels iludig the referee level, d the lie voltge hs (2 - ) levels. Assuig tht eh pitor hs the se voltge rtig s the swithig devie, the d us eeds ( - ) pitors for -level overter. B. Topology sed Clssifitio DSTATCOM is shut oeted opestig devie. Suitle djustet of the phse d gitude of the DSTATCOM output voltges llows effetive otrol of tive d retive power exhges etwee the D-STATCOM d the syste. Suh ofigurtio llows the devie to sor or geerte otrollle tive d retive power. The VSC oeted i shut with the syste provides ultifutiol topology whih e used for up to three quite distit purposes ( Lod Copestio ): ) Voltge regultio d retive power opestio. 2) Corretio of power ftor ( UPF-Uity Power Ftor ) 3) Lod lig There re vrious topology of VSI (Voltge Soure Iverter) used i DSTATCOM re s follows ) H-ridge VSI topology: v s v s v s Leg group- C d - V d S S S'S' i s i s i s S S Leg group- S S Leg group S' S'S' S' i l i l i l Isoltio Trsforer Figure 2. H-ridge topology for 3-phse 3-wire DSTATCOM. The H-ridge VSI topology show i Fig. 2, whih is ooly used for lod opestio, osists of 2 power seiodutor swithes supported y oo d storge pitor for 3-phse [5]-[8]. Eh VSI is oeted to the power etwork t the through trsforer. The purpose of this trsforer is to provide isoltio etwee the iverter legs d to prevet the d storge pitor fro eig shorted y swithes i differet iverter legs. Due to the presee of isoltio trsforers, this topology, however, is ot suitle for opestio of the lod urrets otiig d opoets. 2) Three-phse three-leg topology: 203 Egieerig d Tehology Pulishig 90

3 Leture otes o Ifortio Theory Vol., o. 3, Septeer 203 A three-phse three-leg topology show i Fig. 3 hs six swithes d oo d storge pitor [7]-[9]. If this topology is used, the zero-sequee urret i the lod ot e opested, d it flows i the eutrl wire etwee the syste d lod. The zero-sequee urret thus returs to the distriutio syste. Furtherore, if lod is olier, the the hrois eter ito the syste, thus degrdig the power qulity. I this topology, the geertios of the three opestor urrets re ot idepedet. Hee, this shee is ot suitle for three-phse four-wire distriutio syste with lods otiig zero-sequee urrets. v s v s v s Cd v d - G G4 i s i s i s S G3 G6 G5 G2 i l i l i l Lod without Zero seq.cop. L f R f Figure 3. Three-phse, 3-leg DSTATCOM. 3) Three-phse four-leg VSI topology: Three-phse four-leg VSI topology show i Fig. 4 is suitle for the eliitio of d s well s zero-sequee opoets fro the soure urrets. Three of its legs re oeted to three phses, d the fourth leg is oeted to the eutrl through iterfe retor [9] []. Referee urret for the fourth leg is the egtive su of the three-phse lod urrets. This ullifies the effet of d opoets i the lod urrets. Whe opestor is workig, the zero-sequee urret otiig swithig frequey opoets re routed etwee the lod d opestor eutrl. i 0 Lod otiig DC & zero Seq.Cop the lod. However, due to the presee of this d opoet, the two d pitors re hrged to differet voltges. i0 Cd Cd 2 - ' - vd vd2 S S 2 S 3 S 4 vs vs vs S S 2 S 3 S 4 LOA D LOA D LOA D Figure 5. Three-phse, PC DSTATCOM topology. C. Supply Syste sed Clssifitio This lssifitio of DSTATCOM is sed o the supply d/or the lod syste hvig sigle-phse (two wire) d three-phse (three-wire or four-wire) systes. There re y olier lods, suh s doesti pplies, oeted to sigle-phse supply systes. Soe three-phse olier lods re without eutrl, suh s ASD's. There re y olier sigle-phse lods distriuted o three-phse four-wire supply systes, suh s oputers & et. Hee, opestig devies y lso e lssified ordigly s two-wire, three - wire, d four-wire types. ) Sigle phse two-wire opestig systes: Fig. 6 shows sigle phse DSTATCOM. A voltge soure is supplyig lod tht ould e olier s well. The poit of oetio of the lod d the soure is the poit of oo ouplig ().Here the opestor osists of iverter d iterfe idutor. The d side of the opestor is oeted is supplied y d pitor. The iverter is expeted to e otrolled to iti voltge ross this pitor. is is is S S 2 S 3 S 4 v s is i l if if if Lod il il il vs vs is is il il VSI DSTATCOM vs is il if if C d - V d Cd Vd S S S S Figure 4. Three-phse, 4-leg DSTATCOM. 4) eutrl-lped VSI topology: A eutrl-lped VSI topology show i Fig. 5.osists of eight IGBT swithes d two idetil d storge pitors for 3-phse [2] [6] this topology is well equipped to opeste d opoets preset i S S S S if i0 Figure 6. Three phse three -wire DSTATCOM 2) Three-phse three-wire systes: I three-phse, three-wire distriutio systes, the ofigurtio of DSTATCOM ould tke the for of sigle three-phse DSTATCOM or three seprte sigle - phse VSI ridges ( idel opestor ) oeted to oo d storge pitor s show i fig.7. These ofigurtios re suited to three-phse syste feedig lier/olier lods. The dditio of eergy storge to the power oditioer dds to the flexiility of the syste. This power oditioer eet pek lod ded d 203 Egieerig d Tehology Pulishig 9

4 Leture otes o Ifortio Theory Vol., o. 3, Septeer 203 lso provides retive power requireet. The ofigurtio of DSTATCOM with storge eleet is reported s Bttery Eergy Storge Syste (BESS). Threephse voltge soure v s v s v s i s i s i s if i f i o ' if i l i l i l Three-phse uled o-lier lod Ide opesto l r Figure 7. Three phse 3-wire DSTATCOM /(4 -wire dotted lie - - ) 3) Three phse four-wire systes: The eletril power distriutio uses three-phse, four-wire syste to feed three-phse lods s show i Fig. 7(iludig fourth wire - -).The presee of eutrl odutor gives rise to proles of exessive eutrl urrets resultig fro uled urrets d hrois i lod urrets. The proles re ggrvted i the presee of uled olier lods [7]. I this topology the three legs re oeted to three-phse odutors through series idutors d the eutrl of soure is oeted to the eutrl of the lod through eutrl of the opestor usig fourth wire. III. COTROL STRATEGIES Stisftory perfore, fst respose, flexile d esy ipleettio re the i ojetives of y opestio strtegy. The otrol strtegies of DSTATCOM re ily ipleeted i the followig steps: Mesureets of syste vriles d sigl oditioig Extrtio of referee opestig sigls Geertio of firig pulses for swithig devies The geertio of proper pulse width odultio (PWM) firig is the ost iportt prt of DSTATCOM otrol d it hs gret ipt o its opestio ojetives, trsiet s well s stedy stte perfore. A PWM sed distriutio stti opestor offers fster respose d pility for hroi eliitio [8]. This setio disusses the followig otrol shees of DSTATCOM for power ftor orretio d hroi itigtio sed o ) Phse shift otrol 2) Idiret deoupled urret otrol 3) Regultio of AC us d DC lik voltge ) Phse shift otrol: I this ethod, the opestio is hieved y the esurig of the rs voltge t the lod poit, wheres o retive power esureets re required [9]-[20]. Siusoidl PWM tehique is used with o-stt swithig frequey. The error sigl otied y oprig the esured syste rs voltge d the referee voltge is fed to proportiol itegrl (PI) i o otroller, whih geertes the gle for deidig the eessry phse shift etwee the output voltge of the VSI d the AC teril voltge. This gle is sued with the phse gle of the led supply voltges, ssued to e eqully sped t 20 degrees, to produe the desired syhroizig sigl required to operte the PWM geertor. I this shee, the DC voltge is itied ostt, usig seprte ttery soure. Though this strtegy is esy to ipleet, is roust d provide prtil retive power opestio without hroi suppressio 2) Idiret deoupled urret otrol: This shee is sed o the goverig equtios of dved stti vr opestor [2]. It requires the esureet of istteous vlues of three phse lie voltges d urret. The otrol shee is sed o the trsfortio of the three phse syste to syhroously rottig fre, usig Prk s trsfortio. The opestio is hieved y the otrol of i d d i q [22]. This is idiret urret otrol ethod, where urret error opestio is hieved idiretly through voltge odultio, i order to iorporte siple ope loop sie PWM odultors, so tht fixed swithig frequey is hieved. The i dvtge of this shee is tht, it iorportes self supportig DC us d the vlue of the referee DC lik voltge is less, s opred to phse shift otrol, due to whih the overter swithes re less stressed. Also, other dvtge of this shee is tht it opertes with fixed swithig frequey, whih provides defiite hroi spetru, idepedet of the lod. The disdvtges of this shee re: Phse Loked Loop gives erroeous results i se of distorted is d is pplile for oly three phse systes. It requires itesive oputtio, iludig oplex trsfortios, kig the opertio oplex. Bdwidth is restrited due to the use of sie PWM geertor & durig trsiet oditio, the supply urret shoots to very high vlue. 3) Regultio of AC us d DC lik voltge: Three phse AC supply voltges d DC lik voltge re sesed d fed to two PI otrollers, the outputs of whih deide the plitude of retive d tive urret to e geerted y the DSTATCOM [23]. Multiplitio of these plitudes with the i phse d qudrture voltge uit vetors yields the respetive opoet of the referee urrets. Whe pplyig the lgorith for power ftor orretio d hroi eliitio, the qudrture opoet of the referee urret is de zero. These referee urrets d the sesed lie urrets re fed to hysteresis otroller, whih is used for trkig otrol s show i Fig. 8(). This hysteresis otroller dds hysteresis d / h roud the lulted referee urret. The trkig eoes etter if the Hysteresis d is rrower, ut the swithig frequey is iresed, whih results i iresed swithig losses. Therefore, the hoie of hysteresis d should e oproise etwee trkig error d iverter losses 203 Egieerig d Tehology Pulishig 92

5 Leture otes o Ifortio Theory Vol., o. 3, Septeer 203 [23]-[27]. This ethod of trkig urret otrol is siple d roust d it exhiits utoti urret liitig hrteristi. This opestio shee is ultifutiol d lso e effetively used for lod ulig d hroi suppressio (Ative filterig ), i dditio to power ftor orretio d dyi voltge regultio. The drwk of this tehique is tht it provides vrile swithig frequey whih further ke ostt y usig rp otrol s show i Fig. 8() & Preditive otrol [6]. Figure 8. v s v s Coprto r s s s Curret L f Sesig Curret Sesig s L f s s Lod Cd Lod )Covetiol hysteresis otrol, )Rp oprtor otrol IV. COCLUSIO A extesive review of opestig usto power devie DSTATCOM hs ee preseted to provide ler perspetive o vrious spets of devie to the reserhers, egieers d uftures. The susttil irese i the use of solid stte power otrol results i hroi pollutio ove the tolerle liits. The preseted lssifitio of ofigurtios, topology d otrol strtegies provide opestio solutio to the vrious power qulity proles, viz, voltge d urret hrois, voltge sgs/ swells, voltge fliker, voltge regultio, lod lig, & retive power opestio & et. REFERECES [] R. C. Dug, M. F. MGrgh, d H. W. Bety, Eletril Power Syste Qulity MGrw Hill Copies, I.,996. [2] G.F. Reed, M. Tked, d I. lyod, Iproved power qulity solutio usig dved solid-slte swithig d stti opestio tehologies, IEEE Power Egieerig Soiery C d witer Meetig, ew York, Y, USA, vol. 2, pp , 999. [3] Y. Ye, M. Kzeri, d V. Quit, Curret-soure overter sed stto: Modelig d otrol, IEEE Trs. Power Del., vol. 20, o.2, pp , Apr [4] M. Mishr, A. Ghosh, d A. Joshi, Opertio of DSTATCOM i voltge otrol ode, IEEE Trs. Power Del., vol. 8, o., pp , J [5] A. Ghosh d A. Joshi, The use of istteous syetril opoets for lig delt oeted lod d power ftor orretio, Elet. Power Syst. Res., vol. 54, o., pp , Apr [6] A. Ghosh d A. Joshi, A ew pproh to lod lig d power ftor orretio i power distriutio syste, IEEE Trs. Power Del., vol. 5, o., pp , J [7] S. P. Gwde, K. B. Porte, K. L. Thkre, d G. L. Bodhe Syhroiztio of syhroous geertor & idutio geertor for voltge & frequey stility usig STATCOM i Pro.3 rd IEEE Cof. ICETET, 200, pp [8] S. P. Gwde d K. B. Porte Review of prllel opertio of syhroous geertor d idutio geertor for stility, i Pro.2 rd IEEE Cof. ICETET, Deeer 2009, pp [9] S. Iyer, A. Ghosh, d A. Joshi, Iverter topologies for DSTATCOM pplitios A siultio study, Elet. Power Syst. Res., vol. 75, o. 2-3, pp. 6 70, Aug [0] B. Sigh, A. Sxe, d D. P. Kothri, A ovel otrol of four pole voltge soure iverter for tive filterig of olier lods i 3-phse 4-wire systes, i Pro. Power Eletro. Drives Eergy Syst. Id. Growth Cof., 998, pp [] C. A. Qui,. Moh, d H. Meht, Ative filterig of hroi urrets i three-phse, four-wire systes with threephse d sigle-phse olier lods, i Pro. Appl. Power Eletro. Cof., 992, pp [2] G. Dog d O. Ojo, Curret regultio i four-leg voltgesoure overters, IEEE Trs. Id. Eletro., vol. 54, o. 4, pp , Aug [3] B.. Sigh, P. Rstgoufrd, B. Sigh, A. Chdr, d K. Al- Hddd, Desig, siultio d ipleettio of threepole/four-pole topologies for tive filters, i Pro. Ist. Elet. Eg. Eletr. Power Appl., Jul. 2004, vol. 5, o. 4, pp [4] A. e, I. Tkhshi, d H. Akgi, A ew eutrl-poitlped PWM iverter, IEEE Trs. Id. Appl., vol. IA-7, o. 5, pp , Sep./Ot. 98. [5] M. Aredes, J. Häfer, d K. Heu, Three-phse four-wire shut tive filter otrol strtegies, IEEE Trs. Power Eletro., vol. 2, o. 2, pp. 3 38, Mr 997. [6] M. K. Mishr, A. Ghosh, d A. Joshi, A ew STATCOM topology to opeste lods otiig AC d DC opoets, i Pro. IEEE Power Eg. So., Witer Meetig, Sigpore, J , 2000, pp [7] R. Vrgs, P. Cortés, U. A, J. Rodríguez, d J. Pott, Preditive otrol of three-phse eutrl-poit-lped iverter, IEEE Trs. Id. Eletro., vol. 54, o. 5, pp , Ot [8] B. Sigh, K. Al Hddd, d A Chdr, Hroi eliitio, retive power opestio d lod lig i 3-Phse, 4- wire eletri distriutio syste supplyig o-lier lod, Eletri power Systes Reserh, vol. 44, pp , 998. [9] P. Giroux, G. Syille, d H. LeHully, Modelig d Siultio of Distriutio STATCOM usig Siulik s Power Syste Blokset, IEEE Idustril Eletrois Soiety, 200, pp [20] O. A. Lr d E. Ah, Modellig d Alysis of Custo power Systes y PSCAD/EMTDC, IEEE Trs, o Power Deliverv. vol. 7. o. l, pp , J [2] V. G. Ah, O. Agelidis, A. Lr, d T. J. E. Miller, Power Eletroi Cotrol i Eletril Systes, Egld. ewes [22] V. Ye, M. Kzeri, d V. Quit, Curret soure overter sed STATCOM: Modelig d otrol, IEEE Trs. o Power Deliverv. vol. 20, o. 2, pp , Apr [23] K. K. Se, STATCOM-Theory. Modelig d pplitios, IEEE Coferee, 998, pp [24] B.. Sigh, B. Sigh, A. Chdr, d K. A. Hddd, Digitl ipleettio of dved stti opestor for voltge profile iproveet, power ftor orretio d lig of uled retive lods, Eletri Power Systes Reserh, vol. 54, Egieerig d Tehology Pulishig 93

6 Leture otes o Ifortio Theory Vol., o. 3, Septeer 203 [25] M. K. Mishr d K. Krthikey A ivestigtio o desig d swithig dyis of voltge soure iverter to opeste uled d o lier lod, IEEE Trs. o Id. Eletrois, vol. 56, o. 8, pp , Augest [26] A. Ghosh d G. Ledwih, Power Qulity Eheet Usig Custo Power Devies: Kluwer Adei Pulishers, Lodo [27]. G. igori d L. Gyugyi, Uderstdig FACTS, IEEE Press, S. P. Gwde reveied his B.E. d M.Teh Degree i Eletril Egieerig i 999 d 2009 fro gpur uiversity, gpur, Idi. Curretly he is workig s Assistt professor i Eletril Egieerig Deprtet of Yeshwtro Chv College of Egieerig, gpur. He is urretly workig towrds his Ph.D. t Visvesvry tiol Istitute of Tehology, gpur, Idi His reserh iterests ilude usto power devies, power eletrois d FACTS pplitios to power syste. Mr.Gwde is eer of IEI,Idi d life eer of ISTE. M. R. Rteke pssed his AMIE (Eletril Egieerig) Exitio of Istitute of Egieers (Idi) i 988 d reeived M-Teh. (Eletrois Egieerig) & Ph.D. (Eletril Egieerig) fro gpur uiversity, gpur (Idi) i 994 d 2008 respetively. He is urretly workig s Assoite Professor i Eletril Egieerig Deprtet of Visvesvry tiol Istitute of Tehology (VIT) gpur. Idi. He hs 5 yers of experiee i the field of tehig d reserh. His reserh iterests ilude power eletrois, resot overters, FACTS devies d power qulity. S. Kh reeived her B.E. d M.Teh Degree i Eletril Egieerig i 2009 d 202 respetively fro gpur Uiversity, gpur, Idi. Curretly she is workig s Assistt professor i Eletril Egieerig Deprtet of Guruk Istitute of Egieerig d Tehology, gpur. Her reserh iterests ilude usto power devies, power eletrois d power qulity. 203 Egieerig d Tehology Pulishig 94