Survey on Pentium and Pentium II Processors (XUBIN HE: 02/12/99

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1 Survey on Pentium and Pentium II Processors (XUBIN HE: 02/12/99 1. Introduction - What is a microprocessor? A microprocessor is an integrated circuit built on a tiny piece of silicon. It contains thousands, or even millions, of transistors, which are interconnected via superfine traces of aluminum. The transistors work together to store and manipulate data so that the microprocessor can perform a wide variety of useful functions. The particular functions a microprocessor performs are dictated by software. - Intel s Microprocessors Family (See Figure 1)

2 Processor Introduced Clock Speeds 4004 Bus Width Number of Transistors Addressable Memory 11/15/71 108KHZ 4 bits Bytes No Virtual Memory Brief Description First microcomput er chip, Arithmetic manipulation /1/ KHZ 8 bits K Bytes No Data/charact er manipulation DX 386 SX 486 DX 486 SX Pentium 4/1/74 2M Hz 8 bits K Bytes No 6/8/78 6/1/79 2/1/82 10/17/85 6/16/88 4/10/89 4/22/91 3/22/93 Pentium Pro 11/01/95 Pentium II 5/07/97 5MHz, 8MHz, 10MHz 5MHz, 8MHz 6MHz, 8MHz, 10MHz, 12.5MHz 16MHz, 20MHz, 25MHz, 33MHz 16MHz, 20MHz, 25MHz, 33MHz 25MHz, 33MHz, 50MH 16MHz, 20MHz, 25MHz, 33MHz 60MHz, 66MHz, 150MHz, 166MHz, 180MHz, 200MHz 200MHz, 233MHz, 266MHz, 300MHz 16 bits M Bytes No 8 bits M Bytes No 16 bits 134,000 16M Bytes 1 GB 32 bits 275,000 4G Bytes 64 TB 16 bits 275,000 4G Bytes 64 TB 32 bits 1.2 million 4G Bytes 64 TB 32 bits million 4G Bytes 64 TB 64/32 bits 3.1 million 4G Bytes 64 TB 64 bits 5.5 million 64G Bytes 64 TB 64 bits 7.5 million 64G Bytes 64 TB 10X P of X P of 8080 Identical to 8086 except for its 8-bit external bus 3-6X the performance of the 8086 First X86 chip to handle 32-bit data sets 16-bit address bus enabled lowcost 32-bit processing Level 1 cache on chip Identical in design to Intel486 TM DX but without math coprocessor 5X P of 33M 486 DX Dynamic execution architecture Dual independent bus, dynamic execution, Intel MMX TM technology Figure 1: Intel s Microprocessors Family

3 2. Pentium vs Pentium II Pentium Pentium II

4 Similarities - The basic architectures are the same. - Superscalar architecture: a microprocessor architecture that enables the microprocessor to execute multiple instructions per clock cycle. - Compatible with large software base: MS_DOS, Windows/NT, UNIX/LINUX, OS/2 - Data integrity features functional redundancy checking support internal error detection features - Multi-processor support: Multiprocessor instructions Support for second level cache - Separate code and data caches - High-performance floating point unit (FPU) - Enhanced 64-bit data bus - Performance monitoring and execution tracing - Upgradability - Power management features System management mode Clock control

5 Differences - Design and Structure (See figure 2) - Performance (See figure 3 and 4) Pentium II Pentium Clock speed(mhz) 200/233/266/300/333/350 /400/450 60/66/75/100/133/166/200/233 System Bus Speed(MHZ) 66/100 50/66 Bus Width 64 bits 64 bits(external data bus) 32 bits(address bus) Dynamic Execution Yes No MMX TM Technology Yes Partly 64 bit System Bus w/ ECC Dual Independent 64 bit Cache Bus w/ optional Bus Architecture ECC NO Cache 16k+16k 8k+8K Instruction set Super set of Pentium Physical Addr. Space 64 GB 4GB Math Co-Processor Built-in optional CPU Transistors ~7.5 million ~3.1 million Package Size inches x inches x inches 1.95 X1.95 Package Type Single Edge Contact Cartridge, 242 pins SPGA/PPGA 296 pins Manufacture process 0.35/0.25 micron 0.8/0.35 micron CPU Voltage 2.8v/2.0v 3.3v/3.6v Figure 2

6 Figure 3: Pentium Clock speed ICOMP index Figure 4: Pentium II Clock speed ICOMP index Rationales that explain these major differences The Intel Pentium II processors deliver excellent performance for all PC software and are fully compatible with existing Intel Architecture-based software. With the improvements of semi-conductor technology, more transistors(about 7.1 millions) are integrated on the chip and the L1 cache size(including the data cache and instruction cache) is doubled compared with the cache size on Pentium. The PII utilizes Intel s 0.25 micron manufacturing process for increased processor frequencies and reduced power consumption. Dual Independent Bus architecture increases bandwith and performance over Pentium processor. Pentium II 350,400 and 450MHZ versions improves system bandwith and performance by increasing the system bus speed from 66MHZ to 100MHZ. 32K(16K/16K) level-one cache provides fast access to heavily used data with a higher hit ratio compared to the 16K cache on Pentium processor. P II microarchitecture dynamic execution technology includes the following techniques:

7 Multiple Branch Prediction: Predicts program execution through several branches, accelerating the flow of work to the processor. Dataflow Analysis: Creates an optimized, recorded schedule of instructions by analyzing data dependencies between instructions. Speculative Execution: Carries out instructions speculatively and based on this optimized schedule, ensures that the processor s superscalar execution units remain busy, boosting overall performance. Intel MMX technology includes new instructions and data types that allow applications to achieve a new level of performance. Intel MMX technology is designed as a set of basic, general-purpose integer instructions that are easily applied to the needs of a wide diversity of multimedia and communications applications. The highlights of the technology are: Single Instruction, Multiple Data (SIMD) technique 57 new instructions Eight 64-bit wide MMX technology registers. Four new data types 4. Customized CPU If I am supposed to design a new CPU, I would like to design a customized CPU according to the different workloads and applications. Because up to now the computers are used in different ways, some people just buy a computer for entertainments, some for academic research, some for word processing and some for surfing on the network. For those who just handle word processing by computers, the enhanced FPU built in CPU is unnecessary, on the other hand, for those who use a computer to do scientific computation, the MMX support is not necessary. In fact, many functions provided by CPUs may never be fully exploited by end users. Maybe I will design several kinds of CPUs aimed to the specific workloads, for example, icpu for internet applications, DBCPU for database, MMXCPU for entertainment and graphic applications and so on.

8 5. References

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