FPGA Configurator Programming Kit (Enhanced) ATDH2200E. Features. Description

Transcription

1 Features Hardware Supports Programming of all AT7LV, AT7N, and AT7F Series Devices Connection to Allow In-System Programming (ISP) Runs off Portable 9V DC Power Supply.0V and.v Supply Software CPS Configurator Programming System GUI-based Interface Supports Windows 98/000/XP and Windows NT Online Help Supports Programming Reset Polarity Verification Routines to Validate Programming Accepts HEX, MCS, POF, RBF and BST File Formats System Contents ATDH00 Programming Board ATDH 0-pin PLCC Adapter ATDH00E Datasheet ATDH00E Programming Kit User Guide 0-pin Ribbon Cable for ISP 9V DC, 00 ma,. mm Center Positive/Negative Power Supply (for US customers only) Sample AT7LV Devices FPGA Configurator Programming Kit (Enhanced) ATDH00E Description The ATDH00E allows designers to quickly and economically program Atmel s family of AT7 series FPGA Configuration Memories. The system also provides support for new devices in the AT7 series Configurator prior to Third Party Programmer support being available. This is a truly portable solution that allows engineers to work from their lab bench or office. Rev. 06G CNFG /09

2 Figure. ATDH00E Configurator Programming Board PROGRAM VERIFY ATDH 00 CHW0 REV 0/0 AT7LV(A) AT7F(A)/AT7N (REMOVE FOR ISP) ATMEL FPGA CONFIGURATOR PROGRAMMER IN-CIRUIT In-System Programming Connector Figure. In-System Programming Header U7 DATA DATA CE CE SCLK SCLK RESET/OE RESET/OE V CC NC () NC () 6 7 GND V CC 8 9 NC (SER_EN)GND 0 () Notes:. Pin 0 activates SER_EN on target board.. NC stands for no connection. The ATDH00E programming board has a 0 pin header (0." spacing) to facilitate in-system programming (Figure ) of the AT7 parts. The control signals generated by the software are fed to the header, as well as to socket U on the board. By placing a similar socket on the target system and connecting the programming board to that target system, the programming algorithms written by Atmel can be used to program an AT7 device in-system. ATDH00E 06G CNFG /09

3 ATDH00E Related Documents ATDH00E Programming Kit User Guide AT7 Series datasheet Programming Specification for Atmel s FPGA Configuration memories In-System Programming Cascaded Configurators AT7A Series datasheet Adapters Available for the ATDH00E ATDH 0-lead PLCC adapter (supplied with kit) ATDH 0-lead SOIC adapter ATDH 8-lead SOIC adapter ATDH -lead TQFP ATDH6 -lead TQFP ATDH7 -lead PLCC (non-a parts only) ATDH7A -lead PLCC (A parts only) ATDH8 8-lead LAP 06G CNFG /09

4 Schematics Programming Connections D D PROGRAM VERIFY JP Pin 0 activates "SEREN*" on targey board U Pin 9 is the polarizing pin (cut off) DATA 8 U CLK DATA 7 SEREN DATA CE RESET_OE CLK SER_EN* CLK DATA CE* 6 RESET_OE CE RESET/OE* CEO*/A CLK RESET/OE* 6 CE* GND 7 NC NC 8 C GND AT7LVxx 9 0 R 0.uF NC GND P.7K STROBE IN-CIRCUIT PROGRAMING AUTO_FEED Pin 6 is A when in programming mode D0 C C DATA_IN D 6 INIT D 7 SELECT_IN D 8 GND 6 D 9 GND R 7 D.7K 0 GND Tri-State BiDir Data 8 D6 GND U 9 CLKIN SELECT_IN INIT CLKIN D0 8 DATA GND A Y 6 0 ACK A Y 6 GND A Y 8 BUSY A Y 9 ACK GND A Y 7 RESET_OE PE A Y CE GND 7 A Y CLK SELECT A Y 0 G 9 0 DB G GND B B HARRISCD7LPT C.uF A A Title FPGA CONFIGUATOR / PROGRAMMER Size Document Number Rev A ATDH00 (CHW 0) Date: Thursday, March, 00 Sheet of ATDH00E 06G CNFG /09

5 ATDH00E Power Supply Generation D D J U7 VI LM780AT VO GND JP 9VDC 00mA AT7LV(A) AT7F(A)/AT7N U9 LM7T C C REMOVE FOR ISP Layout U & U9 for TO-0 pkgs R=.k for. volts ADJ DC IN D IN00 S POWER + C 00uF R 0ohms D LED IN OUT C 0.0uF R.K R.K B B A A Title FPGA CONFIGUATOR / PROGRAMMER Size Document Number Rev A ATDH00 (CHW 0) Date: Tuesday, March, 00 Sheet of 06G CNFG /09

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