What do all those bits mean now? Number Systems and Arithmetic. Introduction to Binary Numbers. Questions About Numbers

Transcription

1 Wht do ll those bits men now? bits (...) Number Systems nd Arithmetic or Computers go to elementry school instruction R-formt I-formt... integer dt number text chrs... floting point signed unsigned single precision double precision Questions About Numbers How do you represent negtive numbers? frctions? relly lrge numbers? relly smll numbers? How do you do rithmetic? identify errors (e.g. overflow)? Wht is n nd wht does it look like? =rithmetic logic unit Introduction to Binry Numbers Consider 4-bit binry number Deciml Binry Deciml Binry Exmples of binry rithmetic: = 5 = 6

2 Negtive Numbers? Some Alterntives We would like number system tht provides uses for ddition single vlue of equl coverge of positive nd negtive numbers esy esy negtion Sign Mgnitude -- MSB is sign bit, rest the sme - == -5 == One s complement -- flip ll bits to negte - == -5 == Two s Complement Representtion s complement representtion of negtive numbers Tke the bitwise inverse nd dd Biggest 4-bit Binry Number: 7 Smllest 4-bit Binry Number: - Deciml Two s Complement Binry Two s Complement Arithmetic Deciml s Complement Binry Deciml s Complement Binry Exmples: 7-6 = 7 (- 6) = - 5 = (- 5) = -

3 Some Things We Wnt To Know About Our Number System Detection negtion sign extension => - => overflow detection So how do we detect overflow? Instruction Fetch Instruction Decode Opernd Fetch Execute Store Next Instruction Arithmetic -- The hert of instruction execution b opertion result Designing n Arithmetic Logic Unit A B N N op Control Lines (op) Function And Or Add Subtrct Set-on-less-thn N Zero

4 A One Bit A One-bit Full (Review) This -bit will perform AND, OR, nd ADD This is lso clled (, ) dder Hlf : No Truth Tble: A B -bit Full S - b Inputs Outputs A B Sum Comments = = = = = = = = Logic Eqution for (Review) Logic Eqution for Sum (Review) Inputs Outputs Inputs Outputs A B Sum Comments = = = = = = = = A B Sum Comments = = = = = = = = = (!A & B & ) (A &!B & ) (A & B &!) (A & B & ) = B & A & A & B Sum = (!A &!B & ) (!A & B &!) (A &!B &!) (A & B & )

5 A -bit -bit -bit b b How About Subtrction? Keep in mind the following: (A - B) is the sme s: A (-B) s Complement negte: Tke the inverse of every bit nd dd Bit-wise inverse of B is!b: A - B =??? Binvert b b b b Detection Logic Crry into MSB! = Crry out of MSB For N-bit : =???? Zero Detection Logic Zero Detection Logic is just one BIG NOR gte Any non-zero input to the NOR gte will cuse its output to be zero A B A B A B A B -bit -bit -bit -bit X Y X XOR Y A B A B A B A B -bit -bit -bit -bit Zero

6 Set-on-less-thn Binvert b Binvert Full Bnegte Do subtrct use sign bit route to bit of result ll other bits zero. Binvert b b b b b b b wht signls ccomplish: neg oper dd? sub? nd? Zero or? beq? slt? Set b. detection b b Set Set sign bit (dder output from bit ) The Disdvntge of Ripple Crry The dder we just built is clled Ripple Crry The crry bit my hve to propgte from LSB to MSB Worst cse dely for n N-bit RC dder: N-gte dely Problem: ripple crry dder is slow A B A B A B A B -bit -bit -bit -bit A B Is there more thn one wy to do ddition? two extremes: ripple crry nd sum-of-products Cn you see the ripple? How could you get rid of it? c = b c c b c = b c c b c = c = b c c b c = c 4 = b c c b c 4 = Not fesible! Why?

7 Crry Lookhed s (Review) Cin Cout B A -bit Cin We ll define two new terms, bsed on the reltionship between C in nd C out Generte Crry t Bit i gi = Ai & Bi Propgte Crry vi Bit i pi = Ai or Bi Cin Cout B A -bit Crry Lookhed (Continued) Using the two new terms we just defined: Generte Crry t Bit i gi = Ai & Bi Propgte Crry vi Bit i pi = Ai or Bi We cn rewrite: Cin = g (p & Cin) Cin = g (p & g) (p & p & Cin) Cin = g (p & g) (p & p & g) (p & p & p & Cin) Crry going into bit is if We generte crry t bit (g) Or we generte crry t bit (g) nd bit llows it to propgte (p & g) Or we generte crry t bit (g) nd bit s well s bit llows it to propgte (p & p & g) Or we hve crry input t bit (Cin) nd bit,, nd ll llow it to propgte (p & p & p & Cin) A Prtil Crry Lookhed It is very expensive to build full crry lookhed dder Just imgine the length of the eqution for Cin Common prctices: Connect severl N-bit Lookhed s to form big dder Exmple: connect four -bit crry lookhed dders to form -bit prtil crry lookhed dder A[:4] B[:4] -bit Crry Lookhed [:4] C4 A[:6] B[:6] -bit Crry Lookhed [:6] C6 A[5:] -bit Crry Lookhed B[5:] [5:] C A[7:] -bit Crry Lookhed B[7:] [7:] C b b b b 4 b4 5 b5 6 b6 7 b7 b 9 b9 b b b b 4 b4 5 b5 P G P G P G P G C C C C4 pi gi ci pi gi ci pi gi ci pi gi ci 4 -- Crry-lookhed unit Hierrchicl Crry- Lookhed s P = p & p & p & p Worst-cse dely?? Worst-cse dely??

8 MULTIPLY Pper nd pencil exmple: Multiplicnd Multiplier x Product m bits x n bits = bit product Binry mkes it esy: => plce ( x multiplicnd) => plce multiplicnd ( x multiplicnd) we ll look t couple of versions of multipliction hrdwre MULTIPLY HARDWARE Version 64-bit Multiplicnd reg, 64-bit, 64-bit Product reg, -bit multiplier reg 64-bit Product Multiplicnd Shift left 64 bits 64 bits Write Control test Multiplier Shift right bits Multiply Algorithm Version Multiplier Multiplicnd Product Multiplier =. Add multiplicnd to product nd plce the result in Product register Strt. Test Multiplier. Shift the Multiplicnd register left bit. Shift the Multiplier register right bit nd repetition? Multiplier = No: < repetitions Observtions on Multiply Version clock per cycle => clocks per multiply Rtio of multiply to dd : / bits in multiplicnd lwys => 64-bit dder is wsted s inserted in left of multiplicnd s shifted => lest significnt bits of product never chnged once formed Insted of shifting multiplicnd to left, shift product to right? Wsted spce (zeroes) in product register exctly mtches meningful bits of multiplier t ll times. Combine? Yes: repetitions Done

9 MULTIPLY HARDWARE Version -bit Multiplicnd reg, -bit, 64-bit Product reg, (-bit Multiplier reg) -bit Multiplicnd bits Product 64 bits Shift right Write Control test Product =. Add multiplicnd to the left hlf of the product nd plce the result in the left hlf of the Product register Strt. Test Product Product =. Shift the Product register right bit Observtions on Multiply Version steps per bit becuse Multiplier & Product combined -bit dder MIPS registers Hi nd Lo re left nd right hlf of Product Gives us MIPS instruction MultU Wht bout signed multipliction? esiest solution is to mke both & remember whether to product when done (leve out the sign bit, run for steps) nd repetition? No: < repetitions Yes: repetitions Done Key Points Instruction Set drives the design performnce, CPU clock speed driven by dder dely Multiply is expensive