DESCRIPTION FEATURES APPLICATIONS SI PLIFIED BLOCK DIAGRAM. LTC1477/LTC1478 Single and Dual Protected High Side Switches

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1 LTC77/LTC78 Single and Dual Protected High Side Switches FEATRES Extremely Low R DS(ON) Switch:.7Ω No Parasitic Body Diode Built-In Short-Circuit Protection: A Built-In Thermal Overload Protection Operates from.7v to.v Inrush Current Limited ltralow Standby Current:.µA Built-In Charge Pump Controlled Rise and Fall Times: t R = ms Single Switch in 8-Pin SO Package Dual Switch in Narrow -Pin SO Package APPLICATIONS Notebook Computer Power Management Power Supply/Load Protection Supply/Battery Switch-Over Circuits Circuit Breaker Function "Hot Swap" Board Protection Peripheral Power Protection DESCRIPTION The LTC 77/LTC78 protected high side switches provide extremely low R DS(ON) switching with built-in protection against short-circuit and thermal overload conditions. A built-in charge pump generates gate drive higher than the supply voltage to fully enhance the internal NMOS switch. This switch has no parasitic body diode and therefore no current flows through the switch when it is turned off and the output is forced above the input supply voltage. (DMOS switches have parasitic body diodes that become forward biased under these conditions.) Two levels of protection are provided by the LTC77/LTC78. The first level of protection is shortcircuit current limit which is set at A. The short-circuit current can be reduced to as low as.8a by disconnecting portions of the power device (see Applications Information). The second level of protection is provided by thermal overload protection which limits the die temperature to approximately C. The LTC77 single is available in 8-lead SO packaging. The LTC78 dual is available in -lead SO packaging., LTC and LT are registered trademarks of Linear Technology Corporation. SI PLIFIED BLOCK DIAGRAM W W V IN V IN V IN Switch Output Voltage. GATE CHARGE AND DISCHARGE CONTROL LOGIC CHARGE PMP CRRT LIMIT AND THERMAL SHTDOWN * * * OTPT VOLTAGE (V) T A = C V IN = V IN = V IN = = V *NMOS SWITCHES WITH NO PARASITIC BODY DIODES LTC77/78 TA OTPT CRRT (A) LTC77/78 TP

2 LTC77/LTC78 ABSOLTE MAXIMM RATINGS W W W Supply Voltage... 7V Enable Input Voltage... (7V) to (.V) Output Voltage (OFF) (Note )... (7V) to (.V) Output Short-Circuit Duration... Indefinite Junction Temperature... C Operating Temperature LTC77C/LTC78C... C to 7 C Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... C PACKAGE/ORDER INFORMATION V IN TOP VIEW 8 7 S8 PACKAGE 8-LEAD PLASTIC SO T JMAX = C, θ JA = C/ W V IN V IN Consult factory for Industrial and Military grade parts. W ORDER PART NMBER LTC77CS8 S8 PART MARKING 77 A AV IN A A BV IN BV IN 7 B 8 TOP VIEW A AV IN AV IN B B BV IN 9 B S PACKAGE -LEAD PLASTIC SO T JMAX = C, θ JA = C/ W ORDER PART NMBER LTC78CS ELECTRICAL CHARACTERISTICS = V IN = V IN = V IN = V (Note ), T A = C, unless otherwise noted. Each channel of the LTC78 is tested separately (Note ). SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS V IN Supply Voltage Range.7. V I VIN Supply Current Switch OFF, Enable = V. µa Switch ON, Enable = V, V IN = V 8 µa Switch ON, Enable =.V, V IN =.V 8 µa R ON ON Resistance = V IN = V IN = V IN = V, I OT = A.7. Ω = V IN = V IN = V IN =.V, I OT = A.8. Ω = V IN = V, V IN = V IN =, I OT =.A.. Ω = V IN =.V, V IN = V IN =, I OT =.A.. Ω I LKG Output Leakage Current OFF Switch OFF, Enable = V ± µa I SC Short-Circuit Current Limit = V IN = V IN = V IN = V, = V, (Note )... A = V IN = V, V IN = V IN =, = V, (Note ).8.8. A V H Enable Input High Voltage.V.V. V V L Enable Input Low Voltage.V.V.8 V I Enable Input Current V V.V ± µa t DR Delay and Rise Time R OT = Ω, C OT = µf, to 9% of Final Value... ms The denotes specifications which apply over the full operating temperature range. Note : The pins must be connected together. Note : The and V IN pins must be connected together. The V IN and V IN pins are typically connected to and V IN pins but can be selectively disconnected to reduce the short-circuit current limit and increase the ON resistance of the switch. The LTC78 pins must be connected together. (See Pin Functions and Block Diagram for more detail.) Note : Other channel turned OFF, i.e. A and B = V. Note : The output is protected with fold-back current limit which reduces the short-circuit (V) currents below peak permissible current levels at higher output voltages. (See Typical Performance Characteristics for further detail on output current versus output voltage).

3 LTC77/LTC78 TYPICAL PERFORMAE CHARACTERISTICS W Supply Current (ON) Switch Resistance Switch Resistance (V) T A = C OTPT TRNED ON, NO LOAD.. T A = C.. SPPLY CRRT (µa) SWITCH RESISTAE (Ω)... V IN = V IN = SWITCH RESISTAE (Ω)... = V IN = V V IN = V IN = ALL V IN PINS = V. ALL V IN PINS CONNECTED. SPPLY VOLTAGE (V) INPT VOLTAGE (V) 7 7 JTION TEMPERATRE ( C) LTC77/78 TPC LTC77/78 TPC LTC77/78 TPC SWITCH RESISTAE (Ω) Switch Resistance (.V) Short-Circuit Current Output Current (V) = V IN =.V V IN = V IN = ALL V IN PINS =.V SHORT-CIRCIT CRRT (A) T J = C ALL V IN PINS CONNECTED V IN = V IN = OTPT CRRT (A) T A = C ALL V IN PINS = V V IN = V IN = 7 JTION TEMPERATRE ( C) SPPLY VOLTAGE (V) OTPT VOLTAGE (V) LTC77/78 TPC LTC77/78 TPC LTC77/78 TPC OTPT CRRT (A) Output Current (.V) Inrush Current (V) Inrush Current (.V) T A = C ALL V IN PINS =.V V IN = V IN = OTPT VOLTAGE (V) INRSH CRRT (A) OTPT VOLTAGE (V). C OT = µf R OT = Ω TIME (ms) CRRT LIMITED C OT = 7µF R OT = Ω T J = C ALL V IN PINS = V INRSH CRRT (A) OTPT VOLTAGE (V). CRRT LIMITED C OT = µf R OT = Ω TIME (ms) T J = C ALL V IN PINS =.V C OT = 7µF R OT = Ω.8 LTC77/78 TPC7 LTC77/78 TPC8 LTC77/78 TPC9

4 LTC77/LTC78 PIN FTIONS LTC77 (Pin ): The enable input is a high impedance CMOS gate with an ESD protection diode to ground and should not be forced below ground. This input has about mv of built-in hysteresis to ensure clean switching., V IN (Pins,): The supply pin must always be connected to the V IN supply pin (see Block Diagram). The supply pin provides power for the input control logic, the current limit and thermal shutdown circuitry; plus provides a sense connection to the input power supply. The gate of the NMOS switch is powered by a charge pump from the supply pin (see Block Diagram). The V IN supply pin provides connection to the drain of / of the output power device. V IN, V IN (Pins 7,): The V IN and V IN supply pins are typically tied to the and V IN supply pins for lowest ON resistance; i.e., when all four V IN pins are connected together the entire power device is connected (see Block Diagram). Each auxiliary supply pin, V IN and V IN, is connected to the drain of / of the power device. The V IN and V IN pins can be selectively disconnected to reduce the short-circuit current limit at the expense of higher R DS(ON). (See Applications Information section for more details.) (Pins,8): The output pins of the LTC77 must always be tied together. The output is protected against accidental short circuits to ground by a current limit circuit which protects the system power supply and load against damage. A second level of protection is provided by thermal shutdown circuitry which limits the die temperature to C. LTC78 A, B (Pins,): The enable inputs are high impedance CMOS gates with ESD protection diodes to ground and should not be forced below ground. These inputs have about mv of built-in hysteresis to ensure clean switching. A, AV IN, B, BV IN (Pins,;,): The A or B supply pin must always be connected to the AV IN or BV IN supply pin (see Block Diagram). The A and B supply pins provide power for the input control logic, the current limit and thermal shutdown circuitry; plus, provides a sense connection to the input power supply. The gate of the NMOS switch is powered by a charge pump from the A and B supply pins (see Block Diagram). The AV IN and BV IN supply pins provide connection to the drain of / of the output power device. AV IN, AV IN, BV IN, BV IN, (Pins,; 7,): The AV IN, AV IN, BV IN and BV IN supply pins are typically tied to the A, AV IN, B and BV IN supply pins for lowest ON resistance; i.e., when all four AV IN, BV IN pins are connected together the entire power device is connected (see Block Diagram). Each auxiliary supply pin, AV IN, AV IN, BV IN and BV IN, is connected to the drain of approximately / of the corresponding power device. The AV IN, AV IN, BV IN and BV IN pins can be selectively disconnected to reduce the short-circuit current limit at the expense of higher R DS(ON). (See Applications Information section for more details.) A, B (Pins,; 8,9): The outputs of the LTC78 are protected against accidental short circuits to ground by a current limit circuit which protects the system power supplies and loads against damage. A second level of protection is provided by thermal shutdown circuitry which limits the die temperature to approximately C.

5 LTC77/LTC78 OPERATION (LTC77 or single channel of LTC78) Input TTL-CMOS Converter The LTC77 enable input is designed to accommodate a wide range of V and V logic families. The input threshold voltage is approximately.v with mv of hysteresis. The input enables the bias generator, the gate charge pump and the protection circuitry. Therefore, when the enable input is turned off, the entire circuit is powered down and the supply current drops below µa. Ramped Switch Control The LTC77 gate charge pump includes circuitry which ramps the NMOS switch on slowly (ms typical rise time) but turns it off much more quickly (typically µs). Bias, Oscillator and Gate Charge Pump When the switch is enabled, a bias current generator and high frequency oscillator are turned on. The on-chip capacitive charge pump generates approximately V of gate drive for the internal low R DS(ON) NMOS switch from the power supply. No external V supply is required to switch the output. Switch Protection Two levels of protection are designed into the power switch in the LTC77. The switch is protected against accidental short circuits with a current limit circuit which limits the output current to typically A when the output is shorted to ground. The LTC77 also has thermal shutdown set at approximately C which limits the power dissipation to safe levels. LTC78 Operation The LTC78 dual protected switch can be thought of as two independent LTC77 single protected switches. The input supply voltages may be from separate power sources. The ground connection, however, is common to both channels and must be connected to the same potential. BLOCK DIAGRAM W (LTC77 or single channel of LTC78) V IN V IN V IN GATE CHARGE AND DISCHARGE CONTROL LOGIC TTL-TO-CMOS CONVERTER OSCILLATOR AND BIAS CHARGE PMP CRRT LIMIT AND THERMAL SHTDOWN LTC77/78 BD APPLICATIONS INFORMATION W Tailoring I LIMIT and R DS(ON) for Load Requirements The LTC77 is designed to current limit at approximately A during a short circuit with all the V IN pins connected to the input power supply. It is possible however, to reduce this current by selectively disconnecting two of the four power supply pins (V IN and V IN ). Table lists the effects of disconnecting these pins on R DS(ON) and short-circuit current limit Table. Effects of Disconnecting V IN and V IN ALL V IN PINS V IN V IN AND V IN CONNECTED DISCONNECTED DISCONNECTED R DS(ON).7Ω.9Ω.Ω I LIMIT A.A.8A Note: V Operation Note that there is an inverse relationship between output current limit and switch resistance. This allows the tailor-

6 LTC77/LTC78 APPLICATIONS INFORMATION W ing of the switch parameters to the expected load current and system current limit requirements. A couple of examples are helpful:. If a nominal load of A was controlled by the switch configured to current limit at A (all V IN pins connected together), the R DS(ON) would be.7ω and the voltage drop across the switch would be 7mV. The power dissipated by the switch would only be 7mW.. If a nominal load of.a was controlled by the switch configured to current limit at.8a (V IN and V IN disconnected), the R DS(ON) would increase to.ω. But the voltage drop would remain at 7mV and the switch power dissipation would drop to mw. Supply Bypassing For best results, bypass the supply input pins with a single.µf capacitor as close as possible to the LTC77. Sometimes, much larger capacitors are already available at the output of the power supply. In this case, it is still good practice to use a.µf capacitor as close as possible TYPICAL APPLICATIONS A Protected Switch to the LTC77, especially if the power supply output capacitor is more than inches away on the printed circuit board. Output Capacitor The output pin is designed to ramp on slowly, typically ms rise time. Therefore, very large output capacitors can be driven without producing voltage spikes on the supply pins (see graphs in Typical Performance Characteristics). The output pin should have a µf capacitor for noise reduction and smoothing. Supply and Input Sequencing The LTC77 is designed to operate with continuous power (quiescent current drops to < µa when disabled). If the power must be turned off, for example to enter a system sleep mode, the enable input must be turned off µs before the input supply is turned off to ensure that the gate of the NMOS switch is completely discharged before power is removed. However, the input control and power can be applied simultaneously during power up..a Protected Switch.7V TO.V.µF I SC = A µf.7v TO.V.µF I SC =.A µf V IN LTC77 V IN V IN V IN LTC77 V IN V IN LTC77/78 TA LTC77/78 TA.8A Protected Switch A Protected Switch Driving a Large Capacitive Load.7V TO.V I SC =.8A.µF V IN V IN LTC77 V IN µf.7v TO.V.µF V IN LTC77 V IN V IN C LOAD µf LTC77/78 TA LTC77/78 TA

7 TYPICAL APPLICATIONS V LTC77/LTC78 Adding Short-Circuit Protection to an LT Step-p Switching Regulator (.µa Standby Current).µF V IN LTC77 V IN V IN *COILCRAFT DO8- µf V L* µh V IN SW SEL SSE SHDN P 8 LT 7 I LIM D MBRSLT.µF DN7 F V 7µF V TANT V to.v Selector Switch with Slope Control and.µa Standby Current V.µF A AV IN A AV IN k V/A OR.V/A µf V A AV IN V * A LTC78 B.V BV IN B.µF BV IN BV IN B B.V * LTC77/78 TA8 *ALLOW AT LEAST ms BETWE V AND.V SWITCHING FOR DISCHARGE OF µf OTPT CAPACITOR Single Li-Ion Cell to V Converter/Switch with Load Disconnect Below.7V (.7V to.v) SINGLE Li-Ion CELL* µf V k % k % k 7 V IN µh SMIDA CD- MBRSLT SW I LIM SSE 8 LTCS8- LBI SHDN LBO (V) µf V TANT V IN V IN LTC77 V IN LTC77/78 TA9 µf V *PRIMARY Li-Ion BATTERY PROTECTION MST BE PROVIDED BY AN INDEPDT CIRCIT Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7

8 LTC77/LTC78 PACKAGE DESCRIPTION.8. (..).. (..8) 8 TYP Dimension in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow.) (LTC DWG # -8-)..9 (..7).. (..).89.97* (.8.) (..8) *DIMSION DOES NOT ILDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.mm) PER SIDE ** DIMSION DOES NOT ILDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.mm) PER SIDE. (.7) BSC S Package -Lead Plastic Small Outline (Narrow.) (LTC DWG # -8-).8. (.79.97).8.9* (9.8.8) 9..7** (.8.988) SO (.79.97)..7** (.8.988).8. (..).. (..8) 8 TYP..9 (..7) (..)....7 *DIMSION DOES NOT ILDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.mm) PER SIDE ** DIMSION DOES NOT ILDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.mm) PER SIDE..9 (..8). (.7) TYP S 9 RELATED PARTS PART NMBER DESCRIPTION COMMTS 8 LTC Electronic Circuit Breaker MOSFET Driver with Adjustable Reset Time LTC Single High Side Driver MOSFET Driver with Switch Status Output LTC Dual High Side Driver Dual MOSFET Driver with Protection LTC7 V and.v V CC Switch SafeSlot TM Protected Switch in 8-Lead SO LTC7 Dual V and.v V CC Switch Dual Version of LTC7 in -Lead SO LTC7 PCMCIA V CC and VPP Switches Complete Single Channel SafeSlot Protection SafeSlot is a trademark of Linear Technology Corporation. Linear Technology Corporation McCarthy Blvd., Milpitas, CA 9-77 (8) -9 FAX: (8) -7 TELEX: LT/GP 99 K PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 99