Analogue to Digital Converters

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1 Analogue to Digital Converters An analogue-to-digital converter (abbreviated ADC, A/D or A to D) is an electronic integrated circuit, which converts continuous signals to discrete digital numbers. Applications AD converters are used virtually any where, an analogue signal has to be processed, stored, or transported in digital form. Fast video ADCs are used, for example, in TV tuner cards. Slow on-chip 8, 10, 12, or 16 bit ADCs are common in microcontrollers (like PIC18F252). Very fast ADCs are needed in digital oscilloscopes, and are crucial for new applications like software defined radio. ADC s dynamic range is also important. Concepts (i) Resolution The resolution of the converter indicates the number of discrete values it can produce over the range of analogue values. The values are usually stored electronically in binary form, so the resolution is usually expressed in bits. In consequence, the number of discrete values or levels, available, is usually a power of two. For example, an ADC with a resolution of 8 bits can encode an analog input to one in 256 different levels. The values can represent the ranges from 0 to 255. Example 1 o Full scale measurement range = 0 to 10 volts o ADC resolution is 12 bits: 4096 quantization levels (codes) o ADC voltage resolution is: (10V - 0V) / 4096 codes = 10V / 4096 codes = volts/code = 2.44 mv/code Example 2 o Full scale measurement range = -10 to +10 volts o ADC resolution is 14 bits: quantization levels (codes) o ADC voltage resolution is: (10V - (-10V)) / codes = 20V / codes = volts/code = 1.22 mv/code B222L Microcontrollers and Programmable Logic : Hassan Parchizadeh Page 1

2 Example 3 o Full scale measurement range = 0 to 8 volts o ADC resolution is 3 bits: 8 quantization levels (codes) o ADC voltage resolution is: (8 V 0 V)/8 codes = 8 V/8 codes = 1 volts/code = 1000 mv/code In practice, the useful resolution of the converter is limited by the signalto-noise ratio of the signal in question. If there is too much noise present in the analog input, it will be impossible to accurately resolve beyond a certain number of bits of resolution, the "effective number of bits" (ENOB). If a preamplifier has been used prior to A/D conversion, the noise introduced by the amplifier is an important contributing factor towards the overall SNR. While the ADC will produce a result, the result is not accurate, since its lower bits are simply measuring noise. (ii) Accuracy An ADC has several sources of errors. One is Quantization error. Hence errors are measured in a unit called the LSB, which is an abbreviation for least significant bit. In the case of an eight-bit ADC, an error of one LSB is 1/256 = of the full signal range, or about 0.4%. (iii) Sampling rate The analogue signal is continuous in time and it is necessary to convert this to a flow of digital values. It is therefore required to define the rate at which new digital values are sampled from the analogue signal. The rate of new values is called the sampling rate or sampling frequency of the converter. A continuously varying signal can be sampled (that is, the signal values at intervals of time T, the sampling time, are measured and stored) and then the original signal can be reproduced from the discrete-time values. The accuracy is limited by quantization error. However, this faithful reproduction is only possible if the sampling rate is at least higher than twice the highest frequency of the signal. This is essentially what is embodied in the Shannon-Nyquist sampling theorem. Since a practical ADC cannot make an instantaneous conversion, the input value must necessarily be held constant during the time that the B222L Microcontrollers and Programmable Logic : Hassan Parchizadeh Page 2

3 converter performs a conversion (called the conversion time). An input circuit called a sample and hold performs this task in most cases by using a capacitor to store the analogue voltage at the input, and using an electronic switch or gate to disconnect the capacitor from the input. Many ADC integrated circuits include the sample and hold subsystem internally. (iv) Aliasing All ADCs work by sampling their input at discrete intervals of time. Their output is therefore an incomplete picture of the behaviour of the input. There is no way of knowing, by looking at the output, what the input was doing between one sampling instant and the next. If the input is known to be changing slowly compared to the sampling rate, then it can be assumed that the value of the signal between two sample instants was somewhere between the two sampled values. If, however, the input signal is changing fast compared to the sample rate, then this assumption is not valid. If the digital values produced by the ADC are, at some later stage in the system, converted back to analog values by a DAC, it is desirable that the output of the DAC be a faithful representation of the original signal. If the input signal is changing much faster than the sample rate, then this will not be the case, and spurious signals called aliases will be produced at the output of the DAC. The frequency of the aliased signal is the difference between the signal frequency and the sampling rate. For example, a 2 khz sinewave being sampled at 1.5 khz would be reconstructed as a 500 Hz sinewave. This problem is called aliasing. To avoid aliasing, the input to an ADC must be low-pass filtered to remove frequencies above half the sampling rate. This filter is called an anti-aliasing filter, and is essential for a practical ADC system that is applied to analog signals with higher frequency content. B222L Microcontrollers and Programmable Logic : Hassan Parchizadeh Page 3

4 Types of ADCs a ) ramp or stair case converter End of Conversion V in + - Gated Cock Clock N-bit Counter B0(LSB) B1 Start of Conversion B N-1 (MSB) DAC V REF At the beginning of the conversion, the counter is set to zero and a gated clock pulse would be enabled to allow the converter to increment until the output of the DAC exceeds the analogue input when the output of the comparator changes and inhibits the clock. The output of the DAC is ramp or stair case as shown. Voltage time The conversion time on the ramp type is NOT fixed but depends on the actual value of the analogue input expressed as a fraction of the full scale. This can be expressed as :- Conversion time = Vin Vref 2 N T where N is the number of bits and T is the time period of the clock pulse. Example : A ramp type ADC has the following parameters, N=8, Vref=5.1V and clock=1mhz. Find the digital word for an Vin of 4.36V and the conversion time taken to reach this value. Step size = 5.1v / 2 N = 5.1V / 256 = The nimber of steps = 4.36 / 0.02 = B222L Microcontrollers and Programmable Logic : Hassan Parchizadeh Page 4

5 = Conversion time = 219 x 1/1MHz = 219 x 1 us = 219 us Exercise : Repeat the above for a voltage of (a) 0.1V and (b) 4.9v. b ) successive-approximation ADC This uses a comparator to accept/reject ranges of voltages, eventually settling on a final voltage range. Successive approximation works by constantly comparing the input voltage to the output of an internal digital to analogue converter (DAC, fed by the current value of the approximation) until the best approximation is achieved. At each step in this process, a binary value of the approximation is stored in a successive approximation register (SAR). Ring Counter Clock Start of Conversion V in S/H + - Control logic & SAR End of Conversion B0(LSB) B1 B N-1 (MSB) DAC V REF At start, using a ring counter, the successive approximation register is initialized so that the most significant bit (MSB) is set to a logic 1. This code is fed into the DAC which then supplies the analogue equivalent of this digital code (Vref/2) into the comparator circuit for comparison with the sampled input voltage. If this analogue voltage exceeds Vin the comparator causes the SAR to reset this bit and set the next bit to a logic 1. If it is lower then the bit is left a 1 and the next bit is set to 1. This binary search continues until every bit in the SAR has been tested. The resulting code is the digital approximation of the sampled input voltage and is finally output by the ADC at the end of the conversion (EOC). The advantage of this type over ramp ADC is, that the conversion time is always fixed and only dependent on the clock B222L Microcontrollers and Programmable Logic : Hassan Parchizadeh Page 5

6 c ) direct conversion ADC or flash ADC This has a bank of comparators, each firing for their decoded voltage range. The comparator bank feeds a logic circuit that generates a code for each voltage range. Direct conversion is very fast, but usually has only 8 bits of resolution (255 comparators - since 2N 1 comparators are required ), as it needs a large, expensive circuit., ADCs of this type have a large die size, a high input capacitance, and are prone to produce glitches on the output (by outputting an out-of-sequence code). They are often used for video, wideband communications. PIC 18F252 ADCs The Analogue-to-Digital (A/D) converter module has five inputs for the PIC18F252. This module has the ADCON0 and ADCON1 register definitions that are compatible with the mid-range A/D module. The A/D module has four registers. These registers are: A/D Result High Register (ADRESH) A/D Result Low Register (ADRESL) A/D Control Register 0 (ADCON0) A/D Control Register 1 (ADCON1) The ADCON0 register controls the operation of the A/D module. B222L Microcontrollers and Programmable Logic : Hassan Parchizadeh Page 6

7 The ADCON1 register, configures the functions of the port pins. B222L Microcontrollers and Programmable Logic : Hassan Parchizadeh Page 7

8 Example ; Write a program to read an analogue input and put the left justified 8-bit result on the portb. The ADC should be configured with ADC clock = Fosc/32, Vref+ = Vdd, Vref - = Vss, and input should be read on channel 0. 1 /*************************************************** 2 // Hardware INPUT-RA0, OUTPUTS-PORTB=LEDs / R2R * 3 // * 4 // ADCON0 - REGISTER * 5 // * 6 //CS1 ADCS0 CHS2 CHS1 CHS0 GO/DONE --- ADON * 7 //************************************************** 8 // ADCON1 - REGISTER * 9 // * 10//ADFM ADCS PCFG3 PCFG2 PCFG1 PCFG0 * 11//************************************************** 12 B222L Microcontrollers and Programmable Logic : Hassan Parchizadeh Page 8

9 13 #include <p18f252.h> void main(void) { 16 char dac_value; 17 int i; // ADC Setup 20 TRISA = 0xFF; //port A, all bits, inputs ADCON1bits.PCFG3=1; //AD port configuration 23 ADCON1bits.PCFG2=1; //only ch0 as analogue 24 ADCON1bits.PCFG1=1; // VREF+ VREF- 25 ADCON1bits.PCFG0=0; //D D D D D D D A VDD VSS 26 ADCON1bits.ADCS2=0; 27 ADCON0bits.ADCS1=1; 28 ADCON0bits.ADCS0=0; //ADC clock = Fsoc/32 29 ADCON0bits.CHS2 =0; 30 ADCON0bits.CHS1 =0; 31 ADCON0bits.CHS0 =0; //select channel 0 32 ADCON0bits.ADON =1; //turn on ADC ADCON1bits.ADFM =0; //left justification TRISB = 0x00; //port B, all bits, outputs while (1){ // run for ever 39 ADCON0bits.GO_DONE = 1; //start conversion 40 while(adcon0bits.go_done)//wait for conversion end 41 ; 42 PORTB = ADRESH; //send to DAC 43 } 44 } Exercise 1 : How would you modify your hardware to use the 10-bit results? Exercise 2 : Modify the software in the example above, so the 10-bit results would be displayed. Exercise 3 : What is the accuracy for 8-bit and 10-bit ADCs? B222L Microcontrollers and Programmable Logic : Hassan Parchizadeh Page 9

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