FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO. LTC1232 Microprocessor Supervisory Circuits

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1 Microprocessor Supervisory Circuits FEATRES Guaranteed Reset Assertion at = V 8-Pin SO Plastic Package.0mA Maximum Supply Current 4.6V/4.7V Precision Voltage Monitor Power OK/Reset Time Delay: 600ms Minimum External Component Count Superior pgrade for DS APPLICATIO S Critical µp Power Monitoring Intelligent Instruments Computers and Controllers Automotive Systems DESCRIPTIO The LTC provides power supply monitoring, watchdog timing and external reset for microprocessor systems. A precise internal voltage reference and comparator circuit monitor the power supply line. When an out-of-tolerance condition occurs, the reset outputs are forced to active states. The output is guaranteed to remain logic low even with as low as V. The LTC has an internal watchdog timer which forces the reset outputs to active states when the Strobe input is not forced low prior to a preset time-out period. The watchdog timing can be set to operate on time-out periods of typically 0ms, 600ms or. seconds. The LTC performs push-button reset control. The LTC debounces the push-button input and guarantees an active reset pulse width of 0ms minimum., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO V DC Output Voltage vs Supply Voltage V DC PB TD ST LTC TOL GND 00k MP (e.g. 680) I/O LINE RESET OTPT VOLTAGE (V) 4 LTC TA SPPLY VOLTAGE (V) LTC TA0

2 ABSOLTE AXI RATI GS (Note, and ) W W W Terminal Voltage... 0.V to 7.0V ST and... 0.V to 7.0V All Other Inputs and Outputs... 0.V to +0.V Power Dissipation... 00mW Operating Temperature Range LTCC... 0 C to 70 C LTCI C to 8 C Storage Temperature Range... 6 C to 0 C Lead Temperature (Soldering, 0 sec) C W PACKAGE/ORDER I FOR ATIO PB TD TOL GND 4 TOP VIEW ST N8 PACKAGE 8-LEAD PDIP T JMAX = 00 C, θ JA = 0 C/W PB TD TOL GND 4 TOP VIEW ST S8 PACKAGE 8-LEAD PLASTIC SO T JMAX = 00 C, θ JA = 80 C/W ORDER PART NMBER LTCCN8 ORDER PART NMBER LTCCS8 LTCIS8 S8 PART MARKING I Consult LTC Marketing for parts specified with wider operating temperature ranges. PRODCT SELECTIO GIDE POWER RAM CONDITIONAL WATCHDOG BATTERY FAIL WRITE PSH-BTTON BATTERY PINS RESET TIMER BACKP WARNING PROTECT RESET BACKP LTC 8 X X X LTC690 8 X X X X LTC69 6 X X X X X LTC694 8 X X X X LTC69 6 X X X X X LTC699 8 X X LTC 6 X X X X X X X

3 RECO E DED OPERATI G CO DITIO S WW over the full operating temperature. = full operating range. The denotes the specifications which apply SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS Supply Voltage 4.. V V IH ST and PB Input High Level +0. V V IL ST and PB Input Low Level V DC ELECTRICAL CHARACTERISTICS temperature. = full operating range. The denotes the specifications which apply over the full operating SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS I IL Input Leakage (Note ) µa I OH Output Current at.4v (Note ) ma I OL Output Current at 0.4V (Note ) 6 ma I CC Supply Current (Note 4) 0. ma TP Trip Point TOL = GND V TP Trip Point TOL = V V HYS Trip Point Hysteresis 40 mv V Output Voltage at = V I SINK = 0µA 4 00 mv AC CHARACTERISTICS = full operating range. The denotes the specifications which apply over the full operating temperature. SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS t PB PB = V IL 40 ms t RESET Active Time ms t ST ST Pulse Width 0 ns t RPD Detect to and 00 ns t f Slew Rate 4.7V 4.V 00 µs t RP Detect to and t R = µs ms (Reset Active Time) t R Slew Rate 4.V 4.7V 0 ns t TD ST Pin Detect to and TD = GND ms (Watchdog Time-Out Period) TD = Floating ms TD = ms C IN Input Capacitance pf C OT Output Capacitance pf Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : All voltage values are with respect to GND. Note : The PB pin is internally pulled up to with an internal impedance of 0k typical. The TD pin has internal bias current. Note 4: Measured with outputs open. Note : The pin is an open drain output.

4 W W TI I G DIAGRA S Push-Button Reset Power Down PB V IL t PB V IH V IL V IH t LTC TD0 4.7V 4.V t F 4.0V t RPD V OH V OL Strobe Input Power p LTC TD0 t ST t R 4.7V 4.0V 4.V t TD LTC TD0 t RP V OH V OL LTC TD04 BLOCK DIAGRA W TOL 8 6 %, 0% SWITCH + C RESET PLSE GENERATOR.V OSC PB LEVEL SENSE AND DEBONCE WATCHDOG TIMER ST 7 LEVEL SENSE TD TIME-OT SELECTION LTC BD0 4

5 TYPICAL PERFOR A CE CHARACTERISTICS W Trip Point vs Temperature Trip Point vs Temperature Reset Active Time vs Temperature 4.6 TOL = GND 4.8 TOL = 696 = V TRIP POINT (V) TRIP POINT (V) RESET ACTIVE TIME (ms) TEMPERATRE ( C) TEMPERATRE ( C) TEMPERATRE ( C) LTC TPC0 LTC TPC0 LTC TPC0 Time-Out Period vs Temperature Output Voltage vs Supply Voltage WATCHDOG TIME-OT PERIOD (ms) = V TD = NO CONNECTION OTPT VOLTAGE (V) 4 T A = C EXTERNAL PLL-P = 0µA TEMPERATRE ( C) SPPLY VOLTAGE (V) LTC TPC04 LTC TPC0 PI F CTIO S : V Supply Input. The pin should be bypassed with a 0.µF capacitor. GND: Ground Pin. PB : Logic Input to be Directly Connected to a Push- Button. The PB input requires an active low signal which is debounced and timed for a minimum of 40ms. When this condition is satisfied, the reset pulse generator forces the reset outputs to active states. The reset outputs remain in active states for a minimum of 0ms after PB is released from logic low level. TOL: Input to Select % or 0% Variation on. When TOL is connected to GND, the reset pulse generator forces the reset outputs to active states as falls below 4.7V (4.6V typical). When TOL is connected to, the reset pulse generator forces the reset outputs to active states as falls below 4.V (4.7V typical). TD: Time-Out Delay. TD is a three-level input to select three different time-out periods. The time-out period is set by the TD input to be 0ms with TD connected to GND, 600ms with TD left floating, and. seconds with TD connected to.

6 PI F CTIO S : Open Drain Logic Output for µp Reset Control. The LTC provides three ways to generate µp reset. First, when falls below trip point (4.7V with TOL = GND and 4.V with TOL = ), goes active low. After returns to V, the reset pulse generator forces to remain active low for a minimum of 0ms. Second, when the watchdog timer is not serviced prior to a selected time-out period, the reset pulse generator also forces to active low for a minimum of 0ms and repeats for every time-out period. Third and the last, when the PB pin stays active low for a minimum of 40ms, becomes active low. The output will remain active low for a minimum of 0ms from the moment the push-button reset input is released from logic low level. : is an Active High Logic Output. It is the inverse of. ST: Logic Input to Reset the Watchdog Timer. Driving ST either high or low longer than the time-out period set by the TD input, forces the reset outputs to active states for a minimum of 0ms. The timer resets itself and begins to time-out again with each high to low transition on the ST input (see Figure ). APPLICATIO S I FOR ATIO Power Monitoring W The LTC uses a bandgap voltage reference and a precision voltage comparator, C, to monitor the V supply input on (see Block Diagram). When falls below the trip point (4.6V typical with TOL = GND and 4.7V typical with TOL ), the reset outputs are forced to active states. The trip point accounts for a % or 0% variation on, so the reset outputs become active when falls below the trip point. On power-up, the reset signals are held in active states for a minimum of 0ms after the trip point is reached to allow the power supply and microprocessor to stabilize. On power-down, the signal remains active low even with as low as V. This capability helps hold the microprocessor in stable shutdown condition. Figure shows the timing diagram of the signal. The precision voltage comparator, C, typically has 40mV of hysteresis which ensures that glitches at pin do not activate the reset outputs. Response time is typically 0µs. To help prevent mitriggering due to transient loads, pin should be bypassed with a 0.µF capacitor with the leads trimmed as short as possible. Push-Button Reset The LTC provides a logic input pin, PB, for direct connection to a push-button. This push-button reset input requires an active low signal. Internally, this input signal is debounced and timed for a minimum of 40ms. When this V V V V t t V = TRIP POINT V = TRIP POINT + V HYS t = RESET ACTIVE TIME LTC TA0 Figure. Reset Active Time 6

7 APPLICATIO S I FOR ATIO W condition is satisfied, the reset pulse generator forces the reset outputs to active states. The reset signals will remain active for a minimum of 0ms from the moment the push-button reset input is released from logic low level (see Timing Diagram). Watchdog Timer The LTC provides a watchdog timer function to monitor the activity of the microprocessor. If the microprocessor does not stimulate the strobe input, ST, within a selected time-out period, the reset outputs are forced to active states for a minimum of 0ms. The time-out period is selected by the Time-Out Delay input, TD, to be 0ms with TD connected to GND, 600ms with TD left floating, and. seconds with TD connected to. The. second time-out period is adequate for many systems to serve the watchdog timer immediately after a reset. Figure shows the timing diagram of watchdog time-out period and reset active time. The watchdog time-out period is restarted as ST = V t t t t t t = RESET ACTIVE TIME t = WATCHDOG TIME-OT PERIOD LTC TA04 Figure. Watchdog Time-Out Period and Reset Active Time soon as the reset outputs are inactive. When a high-to-low transition occurs at the ST pin prior to time-out, the watchdog time is reset and begins to time-out again. To ensure the watchdog time does not time-out, a high-to low transition on the ST pin must occur at or less than the minimum time-out period. If the input to the ST pin remains either high or low, reset pulses will be issued for every time-out period selected by the TD pin. The watchdog timer is disabled when falls below the trip point. PACKAGE DESCRIPTIO N8 Package 8-Lead PDIP (Narrow.00 Inch) (Reference LTC DWG # ).400* (0.60) MAX ±.0* (6.477 ± 0.8) ( ) (.4.6).0 ±.00 (.0 ± 0.7) ( ) ( ).06 (.6) TYP.00 (.4) BSC NOTE: INCHES. DIMENSIONS ARE MILLIMETERS *THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED.00 INCH (0.4mm). (.7) MIN.08 ±.00 (0.47 ± 0.076) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights..00 (0.08) MIN N8 00 7

8 PACKAGE DESCRIPTIO S8 Package 8-Lead Plastic Small Outline (Narrow.0 Inch) (Reference LTC DWG # ) N.00 BSC.04 ± ( ) NOTE MIN N/.60 ± ( ) N N/.0.7 ( ) NOTE.00 ±.00 TYP RECOMMENDED SOLDER PAD LAYOT ( ) ( ) TYP (.46.7) ( ) ( ) ( ) NOTE: INCHES TYP. DIMENSIONS IN (MILLIMETERS). DRAWING NOT TO SCALE. THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED.006" (0.mm).00 (.70) BSC SO8 00 RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC690 V Supply Monitor, Watchdog Timer and Battery Backup 4.6V Threshold LTC694-..V Supply Monitor, Watchdog Timer and Battery Backup.9V Threshold LTC699 V Supply Monitor and Watchdog Timer 4.6V Threshold LTC6 Micropower Precision Triple Supply Monitor for V,.V and ADJ 4.7V,.8V, V Thresholds (±0.7%) LTC6-. Micropower Precision Triple Supply Monitor for.v,.v and ADJ.6V,.8V, V Thresholds (±0.7%) LTC6 Precision Triple Supply Monitor for PCI Applications Meets PCI t FAIL Timing Specifications LTC76-. Micropower Triple Supply Monitor for.v,.v and ADJ Adjustable RESET and Watchdog Time-Outs LTC76- Micropower Triple Supply Monitor for V,.V and ADJ Adjustable RESET and Watchdog Time-Outs LTC77-./LTC77- Micropower Triple Supply Monitor with Open-Drain Reset Individual Monitor Outputs in MSOP LTC78-.8/TC78-. Micropower Triple Supply Monitor with Open-Drain Reset -Lead SOT- Package LTC78-./LTC78- Micropower Triple Supply Monitor with Open-Drain Reset -Lead SOT- Package LTC98-.8 Micropower Triple Supply Monitor with Push-Pull Reset Output -Lead SOT- Package 8 Linear Technology Corporation 60 McCarthy Blvd., Milpitas, CA (408) FAX: (408) LW/TP 00 K REV A PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 99