N - CHANNEL 600V - 3.3Ω - 3A - D 2 PAK/I 2 PAK PowerMESH ΙΙ MOSFET

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1 STB3NC60 N - CHANNEL 600V - 3.3Ω - 3A - D 2 PAK/I 2 PAK PowerMESH ΙΙ MOSFET ν ν ν ν ν TYPE VDSS RDS(on) ID STB3NC V < 3.6 Ω 3 A TYPICAL R DS(on) = 3.3 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED DESCRIPTION The PowerMESH II is the evolution of the first generation of MESH OVERLAY. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concer switching speed, gate charge and ruggedness. I 2 PAK TO-262 (Suffix "-1") D 2 PAK TO-263 (Suffix "T4") APPLICATIONS ν HIGH CURRENT, HIGH SPEED SWITCHING ν SWITCH MODE POWER SUPPLIES (SMPS) ν DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (V GS = 0) 600 V V DGR Drain- gate Voltage (R GS = 20 kω) 600 V VGS Gate-source Voltage ± 30 V I D Drain Current (continuous) at T c = 25 o C 3 A I D Drain Current (continuous) at T c = 100 o C 1.9 A I DM( ) Drain Current (pulsed) 12 A P tot Total Dissipation at T c = 25 o C 80 W Derating Factor 0.64 W/ o C dv/dt(1) Peak Diode Recovery voltage slope 4 V/ Tstg Storage Temperature -65 to 150 o C T j Max. Operating Junction Temperature 150 o C ( ) Pulse width limited by safe operating area (1) I SD 3A, di/dt 100 A/µs, V DD V (BR)DSS, Tj T JMAX February /9

2 THERMAL DATA R thj-case Thermal Resistance Junction-case Max 1.56 R thj-amb Thermal Resistance Junction-ambient Max 62.5 R thc-sink Thermal Resistance Case-sink Typ 0.5 Maximum Lead Temperature For Soldering Purpose 300 Tl o C/W o C/W o C/W o C AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit I AR Avalanche Current, Repetitive or Not-Repetitive 3 A (pulse width limited by T j max) E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR, VDD = 50 V) 100 mj ELECTRICAL CHARACTERISTICS (T case = 25 o C unless otherwise specified) OFF Symbol Parameter Test Conditio Min. Typ. Max. Unit V (BR)DSS Drain-source Breakdown Voltage I D = 250 µa V GS = V I DSS IGSS Zero Gate Voltage Drain Current (V GS = 0) Gate-body Leakage Current (V DS = 0) V DS = Max Rating V DS = Max Rating T c = 125 o C VGS = ± 30 V ± 100 na 1 50 µa µa ON ( ) Symbol Parameter Test Conditio Min. Typ. Max. Unit VGS(th) Gate Threshold Voltage VDS = VGS ID = 250 µa V R DS(on) Static Drain-source On Resistance V GS = 10V I D = 1.5 A Ω I D(on) On State Drain Current V DS > I D(on) x R DS(on)max V GS = 10 V 3 A DYNAMIC Symbol Parameter Test Conditio Min. Typ. Max. Unit g fs ( ) Forward Traconductance V DS > I D(on) x R DS(on)max I D = 1.5 A 2 S Ciss C oss C rss Input Capacitance Output Capacitance Reverse Trafer Capacitance VDS = 25 V f = 1 MHz VGS = pf pf pf 2/9

3 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditio Min. Typ. Max. Unit t d(on) tr Q g Q gs Qgd Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 300 V I D = 1.5 A R G = 4.7 Ω V GS = 10 V (see test circuit, figure 3) 9 13 V DD = 480 V I D = 3 A V GS = 10 V nc nc nc SWITCHING OFF Symbol Parameter Test Conditio Min. Typ. Max. Unit tr(voff) t f t c Off-voltage Rise Time Fall Time Cross-over Time VDD = 480 V ID = 3 A R G = 4.7 Ω V GS = 10 V (see test circuit, figure 5) SOURCE DRAIN DIODE Symbol Parameter Test Conditio Min. Typ. Max. Unit ISD I SDM( ) Source-drain Current Source-drain Current (pulsed) V SD ( ) Forward On Voltage I SD = 3 A V GS = V t rr Reverse Recovery I SD = 3 A di/dt = 100 A/µs 420 Time V DD = 100 V T j = 150 o C Q rr IRRM Reverse Recovery Charge Reverse Recovery Current (see test circuit, figure 5) µc A ( ) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ( ) Pulse width limited by safe operating area 3 12 A A Safe Operating Area for D 2 PAK/I 2 PAK Thermal Impedancefor D 2 PAK/I 2 PAK 3/9

4 Output Characteristics Trafer Characteristics Traconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variatio 4/9

5 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9

6 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9

7 TO-262 (I2PAK) MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A A B B B C C D e E L L L E A C2 B2 B e A1 C L1 L2 D L P011P5/C 7/9

8 TO-263 (D 2 PAK) MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A A B B C C D E G L L L E A C2 L2 L D L3 B2 A1 B C G P011P6/C 8/9

9 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no respoibility for the coequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licee is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 1999 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. 9/9

10 This datasheet has been download from: Datasheets for electronics components.

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