Sony IMX Mp, 4.75 µm Pixel Size, Full-Frame Format CMOS Image Sensor from the Nikon D800 DSLR

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1 Sony IMX Mp, 4.75 µm Pixel Size, Full-Frame Format CMOS Image Sensor from the Nikon D800 DSLR Imager Process Review 1891 Robertson Road, Suite 500, Ottawa, ON K2H 5B7 Canada Tel:

2 Imager Process Review Some of the information in this report may be covered by patents, mask, and/or copyright protection. This report should not be taken as an inducement to infringe on these rights. Chipworks Inc all rights reserved. Chipworks and the Chipworks logo are registered trademarks of Chipworks Inc. This report is provided exclusively for the use of the purchasing organization. It can be freely copied and distributed within the purchasing organization, conditional upon the accompanying Chipworks accreditation remaining attached. Distribution of the entire report outside of the purchasing organization is strictly forbidden. The use of portions of the document for the support of the purchasing organization s corporate interest (e.g., licensing or marketing activities) is permitted, as defined by the fair use provisions of the copyright act. Accreditation to Chipworks must be attached to any portion of the reproduced information. IPR JMRF Revision 1.0 Published: September 20, 2012 Revision 2.0 Published: January 29, 2013

3 Imager Process Review Table of Contents 1 Overview 1.1 List of Figures 1.2 List of Tables 1.3 Company Profiles 1.4 Introduction 1.5 Device Summary 1.6 Process Summary 2 Device Overview 2.1 Camera Teardown 2.2 Package and Die 2.3 Die Features 3 Process Analysis 3.1 General Device Structure 3.2 Bond Pads 3.3 Dielectrics 3.4 Metallization 3.5 Vias and Contacts 3.6 Transistors and Poly 3.7 Isolation 3.8 Wells and Substrate 4 Pixel Analysis 4.1 Pixel Overview and Schematic 4.2 Pixel Plan-View Analysis 4.3 Pixel Array Cross Section Parallel to Row Select Line 4.4 Pixel Array Cross Section Parallel to Column Out Line 5 Critical Dimensions 5.1 Die and Die Features 5.2 Dielectrics 5.3 Metallization 5.4 Vias and Contacts 5.5 Transistors and Poly 5.6 Isolation 5.7 Wells and Substrate 5.8 Pixel Array

4 Imager Process Review 6 References 7 Statement of Measurement Uncertainty and Scope Variation

5 Overview Overview 1.1 List of Figures 2 Device Overview Nikon D800 Front Nikon D800 Back Nikon D800 Top Nikon D800 Side A Nikon D800 Side B Nikon D800 Bottom Nikon D800 Teardown Back Removed Nikon D800 Main Board, Side A Nikon D800 Main Board, Side B Image Sensor Assembly Front Image Sensor Assembly Front, Image Sensor Removed Image Sensor Assembly Back Image Sensor Front Image Sensor Back Package Photograph Top Package X-Ray Plan View Package Corner A X-Ray Plan View Package Corner B X-Ray Plan View Package Photograph Bottom Package Photograph Side Package Edge X-Ray Side IMX094 Die Photograph Die Markings Analysis Sites (Overview) Analysis Sites (P1E) Die Corner A Die Corner B Die Corner C Die Corner D Pixel Array Corner Top Left Pixel Array Corner Bottom Right Bond Pads Test Pads Die Feature A Die Feature B Die Feature C Die Feature D Die Feature E Die Feature F

6 Overview Process Analysis General Structure Periphery General Structure Pixel Array Die Thickness Die Edge Die Seal Bond Pad Overview Bond Pad Edge Passivation Passivation TEM IMD IMD PMD PMD TEM Minimum Pitch Metal Metal 3 TEM Minimum Pitch Metal 2 TEM Minimum Pitch Metal Metal 1 TEM Minimum Pitch Via 2s Minimum Pitch Via 1s Minimum Pitch Contacts Contact to Silicide Interface (Logic Region) Contact Interface Pixel Array Minimum Pitch Poly Contacted Gate Pitch Logic Transistor TEM Logic Transistor Gate Dielectric TEM PMOS Transistors MOS Capacitor Poly Over LOCOS Periphery TEM of LOCOS Pixel Array Gate Wrap Pixel Array Minimum Width LOCOS Pixel Array SCM of Peripheral Wells Pixel Array and Peripheral Region Wells SCM of Pixel Array Well Edge Overview SCM of Pixels SRP Sample SRP Locations 1, 2, SRP Location 5, SRP of Location SRP of Location SRP of Location SRP of Location 6

7 Overview Pixel Analysis Pixel Schematic Dark Pixel Rows Top of Array Dark Pixels Left Side of Array Microlenses Tilt View Microlenses Plan View Color Filter Array Shared Pixels at Metal Shared Pixels at Metal Shared Pixels at Metal Shared Pixels at Poly Shared Pixels at Diffusion Transfer Gates and FD Region at Diffusion Pixel Bevel SCM Overview Pixel Bevel SCM Sample Topology Pixel Bevel SCM Detail Edge of RGB Color Filter Array Active Pixel to Dark Pixel Transition Red Color Filter Green Color Filter Blue Color Filter TEM of Color Microlens, Blue Filter, and Green Filter Transfer Gate Width Direction Reset, Source Follower, and Row Select Gates V SS and FD Contacts AFM of V SS and FD Contact Region SCM Overview of Pixel Array Edge and FD Implant SCM of V SS and FD Contact Region Pixel Optical Stack Thickness and Field of View Pixel Overview Oxide Etch, Transfer Gate Region Pixel Overview SCM Pixel Detail SCM with Topography Overlay Pixel Detail SCM Transfer Gate Transfer Gate Drain Region Transfer Gate Source Region Pixel AR Stack Transfer Gate Dielectric Reset Transistor Source Follower Transistor Row Select Transistor

8 Overview List of Tables 1 Overview Nikon FF DSLRs with Nikon Designed, Renesas Fabbed CIS Nikon FF DSLRs with Sony CIS Sony FF DSLRs with Sony CIS Device Identification IMX094 Device Summary IMX094 Process Summary 2 Device Overview Die and Die Feature Critical Dimensions 3 Process Analysis Measured Dielectric Thicknesses Metallization Thicknesses Metallization Width and Pitch Via and Contact Dimensions Peripheral MOS Transistor, Capacitor, and Poly Dimensions LOCOS Critical Dimensions Well Depths and Die Thickness 4 Pixel Analysis Pixel Horizontal Dimensions Vertical Pixel Dimensions Pixel Transistor Physical Dimensions 5 Critical Dimensions Die and Die Feature Critical Dimensions Measured Dielectric Thicknesses Metallization Thicknesses Metallization Width and Pitch Via and Contact Dimensions Peripheral MOS Transistor, Capacitor, and Poly Dimensions LOCOS Critical Dimensions Well Depths and Die Thickness Pixel Horizontal Dimensions Vertical Pixel Dimensions Pixel Transistor Physical Dimensions

9 About Chipworks About Chipworks Chipworks is the recognized leader in reverse engineering and patent infringement analysis of semiconductors and electronic systems. The company s ability to analyze the circuitry and physical composition of these systems makes them a key partner in the success of the world s largest semiconductor and microelectronics companies. Intellectual property groups and their legal counsel trust Chipworks for success in patent licensing and litigation earning hundreds of millions of dollars in patent licenses, and saving as much in royalty payments. Research & Development and Product Management rely on Chipworks for success in new product design and launch, saving hundreds of millions of dollars in design, and earning even more through superior product design and faster launches. Contact Chipworks To find out more information on this report, or any other reports in our library, please contact Chipworks at Chipworks 1891 Robertson Road, Suite 500 Ottawa, Ontario K2H 5B7 Canada T F Web site: info@chipworks.com Please send any feedback to feedback@chipworks.com

Apple/AuthenTec TMDR92 iphone 5s, 6, and 6 Plus Fingerprint Sensor

Apple/AuthenTec TMDR92 iphone 5s, 6, and 6 Plus Fingerprint Sensor 1891 Robertson Road, Suite 500, Ottawa, ON K2H 5B7 Canada Tel: 613.829.0414 www.chipworks.com Some of the information in this report may