Large area detectors and new sensor technologies at Fairchild Imaging Paul Vu, Chiao Liu, Dan Laxson

Transcription

1 Large area detectors and new sensor technologies at Fairchild Imaging Paul Vu, Chiao Liu, Dan Laxson

2 Outline Introduction Large area CCD detectors at Fairchild Imaging MTF optimization of 4k x 4k CCD CCD-CMOS hybrid technology status Summary Fairchild Imaging 2

3 Introduction Fairchild Imaging manufactures advanced image sensors for industrial, scientific, and medical applications Full line of wafer-scale sensors Monolithic sensors 8 x 8 cm 2 Pixel size 8.75 µm to 40 µm High speed low noise CMOS In-house CCD wafer fab Large format back-illuminated CCDs in high volume Fairchild Imaging sensor manufacturing facilities are located in Milpitas, California Fairchild Imaging 3

4 Outline Introduction Large area CCD detectors at Fairchild Imaging MTF optimization of 4k x 4k CCD CCD-CMOS hybrid technology status Summary Fairchild Imaging 4

5 Large area CCD detectors CCD part number Format H x V (pixels) Pixel size (µm 2 ) Imaging area (H x V, mm) Features CCD485 4k x 4k 15 x x CCD486 4k x 4k 15 x x Frontside, 3-phase, MPP, 4 outputs Front or back-illuminated, 4 outputs CCD595 9k x 9k 8.75 x x Frontside, eight 25-MHz outputs CCD8161 4k x 4k 19.5 x x CCD3041 2k 2k 15 x x Frontside, 3-side butting, 4 lownoise and 4 high-speed outputs Front or back-illuminated, 4 outputs Fairchild Imaging 5

6 Monolithic 9k x 9k CCD595 Developed for aerial reconnaissance 9216(H) x 9216(V) full frame CCD 8.75 µm x 8.75 µm pixels x mm image area 100% fill factor 3-phase parallel shift registers 2-phase serial shift registers Buried channel CCD 8 high-speed output amplifiers Readout noise <30 e - at 25 MHz 200 MHz data rate (25 MHz x 8) Flight package with TEC coolers CCD595 in ceramic package Fairchild Imaging 6

7 4k x 4k CCD8161 Developed for mosaic applications 3-side abuttable 4096(H) x 4096(V) full frame CCD 19.5 µm x 19.5 µm pixels mm x mm active area 100% fill factor Front and back-illuminated Multi-Pinned Phase (MPP) 8 selectable output ports 4 low-noise 4 high-speed 3-phase vertical and serial registers Supports pixel binning Fairchild Imaging 7

8 2k x 2k CCD3041 Scientific grade CCD FF 2048(H) x 2048(V) FT 2048(H) x 1024(V) 15 x 15 µm 2 pixels Die size: x mm 2 3-phase shift registers 4 output ports MPP 90dB dynamic range Front or back-illuminated Compact package Noise (e- rms) UPPER LEFT OUTPUT 512 Pixels 512 Pixels 512 Pixels 512 Pixels LOWER LEFT OUTPUT Pixels 2048 Pixels 2.7 UPPER RIGHT OUTPUT 2048 Lines LOWER RIGHT OUTPUT Frequency (khz) Fairchild Imaging 8

9 Outline Introduction Large area CCD detectors at Fairchild Imaging MTF optimization of 4k x 4k CCD CCD-CMOS hybrid technology status Summary Fairchild Imaging 9

10 4k x 4k CCD (H) x 4097(V) full frame CCD 15 µm x 15 µm pixels mm x mm image area 100% fill factor Front and back-illuminated Multi-Pinned Phase (MPP) mode Readout noise < 3 e - at 50 khz Full well > 100 ke - 4 output ports 3-phase buried channel CCD Supports pixel binning Notch channels for improved radiation tolerance Back-illuminated CCD486 Front-illuminated CCD486 Fairchild Imaging 10

11 CCD486 performance Parameter Typical measured value Units Vertical full well (1 x 1) 102,000 e- Horizontal full well 760,000 e- Par. & Hor. CTE at 1000 e Par. & Hor. CTE at 60,000 e Read noise at 250 khz < 4 e- Read noise at 1 MHz < 7 e- Dark current at -60 C 0.02 e-/pix/sec PRNU, measured at half sat 5 % full well DSNU at +30 C 25 pa/cm2 p-p Non-linearity (up to 80% FW) < 1 % 10 Overscan Image Read noise (e- rms) Frequency (khz) 1 0 Fairchild Imaging 11

12 Backside thinning process Known-good CCD is bonded to substrate Special mask is applied to define thinned area Selective chemical etch removes bulk Si Perform back surface accumulation process and AR coating Mount die in package and wirebond Stable and well controlled CCD thinning process performed in high volume CCD die Underfill epoxy P+ P- Support Substrate 1. Bond die to substrate, protect non-active areas 4. Die attach and wirebond HF : HNO 3 : CH 3 COOH P- Support Substrate 2. Selective chemical etch P- Support Substrate 3. Back surface processing and AR coating Fairchild Imaging 12

13 Diffusion MTF effects Front-Illuminated Back-Illuminated Potential well e- LW SW e- e- e- Depletion layer hν Undepleted neutral layer SiO 2 p-si frontside gate e - field-free region depletion region e - Carrier diffusion in the field free region degrades the MTF Field free region is effectively eliminated by sufficiently large bias on high resistivity material Fully depleted CCD concept depletion width R Si n-buried channel Fully depleted CCD offers excellent MTF characteristics, but add process complexity and increase in dark current The field free region can be minimized by additional thinning Fairchild Imaging 13

14 CCD486 MTF optimization Silicon thinned to ~ 10 µm compared to standard ~ 20 µm MTF at Nyquist frequency improved ~3x at 410 nm Fairchild Imaging 14

15 QE response Some impact on red response compared to standard ~ 20 µm um epi Blue-enhanced ARC 20-um epi Blue-enhanced ARC QE, % Wavelength, nm Fairchild Imaging 15

16 Outline Introduction Large area CCD detectors at Fairchild Imaging MTF optimization of 4k x 4k CCD CCD-CMOS hybrid technology status Summary Fairchild Imaging 16

17 Motivations Many scientific, medical, and military imaging applications require optical quality, high speed and low noise performance that exceed standard CCD or CMOS image sensor technology Wavefront sensing for Adaptive Optics Synchrotron x-ray crystallography Night vision surveillance Requirements Photon counting sensitivity Resolution: 1M ~ 100M pixels Frame rate: 30 Hz ~ 3 khz Minimal or no cooling Low power Fairchild Imaging 17

18 Existing technologies Monolithic CMOS image sensor Low power, and system integration capability High dark current, low QE, high read noise Conventional scientific CCD Near ideal imaging performance high QE, low dark current, excellent uniformity Elevated noise at high frame rates EMCCD Very low-noise performance Not suitable for some applications due to cooling and power requirements Fairchild Imaging 18

19 Benefits of hybrid architecture Highly parallel architecture Enables high frame rates at low noise Eliminates high-power, high-bandwidth, on-chip CCD amplifiers Uses low-bandwidth low-noise, high gain amplifiers in CMOS ROIC Low noise CMOS ROIC design High conversion gain via LFPN CTIA Bandwidth limiting for low noise Low-power and high-speed performance Optimized CCD performance Low dark current with MPP or pinned photodiode technology Flexible CCD architecture: frame transfer (FT), interline transfer (IT), front or back-illuminated Charge binning capability for improved SNR Fairchild Imaging 19

20 CCD-CMOS CMOS hybrid architecture Digital Output CMOS CIRCUIT Control Shielded Storage Area CCD Clock Drivers 1024 Rows 1280 Columns Charge Coupled Device CCD Clock Drivers Shielded Storage Area Control CMOS CIRCUIT Indium Bump Bonding Digital Output CMOS ROICs directly coupled to CCD CCD contains no output amplifiers Charge to voltage conversion performed in CMOS ROIC Fairchild Imaging 20

21 Frame transfer CCD Sense node CCD channel Channel stops Shielded Storage Area V1 V4 V3 V2 V1 Shielded Storage Area Fairchild Imaging 21

22 Interline frame transfer CCD Sense node Shielded vertical registers Shielded Storage Area Shielded vertical registers Shielded vertical registers Photodiode Shielded Storage Area Fairchild Imaging 22

23 CMOS readout IC block diagram Bump 320 x 1 bumps CTIA and sampling network A A A A Entire Chip Analog bias 16 : 1 16 : 1 Shift 10 : 1 Register 10 : 1 Pixel control signals Analog outputs Clock Analog outputs Reset C fb Single Channel Connected to CCD Cin Vin Vref A S1 C1 S2 A A A A A A Output C2 Fairchild Imaging 23

24 Noise analysis CTIA is dominant noise source The input referred noise power spectral density includes thermal noise and 1/f V n 2 8kT ( f ) = + 3g m K f f g A f 2 m C in V n~ C fb A Vout C load Assuming that 1/f noise is removed by CDS, noise in e- rms is given by N where 8kT 3g q m NBW = 2 NBW C 2 π 2 in BW Amplifier Fairchild Imaging 24

25 Estimated noise performance Noise as a function of frame rate Fairchild Imaging 25

26 Hybrid development status Prototype 1280(H) x 1024(V) hybrid sensor demonstrated Frame transfer CCD CMOS CTIA readout ICs Read noise ~ 2.9 e- at 30 Hz H1011 Characteristics Format 1280(H) x 1024(V) Pixel size 12 x 12 µm 2 Spectral range nm Peak QE 40% Conversion gain 160 uv/e- Non-linearity <1% Dynamic range high gain mode = 2000:1 low gain mode = 6000:1 Dark current at 23 C 6-8 pa/cm 2 Smear at full saturation 0.05% Outputs 4 (multiplexed) Frame rate 1x1 unbinned 30 fps 2x2 binned 52 fps 4x4 binned 128 fps Fairchild Imaging 26

27 Outline Introduction Large area CCD detectors at Fairchild Imaging MTF optimization of 4k x 4k CCD CCD-CMOS hybrid technology status Summary Fairchild Imaging 27

28 Summary Fairchild Imaging offers a unique family of scientific CCDs with ultra large imaging areas Reliable manufacturing capability Improved MTF of back-illuminated 4K x 4K CCD New breed of advanced sensors developed to address the need for high speed and low noise performance Fairchild Imaging 28