Semiconductor Manufacturing Technology. Semiconductor Manufacturing Technology

Transcription

1 Semiconductor Manufacturing Technology Michael Quirk & Julian Serda October 2001 by Prentice Hall Chapter 16 Etch

2 Applications for Wafer Etch in CMOS Technology Photoresist mask Film to be etched Photoresist mask Protected film (a) Photoresist-patterned substrate (b) Substrate after etch Figure 16.1

3 Process Flow in a Wafer Fab Wafer fabrication (front-end) Wafer start Thin Films Polish Unpatterned wafer Completed wafer Diffusion Photo Etch Test/Sort Implant Used with permission from Advanced Micro Devices Figure 16.2

4 Etch Process Categories of Etch Processes Wet Etch Dry Etch Three Major Materials to be Etched Silicon Dielectric Metal Patterned Etch Versus Unpatterned Etch

5 Etch Parameters Etch rate Etch profile Etch bias Selectivity Uniformity Residues Polymer formation Plasma-induced damage Particle contamination and defects

6 Etch Rate T = change in thickness T t = elapsed time during etch Start of etch End of etch Figure 16.3

7 Wet Chemical Isotropic Etch Isotropic etch -etches in all directions at the same rate Resist Substrate Film Figure 16.4

8 Anisotropic Etch with Vertical Etch Profile Anisotropicetch - etches in only one direction Resist Film Substrate Figure 16.5

9 Sidewall Profiles for Wet Etch Versus Dry Etch Type of Etch Sidewall Profile Diagram Wet Etch Dry Etch Isotropic Isotropic (depending on equipment & parameters) Anisotropic (depending on equipment & parameters) Anisotropic Taper Silicon Trench Table 16.1

10 Etch Bias W b Bias W a Bias Resist Resist Film Film Substrate (a) Substrate (b) Figure 16.6

11 Etching Undercut and Slope Undercut Resist Overetch Film Substrate Figure 16.7

12 Etch Selectivity E r S = E f E r E f Nitride Oxide Figure 16.8

13 Etch Uniformity Randomly select 3 to 5 wafers in a lot Measure etch rate at 5 to 9 locations on each wafer, then calculate etch uniformity for each wafer and compare wafer-to-wafer. Figure 16.9

14 Polymer Sidewall Passivation for Increased Anisotropy Plasma ions Resist Oxide Polymer formation Silicon Figure 16.10

15 Dry Etch Advantages of Dry Etch over Wet Etch Etching Action Potential Distribution

16 Advantages of Dry Etch over Wet Etch 1. Etch profile is anisotropic with excellent control of sidewall profiles. 2. Good CD control. 3. Minimal resist lifting or adhesion problems. 4. Good etch uniformity within wafer, wafer-to-wafer and lot-to-lot. 5. Lower chemical costs for usage and disposal. Table 16.2

17 Plasma Etch Process of a Silicon Wafer RF generator 1) Etchant gases enter chamber Gas delivery Electric field Anode Etch process chamber 2) Dissociation of reactants by electric fields 4) Reactive +ions bombard surface λ 3) Recombination of electrons with atoms creates plasma λ 5) Adsorption of reactive ions on surface By-products 6) Surface reactions of radicals and surface film 8) By-product removal Exhaust 7) Desorptionof by-products Anisotropic etch Substrate Cathode Isotropic etch Figure 16.11

18 Chemical and Physical Dry Etch Mechanisms Physical Etching Chemical Etching Reactive +ions bombard surface Sputtered surface material Surface reactions of radicals + surface film Desorption of by-products Anisotropic etch Isotropic etch Figure 16.12

19 Chemical Versus Physical Dry Plasma Etching Etch Parameter Physical Etch (RF field perpendicular to wafer surface) Physical Etch (RF field parallel to wafer surface) Chemical Etch Combined Physical and Chemical Etch Mechanism Sidewall Profile Selectivity Physical ion sputtering Anisotropic Poor/difficult to increase (1:1) Radicals in plasma reacting with wafer surface* Isotropic Fair/good (5:1 to 100:1) Radicals in liquid reacting with wafer surface Isotropic Good/excellent (up to 500:1) In dry etch, etching includes ion sputtering and radicals reacting with wafer surface Isotropic to Anisotropic Fair/good (5:1 to 100:1) Etch Rate High Moderate Low Moderate CD Control Fair/good Poor * Used primarily for stripping and etchback operations. Table 16.3 Poor to nonexistent Good/excellent

20 Schematic View of Reactor Glow Discharge with Potential Distribution RF Powered electrode (V t ) -V 0 +V V t Ion sheath Plasma (+V p ) V p Grounded electrode Figure 16.13

21 Effects of Changing Plasma Etch Parameters Increase ( ) or Decrease (fl) in Etch Control Parameters Ion Energy DC Bias Etch Rate Selectivity Physical Etch RF Frequency RF Power DC Bias Electrical Size fl fl fl fl Table 16.4

22 Plasma Etch Reactors Parallel plate (planar) reactor Downstream etch systems Triode planar reactor Reactive ion etch (RIE) High-density plasma etchers Etch System Review Endpoint Detection Vacuum for Etch Chambers

23 Parallel Plate Plasma Etching Matching network RF generator Gas-flow controller Gas dispersion screen Endpoint signal Wafer Pressure signal Microcontroller Operator Interface Pressure controller Gas panel Electrodes Exhaust Roots pump Roughing pump Process gases Figure 16.15

24 Schematic of a Downstream Reactor Microwave energy Microwave source 2.45 MHz Plasma chamber Diffuser Wafer chuck Heat lamp To vacuum system Figure 16.16

25 Triode Planar Reactor Induction coil Inductively-coupled RF generator (3.56 MHz) Capacitor Capacitively-coupled RF generator (100 khz) Figure 16.17

26 Parallel Plate RIE Reactor Grounded electrode (anode) Ar + (physical etch component) F (chemical etch component) Wafer Powered electrode (cathode) RF generator Figure 16.19

27 Schematic of Electron Cyclotron Reactor Microwave source 2.45 MHz Quartz window Wave guide Plasma chamber Diffuser Cyclotron magnet Wafer Additional magnet MHz Electrostatic chuck Vacuum system Redrawn from Y. Lii, Etching, ULSI Technology, ed. by C. Chang & S. Sze, (New York: McGraw-Hill, 1996), p Figure 16.20

28 Inductively Coupled Plasma Etch RF generator Inductive coil Dielectric window Plasma chamber Electromagnet Biased wafer chuck Bias RF generator Redrawn from Y. Lii, Etching, ULSI Technology, ed. By C. Chang and S.Sze (New York: McGraw-Hill, 1996), p Figure 16.21

29 Magnetically Enhanced Reactive Ion Etch (MERIE) Electromagnet (1 of 4) Wafer Biased wafer chuck MHz Redrawn from Wet/Dry Etch (College Station, TX: Texas Engineering Extension Service, 1996), p Figure 16.23

30 Configurations Activity Dry Etcher Configurations Pressure (Torr) Barrel Reactive 10-1 to 1 Arrangement Coil or electrodes outside vessel High Density Plasma Parallel Plate (Plasma) Reactive 10-1 to 1 Planar diode (two electrodes) No Downstream Plasma Reactive 10-1 to 1 Coil or electrodes outside vessel Triode Planar Reactive 10-3 Triode (three electrodes) No Ion Beam Milling Inert 10-4 Planar triode No Reactive Ion Etch (RIE) Electron Cyclotron Resonance (ECR) Biasing Bias Source Profile No In cassette (bulk) RF Isotropic No On powered electrode (anode) In cassette (bulk) downstream of plasma On platform electrode On powered electrode (anode) RF RF or Microwave Anisotropic Isotropic Anisotropic Anisotropic Reactive < 0.1 Planar or cylindrical diode No On cathode Anisotropic Reactive 10-4 to 10-3 (low) Distributed ECR Reactive (low) Inductively Coupled Plasma (ICP) Reactive (low) Helicon Wave Reactive (low) Dual Plasma Source Reactive (low) Magnetically Enhanced RIE (MERIE) Reactive (low) Magnetic field in parallel with plasma flow Magnets distributed around central plasma Spiral coil separated from plasma by dielectric plate Plasma generated by electromagnets and plasma density maintained at wafer by magnetic field Independent plasma and wafer biasing Planar diode with magnetic field confining plasma Table 16.5 Yes On cathode RF or DC Anisotropic Yes On cathode RF or DC Anisotropic Yes On cathode RF or DC Anisotropic Yes On cathode RF or DC Anisotropic Yes On cathode RF or DC Anisotropic Yes On cathode RF or DC Anisotropic

31 Endpoint Detection for Plasma Etching Etch Parameter Normal etch Endpoint detection Change in etch rate - detection occurs here. Endpoint signal stops the etch. Time Figure 16.24

32 Characteristic Wavelengths of Excited Species in Plasma Etch Silicon Material Etchant Gas CF 4 /O 2 Cl 2 SiF Emitting Species of some Products SiCl Wavelength (nm) 440; SiO 2 CHF 3 CO 484 Aluminum Photoresist Nitrogen (indicating chamber vacuum leak) Cl 2 BCl 3 O 2 Al AlCl CO OH H N 2 NO 391; 394; Table 16.6

33 Dry Etch Applications Dielectric Dry Etch Oxide Silicon Nitride Silicon Dry Etch Polysilicon Single-Crystal Silicon Metal Dry Etch Aluminum and Metal Stacks TungstenEtchback Contact Metal Etch

34 Requirements for Successful Dry Etch 1. High selectivity to avoid etching materials that are not to be etched (primarily photoresistand underlying materials). 2. Fast etch rate to achieve an acceptable throughput of wafers. 3. Good sidewall profile control. 4. Good etch uniformity across the wafer. 5. Low device damage. 6. Wide process latitude for manufacturing.

35 Dry Etch Critical Parameters Equipment Parameters: Equipment design Source power Source frequency Pressure Temperature Gas-flow rate Vacuum conditions Process recipe Other Contributing Factors: Cleanroomprotocol Operating procedures Maintenance procedures Preventive maintenance schedule Plasma-etching a wafer Figure Process Parameters: Plasma-surface interaction: -Surface material - Material stack of different layers -Surface temperature -Surface charge -Surface topography Chemical and physical requirements Time Quality Measures: Etch rate Selectivity Uniformity Feature profile Critical dimensions Residue

36 Oxide Etch Reactor CF 4 C 3 F 8 C 4 F 8 CHF 3 Selection of fluorocarbon and hydrocarbon chemicals NF 3 SiF 4 Ar HF F CHF Plasma CH 4 CF 2 Wafer Electrostatic chuck Figure 16.26

37 Etch Stop Hard Mask Layer Example: Silicon nitride, Si 3 N 4, serves as etch-stop during LI oxide etch. Note: The numbers show the order of the five operations. 2 Doped oxide CVD 1 Nitride CVD 3 Oxide CMP 4 Oxide etch LI Oxide Nitride etch 5 n-well p-well p- Epitaxial Layer p+ Silicon Substrate Figure 16.27

38 Contact Etching to Varying Depths Contact holes S G D Figure 16.28

39 Polysilicon Conductor Length Polysilicongate Gate oxide Gate Source Drain The gate length determines channel length and defines boundaries for source and drain electrodes. Figure 16.29

40 Polysilicon Gate Etch Process Steps 1. Breakthrough step to remove native oxide and surface contaminants 2. Main-etch step to remove mostpolysilicon without damage to gate oxide 3. Overetch step to remove remaining residues and poly stringers while maintaining high selectivity to gate oxide

41 Undesirable Microtrenching during Polysilicon Gate Etching Ions Trench in gate oxide Gate oxide Resist Poly Substrate Figure 16.30

42 Silicon Trench Etching Figure 16.31

43 Major Requirements for Metal Etching 1. High etch rates (>1000 nm/min). 2. High selectivity to the masking layer (>4:1), interlayer dielectric (>20:1) and to underlying layers. 3. High uniformity with excellent CD control and no microloading (<8% at any location on the wafer). 4. No device damage from plasma-induced electrical charging. 5. Low residue contamination (e.g., copper residue, developer attack and surface defects). 6. Fast resist strip, often in a dedicated cluster tool chamber, with no residual contamination. 7. No corrosion.

44 Metal Stack for VLSI/ULSI Integration Photoresist mask Metal etch ILD-1 TiN Al + Cu (1%) Ti LI Oxide n-well p-well p- Epitaxial layer p+ Silicon substrate Figure 16.32

45 Typical Steps for Etching Metal Stacks 1. Breakthrough step to remove native oxide. 2. ARC layer etch (may be combined with above step). 3. Main etch step of aluminum. 4. Overetch step to remove residue. It may be a continuation of the main etch step. 5. Barrier layer etch. 6. Optional residue removal process to prevent corrosion. 7. Resist removal.

46 Tungsten Etchback Via SiO 2 Tungsten ILD-2 Metal-1 stack ILD-1 (a) Via etch through ILD-2 (SiO2) (b) Tungsten CVD via fill Tungsten plug SiO 2 Metal-2 stack Tungsten plug (c) Tungstenetchback (d) Metal-2 deposition Figure 16.33

47 Wet Etch Wet Etch Parameters Types of Wet Etch Wet Oxide Etch Wet Chemical Strips

48 Wet Etch Parameters Parameter Explanation Difficulty to Control Concentration Time Temperature Agitation Solution concentration (e.g., ratio of NH4F:HF for etch an oxide). Time of wafer immersion in the wet chemical bath. Temperature of wet chemical bath. Agitation of the solution bath. Most difficult parameter to control because the bath concentration is continually changing. Relatively easy to control. Relatively easy to control. Moderate difficulty to properly control. Table 16.7

49 Approximate Oxide Etch Rates in BHF Solution at 25 C Table Approximate Oxide Etch Rates in BHF Solution at 25 C a Type of Oxide Density (g/cm 3 ) Etch Rate (nm/s) Dry grown Wet grown CVD deposited < b 5 c Sputtered < a) 10 parts of 454 g NH 4 F in 680 ml H 2 O and one part 48% HF b) Annealed at approximately 1000 C for 10 minutes c) Not annealed 1 B. El-Kareh, ibid, p Table 16.8

50 Historical Perspective - Polysilicon Etch Technology Evolution Geometry Requirements Time Frame and Reactor Design Chemistries Strengths Limitations and Problems Controls 4 to 5 µm, isotropic etch Pre-1977: wet etch HF/HNO 3 buffered with acetic acid or H 2 O Batch Process Resist lift; bath aging; temperature sensitive Operator judgement for endpoint 3 µm 1977: barrel etcher CF 4 /O 2 Batch Process Non-uniformity, isotropic etch, large undercut Manometer and timer 2 µm 1981: single wafer etch CF 4 /O 2 Single wafer; individual etch endpoint, improvement in repeatability Low oxide selectivity; isotropic process Endpoint detection 1.5 µm 1982: single wafer RIE SF 6 /Freon 11, SF 6 /He MFCs; independent pressure and gas flow control, improvement in repeatability Low oxide selectivity; profile control MFCs; separate gas flow and pressure control To 0.5 µm 1983: variable gap; loadlocked CCl 4 /He, Cl 2 /He, Cl 2 /HBr Load-locked chamber; variable gap, improvement in repeatability Microloading in high aspect ratios; profile control Control of electrode gap; computer controls To 0.25 µm and below 1991: inductively coupled plasma (ICP) Cl 2, HBr High-density plasma; low pressure; simple gas mixtures, improvement in repeatability Complex tool; many variables Independent RF control for plasma generation and wafer bias Table 16.9

51 Photoresist Removal Plasma Ashing Asher Overview Plasma Damage Residue Removal

52 Atomic Oxygen Reaction with Resist in Asher Gas delivery 1) O 2 molecules enter chamber Downstream Plasma Asher reaction chamber 6) By-product removal 2) O 2 dissociates into atomic oxygen Neutral oxygen radicals + + λ λ 3) Plasma energy turns oxygen into + ions 5) By-product desorption 4) Neutral O and O + react with C and H atoms in resist Exhaust Substrate Resist Figure 16.34

53 Post Etch Via Veil Residue Polymer residue Via veils Figure 16.35