IRF840 N-CHANNEL 500V Ω - 8A TO-220 PowerMesh II MOSFET

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1 N-CHANNEL 500V Ω - 8A TO-220 PowerMesh II MOSFET TYPE V DSS R DS(on) I D IRF V < 0.85 Ω 8 A TYPICAL R DS (on) = 0.75 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED DESCRIPTION The PowerMESH II is the evolution of the first generation of MESH OVERLAY. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns switching speed, gate charge and ruggedness. TO INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING SWITH MODE POWER SUPPLIES (SMPS) DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVES ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit V DS Drain-source Voltage (V GS = 0) 500 V V DGR Drain-gate Voltage (R GS = 20 kω) 500 V V GS Gate- source Voltage ± 20 V I D Drain Current (continuos) at T C = 25 C 8 A I D Drain Current (continuos) at T C = 100 C 5.1 A I DM (l) Drain Current (pulsed) 32 A P TOT Total Dissipation at T C = 25 C 125 W Derating Factor 1.0 W/ C dv/dt (1) Peak Diode Recovery voltage slope 3.5 V/ns T stg Storage Temperature 65 to 150 C T j Max. Operating Junction Temperature 150 C ( )Pulse width limited by safe operating area (1)I SD 8A, di/dt 50A/µs, V DD V (BR)DSS, T j T JMAX. May /8

2 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 1 C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 C/W T l Maximum Lead Temperature For Soldering Purpose 300 C AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit I AR Avalanche Current, Repetitive or Not-Repetitive 8 A (pulse width limited by T j max) E AS Single Pulse Avalanche Energy (starting T j = 25 C, I D = I AR, V DD = 50 V) 520 mj ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF V (BR)DSS Drain-source I D = 250 µa, V GS = V Breakdown Voltage I DSS Zero Gate Voltage V DS = Max Rating 1 µa Drain Current (V GS = 0) V DS = Max Rating, T C = 125 C 50 µa I GSS Gate-body Leakage Current (V DS = 0) V GS = ± 20V ±100 na ON (1) V GS(th) Gate Threshold Voltage V DS = V GS, I D = 250µA V R DS(on) Static Drain-source On Resistance V GS = 10V, I D = 3.5 A Ω DYNAMIC g fs (1) Forward Transconductance V DS > I D(on) x R DS(on)max, 6.4 S I D =3.5A C iss Input Capacitance V DS = 25V, f = 1 MHz, V GS = pf C oss Output Capacitance 131 pf C rss Reverse Transfer Capacitance 17 pf 2/8

3 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON t d(on) Turn-on Delay Time V DD = 250 V, I D = 3.5 A 10 ns t r Rise Time R G =4.7Ω V GS = 10 V 21 ns (see test circuit, Figure 3) Q g Total Gate Charge V DD = 400V, I D = 7 A, nc Q gs Gate-Source Charge V GS = 10V 4.9 nc Q gd Gate-Drain Charge 13.9 nc SWITCHING OFF t r(voff) Off-voltage Rise Time V DD = 400V, I D = 7 A, 9 ns t f Fall Time R G =4.7Ω, V GS = 10V (see test circuit, Figure 5) 9 ns t c Cross-over Time 19 ns SOURCE DRAIN DIODE I SD Source-drain Current 8 A I SDM (2) Source-drain Current (pulsed) 32 A V SD (1) Forward On Voltage I SD = 8 A, V GS = V t rr Reverse Recovery Time I SD = 7 A, di/dt = 100A/µs 384 ns Q rr Reverse Recovery Charge V DD = 100V, T j = 150 C (see test circuit, Figure 5) 2.2 µc I RRM Reverse Recovery Current 11.8 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/8

4 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8

5 Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8

6 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8

7 TO-220 MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A C D D E F F F G G H L L L L L L DIA D1 C F G H2 D A E L2 G1 F1 Dia. L5 L7 L9 F2 L6 L4 P011C 7/8

8 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. 8/8

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