DTC114EET1 Series. Bias Resistor Transistor. NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network

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1 DTCEET Series Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a baseemitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SC75/SOT6 package which is designed for low power surface mount applications. Features Simplifies Circuit Design Reduces Board Space Reduces Component Count The SC75/SOT6 Package Can be Soldered Using Wave or Reflow The Modified GullWinged Leads Absorb Thermal Stress During Soldering Eliminating the Possibility of Damage to the Die PbFree Packages are Available MAXIMUM RATINGS (T A = unless otherwise noted) Rating Symbol Value Unit Collector-Base Voltage V CBO 5 Vdc Collector-Emitter Voltage V CEO 5 Vdc Collector Current I C madc THERMAL CHARACTERISTICS Rating Symbol Value Unit Total Device Dissipation, FR Board (Note T A = Derate above Thermal Resistance, JunctiontoAmbient (Note ) Total Device Dissipation, FR Board (Note T A = Derate above Thermal Resistance, JunctiontoAmbient (Note ) Junction and Storage Temperature Range P D.6 mw mw/ C R JA 6 C/W P D. mw mw/ C R JA C/W T J, T stg 55 to +5 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. Minimum Pad. Inch Pad NPN SILICON BIAS RESISTOR TRANSISTORS PIN BASE (INPUT) R R SC75 (SOT6) CASE 6 STYLE PIN COLLECTOR (OUTPUT) PIN EMITTER (GROUND) ORDERING INFORMATION See detailed ordering, marking, and shipping information in the package dimensions section on page of this data sheet. MARKING DIAGRAM xx M xx = Specific Device Code xx = (Refer to page ) M = Date Code* = PbFree Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. Semiconductor Components Industries, LLC, 6 March, 6 Rev. 8 Publication Order Number: DTCEET/D

2 DTCEET Series ORDERING INFORMATION, DEVICE MARKING and RESISTOR VALUES DTCEET DTCEETG Device Marking R (K) R (K) Package Shipping 8A SC75/SOT6 SC75/SOT6 (PbFree) DTCEET SC75/SOT6 DTCEETG 8B SC75/SOT6 (PbFree) DTCEET SC75/SOT6 DTCEETG 8C 7 7 SC75/SOT6 (PbFree) DTCYET SC75/SOT6 DTCYETG 8D 7 SC75/SOT6 (PbFree) DTCTET SC75/SOT6 DTCTETG 9 SC75/SOT6 (PbFree) DTCTET SC75/SOT6 DTCTETG 8F.7 SC75/SOT6 (PbFree) DTCEET SC75/SOT6 DTCEETG 8H.. SC75/SOT6 (PbFree) DTCEET SC75/SOT6 DTCEETG 8J.7.7 SC75/SOT6 (PbFree) DTCZET SC75/SOT6 DTCZETG 8K.7 7 SC75/SOT6 (PbFree) DTCXET SC75/SOT6 DTCXETG 8L 7 SC75/SOT6 (PbFree) DTCJET SC75/SOT6 DTCJETG 8M. 7 SC75/SOT6 (PbFree) DTC5EET SC75/SOT6 DTC5EETG 8N SC75/SOT6 (PbFree) DTCWET SC75/SOT6 DTCWETG 8P 7 SC75/SOT6 For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8/D.

3 DTCEET Series ELECTRICAL CHARACTERISTICS (T A = unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS CollectorBase Cutoff Current (V CB = 5 V, I E = ) I CBO nadc CollectorEmitter Cutoff Current (V CE = 5 V, I B = ) I CEO 5 nadc EmitterBase Cutoff Current DTCEET I EBO.5 madc (V EB = 6. V, I C = ) DTCEET DTCEET DTCYET DTCTET DTCTET DTCEET DTCEET DTCZET DTCXET DTCJET DTC5EET DTCWET CollectorBase Breakdown Voltage (I C = A, I E = ) V (BR)CBO 5 Vdc CollectorEmitter Breakdown Voltage (Note ) (I C =. ma, I B = ) V (BR)CEO 5 Vdc ON CHARACTERISTICS (Note ) DC Current Gain DTCEET (V CE = V, I C = 5. ma) DTCEET DTCEET DTCYET DTCTET DTCTET DTCEET DTCEET DTCZET DTCXET DTCJET DTC5EET DTCWET CollectorEmitter Saturation Voltage (I C = ma, I B =. ma) (I C = ma, I B = 5 ma) DTCEET (I C = ma, I B = ma) DTCTET/DTCTET/ DTCEET/DTCZET/DTCXET Output Voltage (on) (V CC = 5. V, V B =.5 V, R L =. k ) DTCEET DTCEET DTCYET DTCTET DTCTET DTCEET DTCEET DTCZET DTCXET DTCJET (V CC = 5. V, V B =.5 V, R L =. k ) DTCEET (V CC = 5. V, V B = 5.5 V, R L =. k ) DTC5EET (V CC = 5. V, V B =. V, R L =. k ) DTCWET Output Voltage (off) (V CC = 5. V, V B =.5 V, R L =. k ) (V CC = 5. V, V B = 5 V, R L =. k ) DTCTET DTCZET DTCTET h FE V CE(sat) 5 Vdc V OL Vdc V OH.9 Vdc. Pulse Test: Pulse Width < s, Duty Cycle <.%

4 DTCEET Series ELECTRICAL CHARACTERISTICS (T A = unless otherwise noted) (Continued) Characteristic Symbol Min Typ Max Unit Input Resistor TCEET DTCEET DTCEET DTCYET DTCTET DTCTET DTCEET DTCEET DTCZET DTCXET DTCJET DTC5EET DTCWET R k Resistor Ratio DTCEET/DTCEET/DTCEET/ DTC5EET DTCYET DTCTET/DTCTET DTCEET/DTCEET DTCZET DTCXET DTCJET DTCWETD R /R PD, POWER DISSIPATION (MILLIWATTS) 5 5 R JA = 6 C/W T A, AMBIENT TEMPERATURE ( C) Figure. Derating Curve r(t), NORMALIZED TRANSIENT THERMAL RESISTANCE. D = SINGLE PULSE t, TIME (s) Figure. Normalized Thermal Response

5 DTCEET Series TYPICAL ELECTRICAL CHARACTERISTICS DTCEET VCE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS) C ob, CAPACITANCE (pf)... 5 I C /I B = Figure. V CE(sat) versus I C T A = f = MHz I E = V T A = h FE, DC CURRENT GAIN (NORMALIZED).. Figure. DC Current Gain T A = V CE = V T A = V O = 5 V V R, REVERSE BIAS VOLTAGE (VOLTS) Figure 5. Output Capacitance Figure 6. Output Current versus Input Voltage V O = V T A = Vin, INPUT VOLTAGE (VOLTS). 5 Figure 7. Input Voltage versus Output Current 5

6 DTCEET Series TYPICAL ELECTRICAL CHARACTERISTICS DTCEET V CE(sat), COLLECTOR VOLTAGE (VOLTS)... I C /I B = 5 h FE, DC CURRENT GAIN T A = V CE = V Figure 8. V CE(sat) versus I C Figure 9. DC Current Gain.5 C ob, CAPACITANCE (pf) f = MHz I E = V T A =.. T A = V O = 5 V V R, REVERSE BIAS VOLTAGE (VOLTS) Figure. Output Capacitance Figure. Output Current versus Input Voltage T A = V O = V. 5 Figure. Input Voltage versus Output Current 6

7 DTCEET Series TYPICAL ELECTRICAL CHARACTERISTICS DTCEET VCE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS Cob, CAPACITANCE (pf)... 5 I C /I B = T A = Figure. V CE(sat) versus I C V R, REVERSE BIAS VOLTAGE (VOLTS) f = MHz I E = V T A = 5 h FE, DC CURRENT GAIN (NORMALIZED)... Figure. DC Current Gain V CE = V T A = T A = V O = 5 V 6 8 Figure 5. Output Capacitance Figure 6. Output Current versus Input Voltage V O = V Vin, INPUT VOLTAGE (VOLTS) T A =. 5 Figure 7. Input Voltage versus Output Current 7

8 DTCEET Series TYPICAL ELECTRICAL CHARACTERISTICS DTCEET V CE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS Cob, CAPACITANCE (pf) I C /I B = T A = Figure 8. V CE(sat) versus I C V R, REVERSE BIAS VOLTAGE (VOLTS). 5 f = MHz I E = V T A = 5 h FE, DC CURRENT GAIN (NORMALIZED).. Figure 9. DC Current Gain T A = V O = 5 V V CE = V T A =. 6 8 Figure. Output Capacitance Figure. Output Current versus Input Voltage V O = V Vin, INPUT VOLTAGE (VOLTS) T A =. 5 Figure. Input Voltage versus Output Current 8

9 DTCEET Series TYPICAL ELECTRICAL CHARACTERISTICS DTCYET V CE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS) Cob, CAPACITANCE (pf) I C /I B = T A = Figure. V CE(sat) versus I C f = MHz l E = V T A = h FE, DC CURRENT GAIN (NORMALIZED) V T A = CE = Figure. DC Current Gain T A = V O = 5 V V R, REVERSE BIAS VOLTAGE (VOLTS) Figure 5. Output Capacitance 6 8 Figure 6. Output Current versus Input Voltage V O = V T A = Vin, INPUT VOLTAGE (VOLTS). 5 Figure 7. Input Voltage versus Output Current 9

10 DTCEET Series TYPICAL APPLICATIONS FOR NPN BRTs + V ISOLATED LOAD FROM P OR OTHER LOGIC Figure 8. Level Shifter: Connects or Volt Circuits to Logic + V V CC OUT IN LOAD Figure 9. Open Collector Inverter: Inverts the Input Signal Figure. Inexpensive, Unregulated Current Source

11 DTCEET Series PACKAGE DIMENSIONS SC75/SOT6 CASE 6 ISSUE F b PL (.8) M D E e D H E (.8) E NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.5M, 98.. CONTROLLING DIMENSION: MILLIMETER. MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A A b C D E e. BSC. BSC L H E C L A A STYLE : PIN. BASE. EMITTER. COLLECTOR SOLDERING FOOTPRINT* SCALE : mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Phoenix, Arizona 858 USA Phone: or 886 Toll Free USA/Canada Fax: or 8867 Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 9 Kamimeguro, Meguroku, Tokyo, Japan 55 Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative. DTCEET/D

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