Low Cost, 300 MHz Voltage Feedback Amplifiers AD8055/AD8056
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- Rhoda Daniel
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1 a FEATURES Low Cost Single (AD8) and Dual (AD8) Easy to Use Voltage Feedback Architecture High Speed MHz, db Bandwidth (G = +) V/ s Slew Rate ns Settling to.% Low Distortion: MHz Low Noise: nv/ Hz Low DC Errors: mv Max V OS,. A Max I B Small Packaging AD8 Available in SOT-- AD8 Available in 8-Lead microsoic Excellent Video Specifications (R L =, ) Gain Flatness. db to MHz.% Differential Gain Error. Differential Phase Error Drives Four Video Loads (. ) with.% and. Differential Gain and Differential Phase Low Power, V Supplies ma Typ/Amplifier Power Supply Current High Output Drive Current: Over ma APPLICATIONS Imaging Photodiode Preamp Video Line Driver Differential Line Driver Professional Cameras Video Switchers Special Effects A-to-D Driver Active Filters PRODUCT DESCRIPTION The AD8 (single) and AD8 (dual) voltage feedback amplifiers offer bandwidth and slew rate typically found in current feedback amplifiers. Additionally, these amplifiers are easy to use and available at a very low cost. Despite their low cost, the AD8 and AD8 provide excellent overall performance. For video applications, their differential gain and phase error are.% and. into a Ω load, and.% and. while driving four video loads (. Ω). Their. db flatness out to MHz, wide bandwidth out to MHz, along with V/µs slew rate and ns settling time, make them useful for a variety of high speed applications. Low Cost, MHz Voltage Feedback Amplifiers AD8/AD8 FUNCTIONAL BLOCK DIAGRAMS The AD8 and AD8 require only ma typ/amplifier of supply current and operate on dual ± V or single + V power supply, while being capable of delivering over ma of load current. All this is offered in a small 8-lead plastic DIP, 8-lead SOIC packages, -lead SOT-- package (AD8) and an 8-lead microsoic package (AD8). These features make the AD8/AD8 ideal for portable and battery powered applications where size and power are critical. These amplifiers are available in the industrial temperature range of C to +8 C. GAIN db N-8 and SO-8 AD8 NC IN +IN V S (Not to Scale) NC = NO CONNECT 8 NC +V S NC R C R S R F R L G = + R F = 99 G = + R F = V S N-8, SO-8, microsoic (RM) AD8 OUT IN +IN V S (Not to Scale) G = + R F = R C = SOT-- (RT) = mv p-p R L = R F =.M M M M G Figure. Frequency Response AD8 +V S +IN IN (Not to Scale) 8 +V S OUT IN +IN Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9, Norwood, MA -9, U.S.A. Tel: 8/9- World Wide Web Site: Fax: 8/-8 Analog Devices, Inc.,
2 AD8/AD8 SPECIFICATIONS T A = + C, V S = V, R F =, R L =, Gain = +, unless otherwise noted) Model AD8A/AD8A Conditions Min Typ Max Unit DYNAMIC PERFORMANCE db Bandwidth G = +, V O =. V p-p MHz G = +, V O = V p-p MHz, V O =. V p-p MHz, V O = V p-p MHz Bandwidth for. db Flatness V O = mv p-p MHz Slew Rate G = +, V O = V Step V/µs, V O = V Step 8 V/µs Settling Time to.%, V O = V Step ns Rise and Fall Time, % to 9% G = +, V O =. V Step ns G = +, V O = V Step. ns, V O =. V Step.8 ns, V O = V Step ns NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion f C = MHz, V O = V p-p, R L = kω dbc f C = MHz, V O = V p-p, R L = kω dbc Crosstalk, Output to Output (AD8) f = MHz, db Input Voltage Noise f = khz nv/ Hz Input Current Noise f = khz pa/ Hz Differential Gain Error NTSC,, R L = Ω. % NTSC,, R L =. Ω. % Differential Phase Error NTSC,, R L = Ω. Degree NTSC,, R L =. Ω. Degree DC PERFORMANCE Input Offset Voltage mv T MIN T MAX mv Offset Drift µv/ C Input Bias Current.. µa T MIN T MAX µa Open Loop Gain V O = ±. V db T MIN T MAX db INPUT CHARACTERISTICS Input Resistance MΩ Input Capacitance pf Input Common-Mode Voltage Range. ± V Common-Mode Rejection Ratio V CM = ±. V 8 db OUTPUT CHARACTERISTICS Output Voltage Swing R L = Ω.9. ± V Output Current V O = ±. V ma Short Circuit Current ma POWER SUPPLY Operating Range ±. ±. ±. V Quiescent Current AD8.. ma T MIN T MAX. ma AD8 ma T MIN T MAX. ma Power Supply Rejection Ratio +V S = + V to + V, V S = V db V S = V to V, +V S = + V 9 8 db OPERATING TEMPERATURE RANGE +8 C NOTES Output current is limited by the maximum power dissipation in the package. See the power derating curves. Specifications subject to change without notice.
3 AD8/AD8 ABSOLUTE MAXIMUM RATINGS Supply Voltage V Internal Power Dissipation Plastic DIP Package (N) W Small Outline Package (R) W SOT-- Package (RT) W microsoic Package (RM) W Input Voltage (Common Mode) ± V S Differential Input Voltage ±. V Output Short Circuit Duration Observe Power Derating Curves Storage Temperature Range N, R C to + C Operating Temperature Range (A Grade).. C to +8 C Lead Temperature Range (Soldering sec) C NOTES Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Specification is for device in free air: 8-Lead Plastic DIP Package: θ JA = 9 C/W 8-Lead SOIC Package: θ JA = C/W -Lead SOT-- Package: θ JA = C/W 8-Lead microsoic Package: θ JA = C/W MAXIMUM POWER DISSIPATION The maximum power that can be safely dissipated by the AD8/ AD8 is limited by the associated rise in junction temperature. The maximum safe junction temperature for plastic encapsulated devices is determined by the glass transition temperature of the plastic, approximately + C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in the stresses exerted on the die by the package. Exceeding a junction temperature of + C for an extended period can result in device failure. While the AD8/AD8 are internally short circuit protected, this may not be sufficient to guarantee that the maximum junction temperature (+ C) is not exceeded under all conditions. To ensure proper operation, it is necessary to observe the maximum power derating curves. MAXIMUM POWER DISSIPATION Watts.... SOIC 8-LEAD SOIC PACKAGE 8-LEAD PLASTIC DIP PACKAGE SOT-- T J = + C 8 9 AMBIENT TEMPERATURE C Figure. Plot of Maximum Power Dissipation vs. Temperature for AD8/AD8 ORDERING GUIDE Model Temperature Range Package Description Package Option Brand Code AD8AN C to +8 C Plastic DIP N-8 AD8AR C to +8 C Small Outline Package (SOIC) SO-8 AD8AR-REEL C to +8 C " Tape and Reel SO-8 AD8AR-REEL C to +8 C " Tape and Reel SO-8 AD8ART-REEL C to +8 C " Tape and Reel RT- HA AD8ART-REEL C to +8 C " Tape and Reel RT- HA AD8AN C to +8 C Plastic DIP N-8 AD8AR C to +8 C Small Outline Package (SOIC) SO-8 AD8AR-REEL C to +8 C " Tape and Reel SO-8 AD8AR-REEL C to +8 C " Tape and Reel SO-8 AD8ARM C to +8 C microsoic RM-8 HA AD8ARM-REEL C to +8 C " Tape and Reel RM-8 HA AD8ARM-REEL C to +8 C " Tape and Reel RM-8 HA CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8/AD8 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE
4 AD8/AD8 Typical Performance Characteristics +V S. F +V S. F. F. F HP8A PULSE GENERATOR T R /T F = ns AD8. F. F HP8A PULSE GENERATOR T R /T F =.ns. F AD8. F. F. F. F. F V S V S Figure. Test Circuit, G = +, R L = Ω Figure. Test Circuit, G =, R L = Ω Figure. Small Step Response, G = + Figure. Small Step Response, G = Figure. Large Step Response, G = + Figure 8. Large Step Response, G =
5 AD8/AD8 GAIN db RS R C RF VOUT G = + R F = 99 R L G = + R F = = mv p-p R L = R F = G = + R F = R C =.M M M M G Figure 9. Small Signal Frequency Response, G = +,, G = +, G = + HARMONIC DISTORTION dbc 8 9 k = V p-p R L = k ND RD M M Figure. Distortion vs. Frequency M GAIN db R F = = V p-p R L = G = + R F = G = + R F = 99 G = + R F =.M M M M G Figure. Large Signal Frequency Response, G = +,, G = +, G = + DISTORTION dbc 8 9 k = V p-p R L = k k ND RD M M Figure. Distortion vs. Frequency M. OUTPUT db = mv R L = R F = DISTORTION dbc 8 R L = k ND RD...M M M M G Figure.. db Flatness V p-p Figure. Distortion MHz
6 AD8/AD8 RISETIME AND FALLTIME ns 9 8 G = + R L = R F = FALLTIME RISETIME RISETIME AND FALLTIME ns 9 8 R L = R F = RISETIME FALLTIME V p-p Figure. Risetime and Falltime vs V p-p Figure 8. Risetime and Falltime vs. RISETIME AND FALLTIME ns 9 8 G = + R L = k R F = FALLTIME RISETIME RISETIME AND FALLTIME ns R L = k R F = RISETIME FALLTIME V p-p Figure. Risetime and Falltime vs V p-p Figure 9. Risetime and Falltime vs. SETTLING TIME % TIME ns = V TO V OR V TO V R L = Figure. Settling Time PSRR db 8 R F = PSRR +PSRR 9. Figure. PSRR vs. Frequency
7 AD8/AD8 Figure. Overload Recovery Figure. Overload Recovery CROSSTALK db 8 9 = dbm R L = R F = SIDE DRIVEN SIDE DRIVEN OPEN LOOP GAIN db 9 8 R L =. Figure. Crosstalk (Output-to-Output) vs. Frequency.. Figure. Open Loop Gain vs. Frequency R L = CMRR db 8 PHASE Degrees Figure. CMRR vs. Frequency 8.. Figure. Phase vs. Frequency
8 AD8/AD8 DIFFERENTIAL GAIN % DIFFERENTIAL PHASE Degrees R F = R F = BACK TERMINATED LOAD ( ) ST ND RD TH TH TH TH 8TH 9TH TH TH IRE BACK TERMINATED LOAD ( ) ST ND RD TH TH TH TH 8TH 9TH TH TH IRE Figure. Differential Gain and Differential Phase VOLTAGE NOISE nv Hz nv/ Hz k k k M M M Figure. Voltage Noise vs. Frequency DIFFERENTIAL GAIN % DIFFERENTIAL PHASE Degrees R F = VIDEO LOADS (. ) ST ND RD TH TH TH TH 8TH 9TH TH TH IRE VIDEO LOADS (. ) R F = ST ND RD TH TH TH TH 8TH 9TH TH TH IRE Figure 8. Differential Gain and Differential Phase VOLTAGE NOISE pa Hz. k k k M M M Figure. Current Noise vs. Frequency.... R L = k V S = V R F = Volts... R L = R L = Z OUT... 8 TEMPERATURE C Figure 9. Output Swing vs. Temperature.. Figure. Output Impedance vs. Frequency 8
9 AD8/AD8 APPLICATIONS Four-Line Video Driver The AD8 is a useful low cost circuit for driving up to four video lines. For such an application, the amplifier is configured for a noninverting gain of as shown in Figure. The input video source is terminated in Ω and applied to the high impedance noninverting input. Each output cable is connected to the op amp output via a Ω series back termination resistor for proper cable termination. The terminating resistors at the other ends of the lines will divide the output signal by two, which is compensated for by the gain-of-two of the op amp stage. For a single load, the differential gain error of this circuit was measured to be.%, with a differential phase error of. degrees. The two load measurements were.% and. degrees, respectively. For four loads, the differential gain error is.%, while the differential phase increases to. degrees. +V AD8 V. F. F F F Figure. Four-Line Video Driver Single-Ended to Differential Line Driver Creating differential signals from single-ended signals is required for driving balanced, twisted pair cables, differential input A/D converters and other applications that require differential signals. This is sometimes accomplished by using an inverting and a noninverting amplifier stage to create the complementary signals. The circuit shown in Figure shows how an AD8 can be used to make a single-ended to differential converter that offers some advantages over the architecture mentioned above. Each op amp is configured for unity gain by the feedback resistors from the outputs to the inverting inputs. In addition, each output drives the opposite op amp with a gain of by means of the crossed resistors. The result of this is that the outputs are complementary and there is high gain in the overall configuration. Feedback techniques similar to a conventional op amp are used to control the gain of the circuit. From the noninverting input of Amp to the output of Amp, is an inverting gain. Between these points a feedback resistor can be used to close the loop. As in the case of a conventional op amp inverting gain stage, an input resistor is added to vary the gain. The gain of this circuit from the input to Amp output is R F /R I, while the gain to the output of Amp is R F /R I. The circuit thus creates a balanced differential output signal from a singleended input. The advantage of this circuit is that the gain can be changed by changing a single resistor and still maintain the balanced differential outputs. R I R F AD8 +V 8 AMP AMP V. F. F F F Figure. Single-Ended to Differential Line Driver Low Noise, Low Power Preamp The AD8 makes a good low cost, low noise, low power preamp. A gain of preamp can be made with a feedback resistor of 99 ohms and a gain resistor of ohms as shown in Figure. The circuit has a db bandwidth of MHz. R S +V V 99. F AD8. F + F F Figure. Low Noise, Low Power Preamp with G = and BW = MHz With a low source resistance (<approximately Ω), the major contributors to the input referred noise of this circuit are the input voltage noise of the amplifier and the noise of the Ω resistor. These are nv/ Hz and. nv/ Hz, respectively. These values yield a total input referred noise of. nv/ Hz. 9
10 AD8/AD8 Power Dissipation Limits With a V supply (total V CC V EE ), the quiescent power dissipation of the AD8 in the SOT-- package is mw, while the quiescent power dissipation of the AD8 in the microsoic is mw. This translates into a. C rise above the ambient for the SOT-- package and a C rise for the microsoic package. The power dissipated under heavy load conditions is approximately equal to the supply voltage minus the output voltage, times the load current, plus the quiescent power computed above. This total power dissipation is then multiplied by the thermal resistance of the package to find the temperature rise, above ambient, of the part. The junction temperature should be kept below C. The AD8 in the SOT-- package can dissipate mw while the AD8 in the microsoic package can dissipate mw (at 8 C ambient) without exceeding the maximum die temperature. In the case of the AD8, this is greater than. V rms into Ω, enough to accommodate a V p-p sine-wave signal on both outputs simultaneously. But since each output of the AD8 or AD8 is capable of supplying as much as ma into a short circuit, a continuous short circuit condition will exceed the maximum safe junction temperature. Resistor Selection The following table is provided as a guide to resistor selection for maintaining gain flatness vs. frequency for various values of gain. NORMALIZED GAIN db = dbm C L C L = pf C L = pf C L = pf C L = pf. Figure. Capacitive Load Drive In general, to minimize peaking or to ensure the stability for larger values of capacitive loads, a small series resistor, R S, can be added between the op amp output and the capacitor, C L. For the setup depicted in Figure, the relationship between R S and C L was empirically derived and is shown in Figure 8. R S was chosen to produce less than db of peaking in the frequency response. Note also that after a sharp rise R S quickly settles to about Ω. +V db Bandwidth Gain R F ( ) R I ( ) (MHz) AD8. F F R S FET PROBE k = dbm V. F F C L Driving Capacitive Loads When driving a capacitive load, most op amps will exhibit peaking in the frequency response just before the frequency rolls off. Figure shows the responses for an AD8 running at a gain of +, with a Ω load that is shunted by various values of capacitance. It can be seen that under these conditions, the part is still stable with capacitive loads of up to pf. R S Figure. Setup for R S vs. C L C L pf Figure 8. R S vs. C L
11 AD8/AD8 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic DIP (N-8) 8-Lead microsoic Package (RM-8) PIN. (.) MAX. (.). (.9). (.9).8 (8.8) 8. (.8). (.). (.) BSC. (.). (.).8 (.). (.). (.). (.8). (.) MIN SEATING PLANE. (8.). (.).9 (.9). (.9). (.8).8 (.). (.). (.9). (.). (.). (.). (.9) 8.99 (.).8 (.) PIN. (.) BSC. (.). (.8) SEATING PLANE.8 (.).8 (.). (.9). (.9). (.8). (.8). (.). (.8).8 (.). (.) Ca / (rev. B) 8-Lead Small Outline SOIC (SO-8) -Lead Plastic Surface Mount (RT-).98 (.).89 (.8). (.). (.). (.).9 (.8) 8. (.).8 (.8).9 (.8).9 (.).8 (.).98 (.) PIN.98 (.). (.) SEATING PLANE. (.) BSC.9 (.9).8 (.).88 (.). (.).98 (.). (.9) 8.9 (.).99 (.). (.). (.) PIN. (.). (.9).8 (.9) REF. (.9) REF. (.). (.9).9 (.). (.9).9 (.). (.).9 (.).8 (.) SEATING PLANE. (.).9 (.) PRINTED IN U.S.A.
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