SIPMOS Small-Signal-Transistor
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1 SIPMOS Small-Signal-Transistor Features N-channel Depletion mode dv /dt rated Product Summary V DS 6 V R DS(on),max 8 Ω I DSS,min.13 A Available with V GS(th) indicator on reel Qualified according to AEC Q11 1% lead-free; Halogen-free; RoHS compliant PG-SOT Type Package Pb-free Halogen-free Tape and Reel Information Marking BSS159N PG-SOT-23 Yes Yes H6327: 3 pcs/reel SGs BSS159N PG-SOT-23 Yes Yes H696: 3 pcs/reel sorted in V GS(th) bands 1) SGs Maximum ratings, at T j =25 C, unless otherwise specified Parameter Symbol Conditions Value Unit Continuous drain current I D T A =25 C.23 A T A =7 C.18 Pulsed drain current I D,pulse T A =25 C.92 Reverse diode dv /dt dv /dt I D =.23 A, V DS =6 V, di /dt =2 A/µs, T j,max =15 C 6 kv/µs Gate source voltage V GS ±2 V ESD Class JESD22-A114 -HBM (<25V) Power dissipation P tot T A =25 C.36 W Operating and storage temperature T j, T stg C IEC climatic category; DIN IEC /15/56 1) see table on next page and diagram 11 Rev. 2.2 page
2 Parameter Symbol Conditions Values Unit min. typ. max. Thermal characteristics Thermal characteristics R thja minimal footprint K/W Electrical characteristics, at T j =25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS =-1 V, I D =25 µa V Gate threshold voltage V GS(th) V DS =3 V, I D =26 µa Drain-source cutoff current I D(off) V DS =6 V, V GS =-1 V, T j =25 C µa V DS =6 V, V GS =-1 V, T j =125 C Gate-source leakage current I GSS V GS =2 V, V DS = V na On-state drain current I DSS V GS = V, V DS =1 V ma Drain-source on-state resistance R DS(on) V GS = V, I D =.7 A Ω V GS =1 V, I D =.16 A Transconductance g fs V DS >2 I D R DS(on)max, I D =.16 A S Threshold voltage V GS(th) sorted in bands 2) J V GS(th) V DS =3 V, I D =26 µa V K L M N ) Each reel contains transistors out of one band whose identifying letter is printed on the reel label. A specific band cannot be ordered separately. Rev. 2.2 page
3 Parameter Symbol Conditions Values Unit min. typ. max. Dynamic characteristics Input capacitance C iss pf Output capacitance C oss V GS =-3 V, V DS =25 V, f =1 MHz Reverse transfer capacitance C rss Turn-on delay time t d(on) ns Rise time t r V DD =25 V, V GS =-3 7 V, Turn-off delay time t d(off) I D =.16 A, R G =6 Ω Fall time t f Gate Charge Characteristics Gate to source charge Q gs nc Gate to drain charge Q gd V DD =48 V, I D =.16 A, Gate charge total Q g V GS =-3 to 5 V Gate plateau voltage V plateau V Reverse Diode Diode continous forward current I S T A =25 C A Diode pulse current I S,pulse Diode forward voltage V SD V GS =-3 V, I F =.16 A, T j =25 C V Reverse recovery time t rr V R =3 V, I F =.16 A, ns Reverse recovery charge Q rr di F /dt =1 A/µs nc Rev. 2.2 page
4 1 Power dissipation 2 Drain current P tot =f(t A ) I D =f(t A ); V GS 1 V P tot [W] T A [ C] T A [ C] 3 Safe operating area 4 Max. transient thermal impedance I D =f(v DS ); T A =25 C; D = Z thja =f(t p ) parameter: D =t p /T 1 limited by on-state resistance 1 µs 1 µs ms ms 1 ms DC Z thja [K/W] single pulse V DS [V] t p [s] Rev. 2.2 page
5 5 Typ. output characteristics 6 Typ. drain-source on resistance I D =f(v DS ); T j =25 C R DS(on) =f(i D ); T j =25 C parameter: V GS.6 parameter: V GS 1 V.5 1 V 1 V.5 V V.1 V V.1 V V -.1 V -.2 V R DS(on) [Ω] V.2 V.5 V.2 1 V V V DS [V] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D =f(v GS ); V DS >2 I D R DS(on)max g fs =f(i D ); T j =25 C g fs [S] V GS [V] Rev. 2.2 page
6 9 Drain-source on-state resistance 1 Typ. gate threshold voltage R DS(on) =f(t j ); I D =.7 A; V GS = V V GS(th) =f(t j ); V DS =3 V; I D =26 µa parameter: I D max R DS(on) [Ω] % V GS(th) [V] typ min 4 typ T j [ C] T j [ C] 11 Threshold voltage bands 12 Typ. capacitances I D =f(v GS ); V DS =3 V; T j =25 C C =f(v DS ); V GS =-3 V; f =1 MHz Ciss.1 I D [ma] N M L K J 26 µa 1 1 Coss.1 C [pf] Crss V GS [V] V DS [V] Rev. 2.2 page
7 13 Forward characteristics of reverse diode 14 Typ. gate charge I F =f(v SD ) parameter: T j 1 V GS =f(q gate ); I D =.16 A pulsed parameter: V DD C 25 C 15 C, 98% C, 98% 3.5 V DS(max) I F [A] V GS [V] V DS(max).8 V DS(max) V SD [V] Q gate [nc] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS) =f(t j ); I D =25 µa 7 V GS Q g 65 V BR(DSS) [V] 6 V gs(th) 55 Q g(th) Q sw Q gate T j [ C] Q gs Q gd Rev. 2.2 page
8 SOT-23 Package Outline: Footprint: Packaging: Dimensions in mm Rev. 2.2 page
9 Published by Infineon Technologies AG Munich, Germany 29 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office ( Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.2 page
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