FSM Specification. State minimization
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1 FINITE-STATE MACHINE OPTIMIZATION cgiovanni De Micheli Stanford University Outline Modeling synchronous circuits: { State-based models. { Structural models. State-based optimization methods: { State minimization. { State encoding. Synchronous Logic Circuits Modeling synchronous circuits Interconnection of: { Combinational logic gates. { Synchronous delay elements: E-T or M-S registers. State-based model: { Model circuits as nite-state machines. { Represent by state tables/diagrams. { Apply exact/heuristic algorithms for: State minimization. State encoding. Assumptions: { No direct combinational feedback. { Single-phase clocking. Structural models: { Represent circuit by synchronous logic network. { Apply: Retiming. Logic transformations.
2 State-based optimization Formal nite-state machine model A set of primary inputs patterns X. A set of primary outputs patterns Y. A set of states S. FSM Specification State Minimization A state transition function: { : X S! S. An output function: State Encoding Combinational Optimization { : X S! Y for Mealy models { : S! Y for Moore models. State minimization for completely specied FSMs State minimization Equivalent states: Completely specied nite-state machines : { No don't care conditions. { Easy to solve. Incompletely specied nite-state machines : { Unspecied transitions and/or outputs. { Intractable problem. { Given any input sequence the corresponding output sequences match. Theorem: { Two states are equivalent i: they lead to identical outputs and their next-states are equivalent. Equivalence is transitive: { Partition states into equivalence classes. { Minimum nite-state machine is unique.
3 INPUT STATE N-STATE OUTPUT 0 s 1 s s 1 s s 2 s s 2 s s 3 s s 3 s s 4 s s 4 s s 5 s s 5 s 1 0 0/1 3 1/ /1 0/1 0/0 1/0 1/1 2 1/1 5 1/1 0/0 Algorithm Algorithm Stepwise partition renement. Initially: { All states in the same partition block. Then: { Rene partition blocks. At convergence: 1 = States belong to the same block when outputs are the same for any input. While further splitting is possible: { k+1 = States belong to the same block if they were previously in the same block and their next-states are in the same block of k for any input. { Blocks identify equivalent states.
4 1 = ffs 1 s 2 g fs 3 s 4 g fs 5 gg: minimal nite-state machine 2 = ffs 1 s 2 g fs 3 g fs 4 g fs 5 gg: 2 = is a partition into equivalence classes: { States fs 1 s 2 g are equivalent. INPUT STATE N-STATE OUTPUT 0 s 12 s s 12 s s 3 s s 3 s s 4 s s 4 s s 5 s s 5 s /1 3 1/ /0 Computational complexity Polynomially-bound algorithm. There can be at most jsj partition renements. 0/1 0/0 1/0 1/1 1/1 0/1 5 1/1 Each renement requires considering each state: { Complexity O(jSj 2 ). Actual time may depend upon: { Data-structures. { Implementation details.
5 State minimization for incompletely specied FSMs Applicable input sequences: { All transitions are specied. Compatible states: { Given any applicable input sequence the corresponding output sequences match. State minimization for incompletely specied FSMs Compatibility is not an equivalency relation. Minimum nite-state machine is not unique. Implication relations make problem intractable. Theorem: { Two states are compatible i: they lead to identical outputs (when both are specied) and their next-states are compatible (when both are specied). Trivial method for the sake of illustration Consider all the possible don't care assignments. INPUT STATE N-STATE OUTPUT 0 s 1 s s 1 s 5 * 0 s 2 s 3 * 1 s 2 s s 3 s s 3 s s 4 s s 4 s s 5 s s 5 s 1 0 { n don't care imply 2 n completely specied FSMs. 2 n solutions. : { Replace * by 1. = ffs 1 s 2 g fs 3 g fs 4 g fs 5 gg: { Replace * by 0. = ffs 1 s 5 g fs 2 s 3 s 4 gg:
6 Compatibility and implications Compatibility and implications Compatible states fs 1 s 2 g. If fs 3 s 4 g are compatible: { then fs 1 s 5 g are compatible. Incompatible states fs 2 s 5 g. Compatible pairs: { fs 1 s 2 g { fs 1 s 5 g ( fs 3 s 4 g { fs 2 s 4 g ( fs 3 s 4 g { fs 2 s 3 g ( fs 1 s 5 g { fs 3 s 4 g ( fs 2 s 4 g [ fs 1 s 5 g Incompatible pairs: { fs 2 s 5 g fs 3 s 5 g { fs 1 s 4 g fs 4 s 5 g { fs 1 s 3 g Compatibility and implications A class of compatible states is such that all state pairs are compatible. Maximal compatible classes A class is maximal: { If not subset of another class. Closure property: { A set of classes such that all compatibility implications are satised. fs 1 s 2 g fs 1 s 5 g ( fs 3 s 4 g fs 2 s 3 s 4 g ( fs 1 s 5 g Cover with MCC has cardinality 3. The set of maximal compatibility classes: { Has the closure property. { May not provide a minimum solution.
7 Formulation of the state minimization problem Prime compatible classes A class is prime, if not subset of another class implying the same set or a subset of classes. Compute the prime compatibility classes. Select a minimum number of PCC such that: { all states are covered. { all implications are satised. Binate covering problem. fs 1 s 2 g fs 1 s 5 g ( fs 3 s 4 g fs 2 s 3 s 4 g ( fs 1 s 5 g Minimum cover: ffs 1 s 5 g fs 2 s 3 s 4 gg. Minimum cover has cardinality 2. Heuristic algorithms State encoding Determine a binary encoding of the states: Approximate the covering problem. { Preserve closure property. { Sacrice minimality. { that optimize machine implementation: area. cycle-time. Consider all maximal compatibility classes. { May not yield minimum. Modeling: { Two-level circuits. { Multiple-level circuits.
8 Two-level circuit models Sum of product representation. State encoding for two-level models { PLA implementation. Area: { # of products # I/Os. Delay: { Twice # of products plus # I/Os. Symbolic minimization of state table. Constrained encoding problems. { Exact and heuristic methods. Applicable to large nite-state machines. Note: { # products of a minimum implementation. { # I/Os depends on encoding length. Symbolic minimization State encoding of nite-state machines Extension of two-level logic optimization. Reduce the number of rows of a table, that can have symbolic elds. Reduction exploits: Given a (minimum) state table of a nite-state machine : { nd a consistent encoding of the states that preserves the cover minimality with minimum number of bits. { Combination of input symbols in the same eld. { Covering of output symbols.
9 Primary Inputs COMBINATIONAL CIRCUIT ISTERS clock Primary Outputs State Minimum symbolic cover: * s 1 s 2 s 4 s s 2 s s 4 s 5 s s 3 s 4 1 INPUT P-STATE N-STATE OUTPUT 0 s 1 s s 1 s s 2 s s 2 s s 3 s s 3 s s 4 s s 4 s s 5 s s 5 s 5 0 Covering constraints: { s 1 and s 2 cover s 3 { s 5 is covered by all other states. Encoding constraint matrices: A = B = Encoding matrix (one row per state): E = Multiple-level circuit models Logic network representation. { Logic gate interconnection. Area: { # of literals. Encoded cover of combinational component: * 1** * Delay: { Critical path length. Note { # literals and CP in a minimum network.
10 State encoding for multiple-level models Cube-extraction heuristics [Mustang-Devadas]. Rationale: { When two (or more) states have a transition to the same next-state: Keep the distance of their encoding short. Extract a large common cube. Exploit rst stage of logic. Works ne because most FSM logic is shallow. 5-state FSM (3-bits). { s 1! s 3 with input i. { s 2! s 3 with input i 0. Encoding: { s 1! 000 = a 0 b 0 c 0. { s 2! 001 = a 0 b 0 c. Transition: { ia 0 b 0 c 0 + i 0 a 0 b 0 c = a 0 b 0 (ic + i 0 c 0 ) { 6 literals instead of 8. Algorithm Examine all state pairs: { Complete graph with jv j = jsj. Add weight on edges: { Model desired code proximity. Diculties The number of occurrences of common factors depends on the next-state encoding. The extraction of common cubes interact with each other. Embed graph in the Boolean space.
11 Algorithm implementation Fanout-oriented algorithm: { Consider present states and outputs. { Maximize the size of the most frequent common cubes. Fanin-oriented algorithm: { Consider next states and inputs. { Maximize the frequency of the largest common cubes. Finite-state machine decomposition Classic problem. { Based on partition theory. { Recently done at symbolic level. Dierent topologies: { Cascade, parallel, general. Recent heuristic algorithms: { Factorization [Devadas]. Summary (a) Finite-state machine optimization is commonly used. { Large body of research. (b) (c) State reduction/encoding correlates well to area minimization. Performance-oriented methods are still being researched. (d)
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