FEATURES DESCRIPTIO APPLICATIO S. LT1618 Constant-Current/ Constant-Voltage 1.4MHz Step-Up DC/DC Converter TYPICAL APPLICATIO

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1 LT68 Constant-Current/ Constant-Voltage.MHz Step-p DC/DC Converter FEATRES Accurate Input/Output Current Control: ±5% Over Temperature Accurate Output Voltage Control: ±% Wide Range:.6V to 8V.MHz Switching Frequency High Output Voltage: p to 5V Low V CESAT Switch: mv at A Available in (mm mm.8mm) -Pin DFN and -Pin MSOP Packages APPLICATIO S LED Backlight Drivers SB Powered Boost/SEPIC Converters Input Current Limited Boost/SEPIC Converters Battery Chargers DESCRIPTIO The LT 68 step-up DC/DC converter combines a traditional voltage feedback loop and a unique current feedback loop to operate as a constant-current, constant-voltage source. This fixed frequency, current mode switcher operates from a wide input voltage range of.6v to 8V, and the high switching frequency of.mhz permits the use of tiny, low profile inductors and capacitors. The current sense voltage is set at 5mV and can be adjusted using the I ADJ pin. Available in the -Pin (mm mm) Exposed Pad DFN and -pin MSOP packages, the LT68 provides a complete solution for constant-current applications., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO SB to V Boost Converter (with Selectable ma/5ma Input Current Limit) 5V.Ω L µh D V OT V Efficiency Curve C.V OFF ON V k 8 7 ISN SW LT68 FB I ADJ GND V C 5 R k R 7k C EFFICIENCY (%) V ma 5mA V k C: TAIYO YDEN JMKBJ75 C: TAIYO YDEN EMK6BJ75 D: ON SEMICONDCTOR MBR5 L: SMIDA CR- k nf 68 TAa LOAD CRRENT (ma) 68 TAb

2 LT68 ABSOLTE AXI RATI GS W W W, Voltage... 8V SW Voltage... 6V, ISN Voltage... 6V I ADJ Voltage... 6V FB Voltage....5V V C Voltage....5V (Note ) Junction Temperature... 5 C Operating Temperature Range (Note ).. C to 85 C Storage Temperature Range MSOP C to 5 C DFN C to 5 C Lead Temperature (Soldering, sec) (MSOP)... C PACKAGE/ORDER I FOR W ATIO FB ISN I ADJ GND TOP VIEW V C 8 7 SW 5 6 SW DD PACKAGE -LEAD (mm mm) PLASTIC DFN T JMAX = 5 C, θ JA = C/W, θ JC = C/W EXPOSED PAD (PIN ) IS GND AND MST BE SOLDERED TO PCB ORDER PART NMBER LT68EDD DD PART MARKING LAFQ FB ISN I ADJ GND 5 TOP VIEW MS PACKAGE -LEAD PLASTIC MSOP T JMAX = 5 C, θ JA = 6 C/W V C SW NC ORDER PART NMBER LT68EMS MS PART MARKING LTNH Consult LTC marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range, otherwise specifications are at T A = 5 C. =.6V, V =.6V, unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX NITS Input Voltage.6 8 V Quiescent Current V =.6V, Not Switching.8.7 ma V = V. µa Reference Voltage Measured at FB Pin V..6.8 V Reference Voltage Line Regulation.6V < < 8V.. %/V FB Pin Bias Current V FB =.6V, =.8V ± ± na Error Amplifier Voltage Gain 8 V/V Error Amplifier Transconductance I C = ± 5µA 6 µmho Error Amplifier Sink Current V FB =.5V, V C = V 5 µa Error Amplifier Source Current V FB =.V, V C = V µa Current Sense Voltage (, ISN) V FB = V, V IADJ = V mv, ISN Pin Bias Currents (Note ) V =.85V, V ISN =.8V, V IADJ = V 5 8 µa (, ISN) Common Mode Minimum Voltage.8 V Switching Frequency V FB = V.5..6 MHz V FB = V 55 khz Maximum Switch Duty Cycle 88 % Switch Current Limit (Note ).5..8 A

3 ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range, otherwise specifications are at T A = 5 C. =.6V, V =.6V, unless otherwise noted. LT68 PARAMETER CONDITIONS MIN TYP MAX NITS Switch V CESAT I SW = A (Note ) 6 mv Switch Leakage Current Switch Off, V SW = 5V. 5 µa Pin Current V =.6V 5 µa Shutdown Threshold ( Pin). V Start-p Threshold ( Pin) V Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : The LT68 is guaranteed to meet performance specifications from C to 7 C. Specifications over the C to 85 C operating temperature range are assured by design, characterization, and correlation with statistical process controls. Note : Bias currents flow into the and ISN pins. Note : Switch current limit and switch V CESAT for the DD package is guaranteed by design and/or correlation to static test. TYPICAL PERFOR A CE CHARACTERISTICS W Switch Saturation Voltage (V CE, SAT ) FB Pin Voltage and Bias Current Switch Current Limit SATRATION VOLTAGE (mv) T J = 5 C T J = 5 C T J = 5 C FEEDBACK VOLTAGE (V) VOLTAGE CRRENT FB PIN BIAS CRRENT (na) PEAK CRRENT (A) SWITCH CRRENT (A) TEMPERATRE ( C) TEMPERATRE ( C) 5 68 G 68 G 68 G 5 Current Sense Voltage (I ADJ Pin = V) 6 Current Sense Voltage (V, ISN ) Quiescent Current.5 CRRENT SENSE VOLTAGE (mv) 5 5 CRRENT SENSE VOLTAGE (mv) 5 QIESCENT CRRENT (ma) = 8V =.6V TEMPERATRE ( C) I ADJ PIN VOLTAGE (V) TEMPERATRE ( C) 5 68 G 68 G5 68 G6

4 LT68 TYPICAL PERFOR A CE CHARACTERISTICS W SWITCHING FREQENCY (MHz) Switching Frequency Frequency Foldback Pin Current = 8V. =.6V TEMPERATRE ( C) SWITCHING FREQENCY (MHz).6 T J = 5 C FEEDBACK PIN VOLTAGE (V) PIN CRRENT (µa) 5 5 T J = 5 C 5 5 T J = 5 C 5 T J = 5 C SHTDOWN PIN VOLTAGE (V) 68 G7 68 G8 68 G PIN FNCTIONS FB (Pin /Pin ): Feedback Pin. Set the output voltage by selecting values for R and R (see Figure ): VOT R= R. 6 V (MS/DD) ISN (Pin /Pin ): Current Sense ( ) Pin. The inverting input to the current sense amplifier. (Pin /Pin ): Current Sense (+) Pin. The noninverting input to the current sense amplifier. I ADJ (Pin /Pin ): Current Sense Adjust Pin. A DC voltage applied to this pin will reduce the current sense voltage. If this adjustment is not needed, tie this pin to ground. GND (Pin 5/Pin 5): Ground Pin. Tie this pin directly to local ground plane. NC (Pin 6/NA): No Connection for MS Package. SW (NA/Pin 6): Switch Pin for DD Package. Connect this pin to Pin 7. SW (Pin 7/Pin 7): Switch Pin. This is the collector of the internal NPN power switch. Minimize the metal trace area connected to this pin to minimize EMI. (Pin 8/Pin 8): Input Supply Pin. Bypass this pin with a capacitor to ground as close to the device as possible. (Pin /Pin ): Shutdown Pin. Tie this pin higher than V to turn on the LT68; tie below.v to turn it off. V C (Pin /Pin ): Compensation Pin for Error Amplifier. Connect a series RC from this pin to ground. Typical values are kω and nf. Exposed Pad (NA/Pin ): The Exposed Pad on the DD package is GND and must be soldered to the PCB GND for optimum thermal performance.

5 LT68 BLOCK DIAGRA W L D R SENSE V OT C SW 8 7 C DRIVER Q.Ω + 5 A 5 ISN.MHz OSCILLATOR Σ I ADJ Q S R A A FB R.6V R 5 GND V C RC C C Figure. LT68 Block Diagram OPERATIO The LT68 uses a constant frequency, current mode control scheme to provide excellent line and load regulation. Operation can be best understood by referring to the Block Diagram in Figure. At the start of each oscillator cycle, the SR latch is set, turning on power switch Q. The signal at the noninverting input of PWM comparator A is a scaled-down version of the switch current (summed together with a portion of the oscillator ramp). When this signal reaches the level set by the output of error amplifier A, comparator A resets the latch and turns off the power switch. In this manner, A sets the correct peak current level to keep the output in regulation. If the error amplifier s output increases, more current is delivered to the output; if it decreases, less current is delivered. A has two inverting inputs, one from the voltage feedback loop, and one from the current feedback loop. Whichever inverting input is higher takes precedence, forcing the converter into either a constant-current or a constant-voltage mode. The LT68 is designed to transition cleanly between the two modes of operation. Current sense amplifier A senses the voltage between the and ISN pins and provides a 5 level-shifted version to error amplifier A. When the voltage between and ISN reaches 5mV, the output of A provides.6v to one of the noninverting inputs of A and the converter is in constant-current mode. If the current sense voltage exceeds 5mV, the output of A will increase causing the output of A to decrease, thus reducing the amount of current delivered to the output. In this manner the current sense voltage is regulated to 5mV. Similarly, if the FB pin increases above.6v, the output of A will decrease to reduce the peak current level and regulate the output (constant-voltage mode). 5

6 LT68 APPLICATIONS INFORMATION Inductor Selection W Several inductors that work well with the LT68 are listed in Table, although there are many other manufacturers and devices that can be used. Consult each manufacturer for more detailed information and for their entire selection of related parts. Many different sizes and shapes are available. Ferrite core inductors should be used to obtain the best efficiency, as core losses at.mhz are much lower for ferrite cores than for the cheaper powdered-iron ones. Choose an inductor that can handle the necessary peak current without saturating, and ensure that the inductor has a low DCR (copper-wire resistance) to minimize I R power losses. A.7µH or µh inductor will be a good choice for many LT68 designs. Table. Recommended Inductors L MAX HEIGHT PART (µh) (mω) (mm) VENDOR CDRH5D8-R. 57. Sumida CDRH5D8-. (87) CR-R CR-R7.7.5 CR- 8.5 CR5-.8 LQHCRM. 78. Murata LQHCRM. 6. (8) 7- LQHCR7M Capacitor Selection Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multilayer ceramic capacitors are an excellent choice. They have an extremely low ESR and are available in very small packages. X5R and X7R dielectrics are preferred, as these materials retain their capacitance over wider voltage and temperature ranges than other dielectrics. A to µf output capacitor is sufficient for high output current designs. Converters with lower output currents may need only a µf or.µf output capacitor. Solid tantalum or OSCON capacitors can be used, but they will occupy more board area than a ceramic and will have a higher ESR for the same footprint device. Always use a capacitor with a sufficient voltage rating. Ceramic capacitors also make a good choice for the input decoupling capacitor, which should be placed as close as possible to the pin of the LT68. A µf to input capacitor is sufficient for most applications. Table shows a list of several ceramic capacitor manufacturers. Consult the manufacturers for detailed information on their entire selection of ceramic parts. Table. Recommended Ceramic Capacitor Manufacturers VENDOR PHONE RL Taiyo Yuden (8) Murata (8) 7- Kemet (8) 86- Diode Selection Schottky diodes, with their low forward voltage drop and fast switching speed, are the ideal choice for LT68 applications. Table shows several Schottky diodes that work well with the LT68. Many different manufacturers make equivalent parts, but make sure that the component chosen has a sufficient current rating and a voltage rating greater than the output voltage. The diode conducts current only when the power switch is turned off (typically less than half the time), so a.5a or A diode will be sufficient for most designs. The companies below also offer Schottky diodes with higher voltage and current ratings. Table. Recommended Schottky Diodes A PART.5A PART VENDOR PHONE/RL PS Microsemi (5) 5-8 PS PS MBRM MBR5 ON Semiconductor (8) MBRM MBR5 MBRM MBR5 B B5 Diodes, Inc (85) 6-8 B B5 B B5 6

7 LT68 APPLICATIONS INFORMATION Setting Output Voltage W To set the output voltage, select the values of R and R (see Figure ) according to the following equation. V R R OT =. 6 For current source applications, use the FB pin for overvoltage protection. Pick R and R so that the output voltage will not go too high if the load is disconnected or if the load current drops below the preset value. Typically choose R and R so that the overvoltage value will be about % to % higher than the normal output voltage (when in constant-current mode). This prevents the voltage loop from interfering with the current loop in current source applications. For battery charger applications, pick the values of R and R to give the desired end of charge voltage. Selecting R SENSE /Current Sense Adjustment se the following formula to choose the correct current sense resistor value (for constant current operation). R SENSE = 5mV/I MAX For designs needing an adjustable current level, the I ADJ pin is provided. With the I ADJ pin tied to ground, the nominal current sense voltage is 5mV (appearing between the and ISN pins). Applying a positive DC voltage to the I ADJ pin will decrease the current sense voltage according to the following formula: V ISENSE V V =. 6 (. 8 ) 5 IADJ For example, if V is applied to the I ADJ pin, the current sense voltage will be reduced to about 8mV. This adjustability allows the regulated current to be reduced without changing the current sense resistor (e.g. to adjust brightness in an LED driver or to reduce the charge current in a battery charger). If the I ADJ pin is taken above.6v, the output of the error amplifier (the V C pin) will be pulled down and the LT68 will stop switching. A pulse width modulated (PWM) signal can also be used to adjust the current sense voltage; simply add an RC filterto convert the PWM signal into a DC voltage for the I ADJ pin. If the I ADJ pin is not used, it should be tied to ground. Do not leave the pin floating. For applications needing only a simple one-step current sense adjustment, the circuit in Figure works well. If a large value resistor ( MΩ) is placed between the I ADJ pin and ground, the current sense voltage will reduce to about 5mV, providing a 5% reduction in current. Do not leave the I ADJ pin open. This method gives a well-regulated current value in both states, and is controlled by a logic signal without the need for a variable PWM or DC control signal. When the NMOS transistor is on, the current sense voltage will be 5mV, when it is off, the current sense voltage will be reduced to 5mV. FLL CRRENT M Figure I ADJ LT68 68 F Considerations When Sensing Input Current In addition to regulating the DC output current for currentsource applications, the constant-current loop of the LT68 can also be used to provide an accurate input current limit. Boost converters cannot provide output short-circuit protection, but the surge turn-on current can be drastically reduced using the LT68 s current sense at the input. SEPICs, however, have an output that is DCisolated from the input, so an input current limit not only helps soft-start the output but also provides excellent short-circuit protection. 7

8 LT68 APPLICATIONS INFORMATION W When sensing input current, the sense resistor should be placed in front of the inductor (between the decoupling capacitor and the inductor) as shown in the circuits in the Typical Applications section. This will regulate the average inductor current and maintain a consistent inductor ripple current, which will, in turn, maintain a well regulated input current. Do not place the sense resistor between the input source and the input decoupling capacitor, as this may allow the inductor ripple current to vary widely (even though the average input current and the average inductor current will still be regulated). Since the inductor current is a triangular waveform (not a DC waveform like the output current) some tweaking of the compensation values (R C and C C on the V C pin) may be required to ensure a clean inductor ripple current while the constant-current loop is in effect. For these applications, the constantcurrent loop response can usually be improved by reducing the R C value, or by adding a capacitor (with a value of approximately C C /) in parallel with the R C and C C compensation network. Frequency Compensation The LT68 has an external compensation pin (V C ), which allows the loop response to be optimized for each application. An external resistor and capacitor (or sometimes just a capacitor) are placed at the V C pin to provide a pole and a zero (or just a pole) to ensure proper loop compensation. Numerous other poles and zeroes are present in the closed loop transfer function of a switching regulator, so the V C pin pole and zero are positioned to provide the best loop response. A thorough analysis of the switching regulator control loop is not within the scope of this data sheet, and will not be presented here, but values of kω and nf will be a good choice for many designs. For those wishing to optimize the compensation, use the kω and nf as a starting point. For LED backlight applications where a pulse-width modulation (PWM) signal is used to drive the I ADJ pin, the resistor is usually not included in the compensation network. This helps to provide additional filtering of the PWM signal at the output of the error amplifier (the V C pin). Switch Node Considerations To maximize efficiency, switch rise and fall times are made as short as possible. To prevent radiation and high frequency resonance problems, proper layout of the high frequency switching path is essential. Keep the output switch (SW pin), diode and output capacitor as close together as possible. Minimize the length and area of all traces connected to the switch pin, and always use a ground plane under the switching regulator to minimize interplane coupling. The high speed switching current path is shown in Figure. The signal path including the switch, output diode and output capacitor contains nanosecond rise and fall times and should be kept as short as possible. L SWITCH NODE V OT HIGH FREQENCY CIRCLATING PATH LOAD 68 F Figure 8

9 LT68 TYPICAL APPLICATIO S.5W Direct Broadcast Satellite (DBS) Power Supply with Short-Circuit Protection V.68Ω L µh C µf D L.µH C 8 7 ISN SW LT68 FB I ADJ GND V C 5 R C k L µh RHCP V ADD 5V.V LHCP R5.k R k R k C.µF C.µF Q MMBT R k R k Q FMMT77 ZETEX khz NETWORK TNING D MRS.5V/8.5V C C nf C: TAIYO YDEN EMK6BJ75 (8) 57-5 C: TAIYO YDEN TMK6BJ5 (8) 57-5 C, C: TAIYO YDEN TMK5BJ5 (8) 57-5 D: ON SEMICONDCTOR MBRM (8) L, L: SMIDA CR5- (87) L: SMIDA CR-R (87) TAa Efficiency 8 75 EFFICIENCY (%) LOAD CRRENT (ma) 5 68 TAb

10 LT68 TYPICAL APPLICATIONS -Cell White LED Driver.6V TO V L.7µH D.Ω ma C khz TO 5kHz PWM BRIGHTNESS ADJST R 5.k I ADJ GND 8 7 LT68 SW ISN FB V C R M C.µF 5 C µf R 6k C C.µF C: TAIYO YDEN JMKBJ75 (8) 57-5 C: TAIYO YDEN EMK6BJ5 (8) 57-5 D: ON SEMICONDCTOR MBR5 (8) L: SMIDA CLQD-R7 (87) TA -Cell Luxeon LED Driver.8V TO V L µh D.5Ω 5mA 8 7 C µf SW ISN LT68 k D I ADJ GND FB V C 5 nf C µf k C, C: TAIYO YDEN JMK7BJ5KA D: ON SEMICONDCTOR MBR5 D: LMILEDS LXHL-BW L: SMIDA CR- 68 TA

11 LT68 TYPICAL APPLICATIONS.7V TO 5V Li Ion White LED Driver L µh D.Ω ma C khz TO 5kHz PWM BRIGHTNESS ADJST R 5.k I ADJ GND 8 7 LT68 SW ISN FB V C R M C.µF 5 C µf R k C C.µF C: TAIYO YDEN JMKBJ75 (8) 57-5 C: TAIYO YDEN TMK6BJ5 (8) 57-5 D: ON SEMICONDCTOR MBR5 (8) L: SMIDA CLQD- (87) TA White LED Driver for LEDs.7V TO 5V L µh D.6Ω 8mA C khz TO 5kHz PWM BRIGHTNESS ADJST R 5.k I ADJ GND 8 7 LT68 SW ISN FB V C R M C.µF 5 C µf R k C C.µF 5Ω 5Ω 5Ω 5Ω C: TAIYO YDEN JMKBJ75 (8) 57-5 C: TAIYO YDEN TMK6BJ5 (8) 57-5 D: ON SEMICONDCTOR MBR5 (8) L: SMIDA CR- (87) TA5

12 LT68 TYPICAL APPLICATIONS SB to 5V SEPIC Converter 5V I IN.Ω L µh C.7µF D V OT 5V Efficiency C.V OFF ON V.V ma 5mA V 7 8 ISN SW LT68 FB k I ADJ GND V C 5 k nf C: TAIYO YDEN JMKBJ75 (8) 57-5 C: TAIYO YDEN JMK6BJ6 (8) 57-5 C: TAIYO YDEN EMKBJ7 (8) 57-5 D: ON SEMICONDCTOR MBR5 (8) L: SMIDA CR- (87) k L µh R 6k R 7k C µf 68 TAa EFFICIENCY (%) LOAD CRRENT (ma) 68 Fb SB SEPIC During Start-p SB SEPIC Start-p with Output Shorted V OT V/DIV V OT V/DIV I IN 5mA/DIV 5mA/DIV ms/div 68 TA ms/div 68 TA

13 LT68 TYPICAL APPLICATIO S V Boost Converter with 5mA Input Current Limit.8V TO 5V C I L.Ω 8 L µh 7 ISN SW LT68 FB I ADJ GND V C 5 k D R k R 7k V OT V C EFFICIENCY (%) Efficiency = 5V =.V nf C: TAIYO YDEN JMKBJ75 (8) 57-5 C: TAIYO YDEN EMK6BJ75 (8) 57-5 D: ON SEMICONDCTOR MBR5 (8) L: SMIDA CR- (87) TA6a LAD CRRENT (ma) 68 TA6b V Boost Converter Start-p with Input Current Limit ( =.8V, I LOAD = ma) V Boost Converter Start-p without Input Current Limit ( =.8V, I LOAD = ma) V OT 5V/DIV V OT 5V/DIV I LI ma/div I LI ma/div 5µs/DIV 68 TA7 5µs/DIV 68 TA8

14 LT68 PACKAGE DESCRIPTIO DD Package -Lead Plastic DFN (mm mm) (Reference LTC DWG # ).675 ±.5.5 ±.5.5 ±.5.65 ±.5 ( SIDES) PACKAGE OTLINE.5 ±.5.5 BSC.8 ±.5 ( SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R =.5 TYP 6.8 ±. PIN TOP MARK (SEE NOTE 6). REF. ±. ( SIDES).75 ± ±. ( SIDES).8 ±. ( SIDES).5 ±.5.5 BSC BOTTOM VIEW EXPOSED PAD NOTE:. DRAWING TO BE MADE A JEDEC PACKAGE OTLINE M- VARIATION OF (WEED-). CHECK THE LTC WEBSITE DATA SHEET FOR CRRENT STATS OF VARIATION ASSIGNMENT. DRAWING NOT TO SCALE. ALL DIMENSIONS ARE IN MILLIMETERS. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.5mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN LOCATION ON THE TOP AND BOTTOM OF PACKAGE 5 (DD) DFN

15 LT68 PACKAGE DESCRIPTIO MS Package -Lead Plastic MSOP (Reference LTC DWG # ).88 ±.7 (.5 ±.5) 5. (.6) MIN..5 (.6.6).5 ±.8 (. ±.5) TYP.5 (.7) BSC RECOMMENDED SOLDER PAD LAYOT. ±. (.8 ±.) (NOTE ) ±.76 (.6 ±.) REF GAGE PLANE.8 (.7).5 (.) DETAIL A DETAIL A NOTE:. DIMENSIONS IN MILLIMETER/(INCH). DRAWING NOT TO SCALE 6 TYP.5 ±.5 (. ±.6) SEATING PLANE. ±.5 (. ±.6). (.) MAX.7.7 (.7.) TYP 5.5 (.7) BSC. DIMENSION DOES NOT INCLDE MOLD FLASH, PROTRSIONS OR GATE BRRS. MOLD FLASH, PROTRSIONS OR GATE BRRS SHALL NOT EXCEED.5mm (.6") PER SIDE. DIMENSION DOES NOT INCLDE INTERLEAD FLASH OR PROTRSIONS. INTERLEAD FLASH OR PROTRSIONS SHALL NOT EXCEED.5mm (.6") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE.mm (.") MAX. ±. (.8 ±.) (NOTE ).86 (.) REF.7 ±.76 (.5 ±.) MSOP (MS) 6 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 5

16 LT68 TYPICAL APPLICATIONS Li-Ion Buck-Boost Mode Luxeon LED Driver Buck Mode Luxeon LED Driver.V TO 5V.5Ω L.µH 7 D D 5mA 6V.7Ω 7mA D L 7µH D C 8 SW ISN LT68 FB I ADJ GND V C 5 nf k k C C 8 7 ISN SW LT68 FB I ADJ GND V C 5 C: TAIYO YDEN JMKBJ75KG C: TAIYO YDEN EMK6BJ75ML D: ON SEMICONDCTOR MBRM D: LMILEDS DS5 L: NEC PLC-75R 68 TA C: TAIYO YDEN TMK5BJ75MN D: PHILIPS PMEG D: LMILEDS DS5 L: TOKO DC k.nf pf 68 TA RELATED PARTS PART NMBER DESCRIPTION COMMENTS LT6 55mA (I SW ),.MHz, High Efficiency Step-p DC/DC Converter :.V to V, V OT(MAX) = V, I Q = ma, I SD < µa, ThinSOT TM Package LT65/LT65- ma/8ma (I SW ), Constant Off-Time, High Efficiency Step-p :.V to 5V, V OT(MAX) = V, I Q = µa, I SD < µa, DC/DC Converter ThinSOT Package LT/LTA A (I SW ),.MHz/.MHz, High Efficiency Step-p :.6V to 6V, V OT(MAX) = V, I Q =.ma/5.5ma, DC/DC Converter I SD < µa, ThinSOT Package LT Constant Current,.MHz, High Efficiency White LED : V to V, V OT(MAX) = V, I Q =.ma, I SD < µa, Boost Regulator ThinSOT Package LT/LT- Dual Output 5mA/mA (I SW ), Constant Off-Time, :.V to 5V, V OT(MAX) = V, I Q = µa, I SD < µa, (Dual) High Efficiency Step-p DC/DC Converter MS Package LT5 (Dual) Dual Output, Pos/Neg, 5mA (I SW ), Constant Off-Time, :.V to 5V, V OT(MAX) = ±V, I Q = µa, I SD < µa, High Efficiency Step-p DC/DC Converter MS Package LT6.5A (I SW ),.5MHz, High Efficiency Step-p DC/DC Converter : V to 5V, V OT(MAX) = 5V, I Q =.ma, I SD < 6µA, MS8E Package LTC/LTC A/A (I SW ), MHz, Synchronous Step-p DC/DC Converter :.5V to 5V, V OT(MAX) = 6V, I Q = 8µA, I SD < µa, MS Package LT6/LT6A.A (I SW ),.MHz/MHz, High Efficiency Step-p DC/DC :.5V to 6V, V OT(MAX) = 8V, I Q =.8mA, I SD < µa, Converter with Integrated Schottky SC7 and ThinSOT Packages LT6/LT6A 5mA (I SW ), Boost/Inverter Dual, Micropower DC/DC Converter :.V to 5V, V OT(MAX) = ±V, I Q = µa, I SD < µa, with Integrated Schottky Diodes DFN Package LT6.8A (I SW ), High Efficiency Step-p DC/DC Converter with :.V to V, V OT(MAX) = V, I Q = 5µA, I SD < µa, Integrated Schottky, Output Disconnect ThinSOT Package LT65/LT65A Constant Current,.MHz/.7MHz, High Efficiency White LED :.7V to 6V, V OT(MAX) = V, I Q =.ma, I SD < µa, Boost Regulator with Integrated Schottky Diode ThinSOT Package LT67/LT67A.A (I SW ),.MHz/.MHz, High Efficiency Step-p DC/DC :.V to 6V, V OT(MAX) = V, I Q =.ma, I SD < µa, Converter with Integrated Soft-Start ThinSOT Package ThinSOT is a trademark of Linear Technology Corporation. 6 LT/TP 5 K REV A PRINTED IN SA Linear Technology Corporation 6 McCarthy Blvd., Milpitas, CA (8) - FAX: (8) -57 LINEAR TECHNOLOGY CORPORATION

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