CS 309 ADVANCED LOGIC DESIGN LAB 1. LOGIC FAMILIES, PROPAGATION DELAY

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1 CS 309 ADVANCED LOGIC DESIGN LAB 1. LOGIC FAMILIES, PROPAGATION DELAY Sarajevo, 2013

2 LAB 1. Logic Families, Propagation Delay OBJECTIVE: To get acquainted with integrated circuits (ICs) from different logic families, To get acquainted with coding of different standard ICs, To determine main characteristics of ICs that impact timing. To study the basic logic gate - INVERTER. APPARATUS: Power supply, Analog/Digital Training System and the breadboard, Dual trace oscilloscope, Function generator, IC Type 7400 Quadruple 2-input NAND gates IC Type 7404 Hex Inverters 1. DC Power Supply: Fixed DC Outputs: +5V & -5V Variable DC Outputs: +3V to +15V, -3V to -15V 2. Breadboard: The breadboard consists of two terminal strips and two bus strips (often broken in the centre). Each bus strip has two rows of contacts. Each of the two rows of contacts is node. That is, each contact along a row on a bus strip is connected together (inside the breadboard). Bus strips are used primarily for power supply connections, but are also used for any node requiring a large number of connections. You will build your circuits on the terminal strips by inserting the leads of circuit components into the contact receptacles and making connections with small wires. There are wire cutter/strippers and a spool of wire in the lab. It is a good practice to wire +5V and 0V power supply connections to separate bus strips. The 5V supply MUST NOT BE EXCEEDED since this may damage the ICs used during the experiments. Incorrect connection of power to the ICs can result in them exploding or becoming very hot. 3. Probe and oscilloscope The probe is connected to the oscilloscope to read and measure pulse duration and width. There are two channels on the oscilloscope use one to read input and other to read the output of the ICs. Always make sure to have the time scale that will make it possible to read with greatest accuracy. 4. Function generator Function generator provides the clock signal needed for most of the experiments. The function generator can produce square, sine, and triangle waves of variable frequency and amplitude. It can also produce a TTL-compatible square wave suitable for use with digital circuitry. Note that the TTL 2

3 output is not affected by the setting of the switch with the sine, triangular, and square wave symbols, nor by the amplitude sliding control (marked AMP"). These are used by the other features of the function generator. 5. Digital Integrated IC s Digital ICs are a collection of resistors, diodes and transistors fabricated on a single piece of semiconductor material usually silicon and referred to as chip. The chip is enclosed in a protective plastic or ceramic package with pins extended out for connecting the IC to other devices. The most common type of package is a dual-in-line package (DIP) as shown in Figure 1.1. The pins are numbered counterclockwise when viewed from the top of the package with respect to an identifying notch or dot at the end of the chip. The DIP below is a 14-pin package. 16, 20, 24, 28, 40 and 64 pin packages are also available. The fabricated resistors, diodes and transistors reside in the chip are called logic gates. Different chip may contain different amount of these logic gates. Digital ICs are often categorized according to their circuit complexity as measured by the number of equivalent logic gates in an IC. There are currently five standard levels of complexity as in Table 1.1. Fig. 1.1: (a) Dual-In-Line Package (b) Top view showing Pin numbers Complexity Approx. gates per chip Typical products Small scale integration (SSI) Medium scale integration (MSI) Large scale integration (LSI) Very large scale integration (VLSI) Ultra large scale integration (ULSI) Less than to to , 000 to 99, , 000 to more Table.1.1: Standard levels of complexity Logic gates, flip flops Adders, Counters, Multiplexers ROM, RAM, 8 bit Microprocessors 16 and 32 bit Microprocessors 64 bit microprocessors, special processors 3

4 BUILDING THE CIRCUIT ON BREADBOARD: Throughout these experiments, we will use TTL and CMOS chips to build circuits. The steps for wiring a circuit should be completed in the order described below: Make sure the power is off before you build anything! Connect the +5V and ground (GND) leads of the power supply to the power and ground bus strips on your breadboard. Before connecting up, use a voltmeter to check that the voltage does not exceed 5V. Plug the chips you will be using into the breadboard. Point all the chips in the same direction with pin 1 at the upper-left corner. Connect +5V and GND pins of each chip to the power and ground bus strips on the breadboard. Select a connection on your schematic and place a piece of hook-up wire between corresponding pins of the chips on your breadboard. It is better to make the short connections before the longer ones. Mark each connection on your schematic as you go, so as not to try to make the same connection again at a later stage. Consult your instructor to check the connections, before you turn the power on. If an error is made and is not spotted before you turn the power on. Turn the power off immediately before you begin to rewire the circuit. At the end of the laboratory session, collect you hook-up wires, chips and all equipment and return them to the demonstrator. Tidy the area that you were working in and leave it in the same condition as it was before you started. COMMON CAUSES OF PROBLEMS: Not connecting the ground and/or power pins for all chips. Not turning on the power supply before checking the operation of the circuit. Leaving out wires. Plugging wires into the wrong holes. Driving a single gate input with the outputs of two or more gates. Modifying the circuit with the power on. In all experiments, you will be expected to obtain all instruments, leads, components at the start of the experiment and return them to their proper place after you have finished the experiment. An occasional problem in the lab is just having a bad chip. Make sure you have gone through all the above possibilities though, before trying a new chip. And if you know you have a bad chip, please give it to the TA for destruction. 4

5 EXAMPLE IMPLEMENTATION OF A LOGIC CIRCUIT Build a circuit to implement the Boolean function F = A B using TTL IC 74LS00 (AND gate) and TTL IC 7404 (INVERTER) as per discussed in Figure 1.2. Quad 2 Input 7400 Hex 7404 Inverter Fig. 1.2: The complete designed and connected circuit Sometimes the chip manufacturer may denote the first pin by a small indented circle above the first pin of the chip. Place your chips in the same direction, to save confusion at a later stage. Remember that you must connect power to the chips to get them to work. 5

6 Instructions 1. Measure the propagation delay and transition times for the 74LS04 inverter gate! NOTE: See Figure 1.2 for SSI pinouts. The power pins of typical TTL and CMOS SSI/MSI devices in n-pin DIP packages are pin n for VCC and pin n/2 for GROUND, i.e., the upper-right and lower left corners for VCC and GROUND, respectively.) a. The 74LS04 is an SSI (Small Scale Integration) IC containing six separate inverter gates. Wire up five of the six inverters into a chain where the output of one inverter drives the input of another inverter: Fig.1.3: Inverter chain for delay measurements b. Set the function generator to produce a 0-5V 200kHz square wave. Display the output of the function generator on the oscilloscope and verify that the function generator has been set to the correct voltage and frequency using measurement capabilities of the oscilloscope. c. Before connecting the function generator output to the 74LS04, make sure you have properly applied +5V and ground to the chip. Once you have verified that the function generator is producing the correct signal, use the function generator output as the input to the first inverter on the 74LS04 IC. d. Now use the scope to display the input of the first inverter on channel 1 and the corresponding Output on channel 2. Set the Volts/Div for both channels to provide best display results. e. Measure tp,lh for the first inverter (the propagation delay from when the input goes low to when the output goes high). You will need to use the Time/Div and Delay knobs to zoom in on the transition region of the waveform in order to be able to make an accurate measurement. f. Now measure tp,lh for the first three inverters by displaying both the input to the first inverter and the output of the third inverter on the oscilloscope. Measure the time from when the input goes low to when the output (of the 3rd inverter) goes high. Then do the same for the first 5 inverters. g. Plot the three values of tp,lh versus the number of inverters (1, 3 and 5) and comment on the results. h. Now we are going to measure the transition times of the 74LS04 inverter, so display the output of the first inverter on the oscilloscope. The rise time, tr, is the time associated with the transition of the output from low to high, and the fall time, tf, is the time associated with the transition of the output from high to low. 6

7 i. Zoom in on the region of the output signal where the voltage is rising from low to high, and then measure tr. Measure between the 30% point of the transition and the 70% point of the transition. j. Now zoom in on the region of the output signal where the voltage is falling from high to low and measure the fall time, tf. k. Typical values for the transition times are 9 ns for the fall time and 21 ns for the rise time. How do your measurements compare to these typical values? l. Recall that a ring oscillator is constructed from an odd number loop of inverters. Make a loop of 5, 7 and 9 inverters. Determine the propagation delay and describe and compare the output of the ring oscillator as you change the number of stages. Show one of the outputs on the oscilloscope to your TA. 2. Display the effects of switch bouncing. This exercise demonstrates a possible use of the single-sweep trigger capability of the scope to capture and store a non-periodic, one-time event. For this to succeed, you will need to use the digital oscilloscope not the analog ones that we usually used in introductory courses. a. Set the triggering parameters of the scope to: i. Make sure that channel 1 is your trigger source. ii. Set the scope to trigger on a positive slope. iii. Set the trigger coupling to DC. iv. Set the trigger level to around 2 V using the trigger Level knob. v. Set the Volts/Div for channel 1 to 2V per division. vi. Set the Time/Div to 500 s per division. b. Connect channel 1 of the scope to one of the logic switches of the digital design board. Set the switch in the 0" or down position. c. Press the Single key on the scope. Notice that the scope will not trigger because it has not received a trigger event yet. d. Move the switch to the 1" or up position. As soon as the input into channel 1 crosses the trigger level, the scope will trigger only once. The waveform that is displayed on the scope is a snapshot" of what the switch outputs when you move it from the 0" to 1" position. e. Notice that the transition from a digital high to low is by no means a smooth one. In fact you should see multiple transitions from high to low and vice versa before the switch output finally settles at +5V. This is known as switch bounce and can potentially be quite troublesome for certain digital circuitry, since what should be intended as one transition can be interpreted as many transitions instead. A variety of different schemes and sub-circuits exist to eliminate switch bounce, some of which may be employed in the later labs for this course. 7

8 f. Try this experiment several times (you might want to change the Time/Div setting in order to better view the switch bounce). Measure the bounce interval (the time it takes for the switch to finally settle down to a stable value) for several tests. Is this interval fairly constant over several tests? g. Now build a hardware debouncing circuit as shown below and repeat measurement to see whether the output is more stable during transition of the switch. Figure 1.4: R-S flip flop circuit hardware debouncing a switch. In microprocessor circuits, software debouncing is carried out by programming a time delay before the switch value is read 3. Illustrate a static hazard. Construct an XOR gate circuit based on the schematic from Figure 1.4 using three TTL parts: 7404 (Quad INV), 7408 (Quad AND), and 7432 (Quad OR). Use the +5V and GND connections on the bread board as power and ground for the logic gates. Create a 10kHz, 0 to 5V square wave with the function generator to use as the input of the circuit. To see a hazard, the input should switch in such a way that the output theoretically remains the same. The clock, therefore, must feed both circuit inputs. Set the oscilloscope to trigger on the positive edge of the output. You might need to adjust the timescale. This will show the effect of a static-0 hazard. Fig. 1.4: XOR gate constructed from AND, OR and NOT gates 8

9 PROBLEMS PROBLEM 1. Explain why is it easier to measure the propagation delay of inverters using a ring oscillator than to measure on one inverter alone? What is a possible problem and limitation with measurement on ring oscillator? PROBLEM 2. Using CMOS logic, consider the synthesis of a complex CMOS gate whose function is F = (D + A (B +C)). Assistant: Professor: 9

10 CS 309 ADVANCED LOGIC DESIGN LAB 1. REPORT LOGIC FAMILIES, PROPAGATION DELAY Assistant: Professor: Student name: Student ID: Due Date: Sarajevo,