FEATURES APPLICATIO S TYPICAL APPLICATIO. LTC Low Noise, High Frequency, 8th Order Butterworth Lowpass Filter DESCRIPTIO

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1 LTC- Low Noise, High Frequency, th Order Butterworth Lowpass Filter FEATRES th Order Filter in a -Pin Package khz Maximum Corner Frequency No External Components : and : Clock to Cutoff Frequency Ratio µv RMS Total Wideband Noise.% THD or Better Operates from ±.V to ±V Power Supplies APPLICATIO S Antialiasing Filters Smoothing Filters Tracking High Frequency Lowpass Filters DESCRIPTIO The LTC - is a monolithic th order lowpass Butterworth filter, which provides a maximally flat passband. The attenuation slope is db/octave and the maximum attenuation is in excess of db. An external TTL or CMOS clock programs the filter s cutoff frequency. The clock to cutoff frequency ratio is : (Pin at V ) or : (Pin at ). The maximum cutoff frequency is khz. No external components are needed. The LTC- features low wideband noise and low harmonic distortion even for input voltages up to V RMS. In fact the LTC- overall performance competes with equivalent multiple op amp RC active realizations. The LTC- is available in a -pin DIP or -pin surface mounted SW package. The LTC- is fabricated using LTC s enhanced analog CMOS Si-gate process. The LTC- is pin compatible with the LTC-., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIO th Order Clock Sweepable Lowpass Butterworth Filter OT C LTC- V IN V R IN A V f CLK / V OT V CLOCK = MHz TAa NOTE: THE POWER SPPLIES SHOLD BE BYPASSED BY A.µF CAPACITOR CLOSE TO THE PACKAGE. THE PINS,,, AND SHOLD BE PREFERABLY GRONDED. VOT/VIN (db) Measured Frequency Response V S = ±.V FREQEY (khz) - TAb fa

2 LTC- ABSOLTE AXI RATI GS W W W Total Supply Voltage ( to V )....V Power Dissipation... mw Storage Temperature Range... C to C Lead Temperature (Soldering, sec)... C (Note ) Operating Temperature Range LTC-M (OBSOLETE)... C to C LTC-C... C to C PACKAGE/ORDER I FOR W ATIO V IN R IN A TOP VIEW OT C V f CLK / V OT ORDER PART NMBER LTC-CN V IN TOP VIEW OT C V f CLK / ORDER PART NMBER LTC-CSW N PACKAGE -LEAD PDIP T JMAX = C, θ JA = C/W J PACKAGE -LEAD CERDIP OBSOLETE PACKAGE Consider the N Package for Alternate Source LTC-MJ LTC-CJ R IN A SW PACKAGE -LEAD PLASTIC (WIDE) SO T JMAX = C, θ JA = C/W V OT Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V S = ±.V, :, f CLK = MHz, R = k, TTL clock input level unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX NITS Passband Gain (Note ) Referenced to db, Hz to khz.. db Gain TempCo. db/ C db Frequency : khz : khz Gain at db Frequency Referenced to db, f IN = khz. db Stopband Attenuation At.f db, :, f IN = khz db Stopband Attenuation At f db, :, f IN = khz db Stopband Attenuation At f db, :, f IN = khz db Stopband Attenuation At f db, :, f IN = khz db Input Frequency Range : <f CLK / khz : <f CLK khz Output Voltage Swing and V S = ±.V ±. V Operating Input Voltage Range V S = ±V ±. V V S = ±.V ±. V Total Harmonic Distortion V S = ±V, Input = V RMS at khz. % V S = ±.V, Input = V RMS at khz. % Wideband Noise V S = ±V, Input = GND Hz.MHz µv RMS V S = ±.V, Input = GND Hz.MHz µv RMS fa

3 LTC- ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T A = C. V S = ±.V, :, f CLK = MHz, R = k, TTL clock input level unless otherwise specified. PARAMETER CONDITIONS MIN TYP MAX NITS Output DC Offset (Note ) V S = ±.V ± ± mv Output DC Offset TempCo V S = ±V ± µv/ C Input Impedance kω Output Impedance f OT = khz Ω Output Short-Circuit Current Source/Sink / ma Clock Feedthrough µv RMS Maximum Clock Frequency % Duty Cycle, V S = ±V MHz % Duty Cycle, T A = C, V S = ±.V MHz Power Supply Current V S = ±.V, f CLK = MHz ma V S = ±V, f CLK = MHz ma ma V S = ±.V, f CLK = MHz ma ma Power Supply Voltage Range ±. ± V Note : Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : For tighter specifications please contact LTC Marketing. TYPICAL PERFOR A CE CHARACTERISTICS V OT /V IN (db) k W Amplitude Response Phase Response Group Delay vs Frequency f CLK = MHz f db = khz f CLK = MHz f db = khz V S = ±.V; : T A = C k f IN (Hz) f CLK = MHz f db = khz G M PHASE (DEG) V S = ±.V T A = C f CLK = MHz : f db = khz f IN (khz) G GROP DELAY (µs) V S = ±.V T A = C f CLK = MHz : f db = khz f IN (khz) G fa

4 LTC- TYPICAL PERFOR A CE CHARACTERISTICS PHASE (DEG) W Phase vs f db Frequency Phase Matching Noise Spectral Density V S = ±.V : f CLK = khz f db = khz f CLK = MHz f db = khz k FREQEY (Hz) f CLK = MHz f db = khz k PHASE MATCH (±DEG) V S = ±.V, f CLK = MHz, f db = khz, : NIT SAMPLE (TA = C TO C) FREQEY (khz) OTPT NOISE (nv/ Hz) () () ().k f CLK = khz :, f db = khz f CLK = MHz :, f db = khz f CLK = MHz :, f db = khz k k k FREQEY (Hz) G - G - G. Harmonic Distortion vs Frequency f CLK = MHz, f db = khz, : Harmonic Distortion vs Amplitude HARMONIC DISTORTION (%). ±V, V RMS INPT ±.V, V RMS INPT HARMONIC DISTORTION (%).. ±.V ±V ±V. k FREQEY (Hz) k k. f CLK = MHz, f db = khz :, khz INPT.. AMPLITDE (V RMS ). - G - G POWER SPPLY CRRENT (ma) Power Suppy vs Current TA = C TA = C TA = C POWER SPPLY VOLTAGE (V) G V OT /V IN (db) Amplitude Response with Pin at Ground PIN AT GROND f CLK =MHz f IN (khz) - G fa

5 TYPICAL PERFOR A CE CHARACTERISTICS W Table. Gain/Delay, f db = khz, LTC- Typical Response V S = ±V, T A = C, f CLK = khz, Ratio = Pin at (fltr :) Table. Gain/Delay, f db = khz, LTC- Typical Response V S = ±V, T A = C, f CLK = khz, Ratio = Pin at V (fltr :) LTC- FREQEY (khz) GAIN (db) DELAY (ms) FREQEY (khz) GAIN (db) DELAY (ms) Table. Gain, f db = khz, LTC- Typical Response V S = ±V, T A = C, f CLK = khz, Ratio = Pin at (fltr :) FREQEY (khz) GAIN (db) Table. Gain, f db = khz, LTC- Typical Response V S = ±V, T A = C, f CLK = khz, Ratio = Pin at V (fltr :) FREQEY (khz) GAIN (db) fa

6 LTC- TYPICAL PERFOR A CE CHARACTERISTICS W Table. Gain, f db = khz, LTC- Typical Response V S = ±.V, T A = C, f CLK = MHz, Ratio = Pin at (fltr :) Table. Gain, f db = khz, LTC- Typical Response V S = ±.V, T A = C, f CLK = MHz, Ratio = Pin at (fltr :) FREQEY (khz) GAIN (db) Table. Gain Non-Butterworth Response (Pin to GND), LTC- Typical Response V S = ±V, T A = C, f CLK = khz FREQEY (khz) GAIN (db) FREQEY (khz) GAIN (db) fa

7 LTC- PI F CTIO S (Pin Numbers Refer to the -Pin Package) (Pins,, and ): The no connection pins should be preferably grounded. These pins are not internally connected. V IN, V OT (Pins, ): The input Pin is connected to an k resistor tied to the inverting input of an op amp. Pin is protected against static discharge. The device s output, Pin, is the output of an op amp which can typically source/sink ma/ma. Although the internal op amps are unity gain stable, driving long coax cables is not recommended. When testing the device for noise and distortion, the output, Pin, should be buffered. (Figure ) The op amp power supply wire (or trace) should be connected directly to the power source. To eliminate switching transients from filter output, buffer filter output with a third order lowpass (Figure ). (Pins, ): For dual supply operation these pins should be connected to a ground plane. For single supply operation both pins should be tied to one half supply, (Figure )., V (Pins, ): Should be bypassed with a.µf capacitor to an adequate. Low noise, nonswitching power supplies are recommended. To avoid latchup when the power supplies exhibit high turn-on transients, a N Schottky diode should be added from the and V pins to ground (Figures, and ). R IN A, OT C (Pins, ): A very short connection between Pin and Pin is recommended. This connection should be preferably done under the IC package. In a breadboard use a one inch, or less, shielded coaxial cable: the shield should be grounded. In a PC board, use a one inch trace or less; surround the trace by a ground plane. / (Pin ): The DC level at this pin determines the ratio of clock frequency to the db frequency of the filter. The ratio is : when Pin is at and : when Pin is at V. This pin should be bypassed with a.µf capacitor to analog ground when it s connected to V or (Figure ). See Tables through for typical gain and delay responses for the two ratios. f CLK (Pin ): For ±V supplies the logic threshold level is.v. For ±V and V to V supplies the logic threshold levels are.v and V respectively. The logic threshold levels vary ±mv over the full military temperature range. The recommended duty cycle of the input clock is % although for clock frequencies below khz the clock on time can be as low as ns. The maximum clock frequency for ±V supplies is MHz. For ±V supplies and above, the maximum clock frequency is MHz. Do not allow the clock levels to exceed the power supplies. For single supply operation V use level shifting at Pin with T L levels (Figure ). fa

8 LTC- TYPICAL APPLICATIO S OT C POWER SORCE V OT C V IN LTC- V f CLK.µF / V OT R IN A RECOMMENDED OP AMPS: LT, LT, LT.µF k.µf /V k.µf LT + Ω.µF V OT - F N.µF V IN LTC- V f CLK / V OT R IN A N Figure. sing Schottky Diodes to Protect the IC from Transient Supply Reversal. V.µF - F Figure. Buffering the Filter Output. The Buffer Op Amp Should Not Share the LTC- Power Lines. OT C V IN LTC- V = V f CLK.µF k / V TO V.µF k / R IN A V OT - F Figure. Single Supply Operation. If Fast Power p or Down Transients are Expected, se a N Schottky Diode Between Pin and Pin. For = V, Derive the Mid-Supply Voltage with a.k Resistor and an LT.V Reference. fa

9 LTC- TYPICAL APPLICATIO S OT C k V IN LTC- V f CLK / V OT RATIO.k k µf T L LEVEL.µF k R IN A - F Figure. Level Shifting the Input T L Clock for Single Supply Operation V..µF OT C V IN LTC- V R IN A f CLK / V OT /GND/V V k.µf k pf + k pf V LT Ω.µF V OT V - F Figure. Adding an Output Buffer-Filter to Eliminate Any Clock Feedthrough. Passband ±.db to khz, db at khz. fa

10 LTC- PACKAGE DESCRIPTIO J Package -Lead CERDIP (Narrow., Hermetic) (LTC DWG # --). (.) MIN. (.) MAX. (.) RAD TYP.. (..). BSC (. BSC). (.) MAX.. (..).. (..).. (..) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS.. (..) OBSOLETE PACKAGE. (.) BSC. (.) MIN J fa

11 LTC- PACKAGE DESCRIPTIO N Package -Lead PDIP (Narrow.) (LTC DWG # --).* (.) MAX. ±.* (. ±.).. (..). ±. (. ±.).. (..).. (..) ( ). (.) MIN. (.) MIN. (.) MIN NOTE: IHES. DIMENSIONS ARE MILLIMETERS *THESE DIMENSIONS DO NOT ILDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED. IH (.mm). (.) BSC. (.) TYP. ±. (. ±.) N Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. fa

12 LTC- PACKAGE DESCRIPTIO SW Package -Lead Plastic Small Outline (Wide. Inch) (Reference LTC DWG # --). ±. TYP N. BSC. ±... (..) NOTE N. MIN. ±. NOTE.. (..) N/ N/ RECOMMENDED SOLDER PAD LAYOT. (.) RAD MIN.. (..) NOTE.. (..) TYP.. (..).. (..)... (.) (..) NOTE BSC.... (..) (..) TYP NOTE: IHES. DIMENSIONS IN (MILLIMETERS). DRAWING NOT TO SCALE. PIN IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANFACTRING OPTIONS. THE PART MAY BE SPPLIED WITH OR WITHOT ANY OF THE OPTIONS. THESE DIMENSIONS DO NOT ILDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED." (.mm).. (..) S (WIDE) LW/TP K REV A PRINTED IN SA Linear Technology Corporation McCarthy Blvd., Milpitas, CA - () - FAX: () - LINEAR TECHNOLOGY CORPORATION fa

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