Filtering Techniques: Isolating Analog and Digital Power Supplies in TI s PLL-Based CDC Devices

Transcription

1 Application Report SCAA048 October 200 Filtering Techniques: Isolating Analog and Digital Power Supplies in TI s PLL-Based CDC Devices Kal Mustaa High-Perormance Analog/CDC ABSTRACT This application note recommends power supply and ground noise-reduction techniques through the use o bypass capacitors and errite beads in TI s PLL-based clock distribution circuits (CDC) devices. This application note also includes a numeric example, calculating the value o bypass and ilter capacitors or a particular requency o interest. Contents Bypass and Filter Capacitors...2 General Guidelines or Calculating the Value o a Bypass Capacitor [6]...2 Example...3 Decoupling...4 Ferrite Beads...5 Filtering and Noise Reduction Circuits...5 Reerences...6 Figures Figure. Filter Circuit...5 Figure 2. Filter Circuit Tables Table. Capacitance to Filter Corresponding Noise Frequency...4

2 Bypass and Filter Capacitors Practically all circuits use dc (direct current) supplies or their inputs. However, dc voltage may luctuate producing ac ripple voltage and noise components. I the ripple voltage is too high, it renders the circuit nonunctional. The main unction o bypass capacitors is to dampen this ac ripple component or noise in such dc circuits. The irst unction o a bypass capacitor connected between VDD and GND is to allow the ac ripple component o VDD to pass through to ground. The second unction is to help compensate or voltage droop caused by large I CC transients when multiple outputs switch simultaneously. The exact value o a bypass capacitor is not as important as the requency at which this ripple occurs. Use a minimum o three bypass capacitors, each targeting a slightly dierent requency. As an example, use a large capacitor between 4.7 µf to 47 µf to target large voltage droops at relatively low requency. Choose a smaller value (about 0. µf) or middle requency range, and an even smaller value bypass capacitor (around 0.0 µf) to handle higher requencies. It is more eective to use an array o three or more bypass capacitors with dierent capacitance values when iltering a wider noise bandwidth. The requency response o any capacitor is determined by its parasitics, that is, its equivalent series resistance (ESR) and equivalent series inductance (ESL). These two parameters are most important when choosing a bypass capacitor. Use high-quality, suracemount capacitors. Monolithic or ceramic type capacitors eature both low ESR, ESL, and consequently achieve excellent perormance. The distinction between a ilter and a bypass capacitor depends on where it is being used. When used to eliminate low-requency power-supply noise, it is reerred to as a ilter capacitor. An example is a 22-µF capacitor connected between VDD and GND. On the other hand, bypass capacitors are used at high requency to provide a very low-impedance path or current surges between VDD and GND, as well as to guard power systems against induced luctuations. General Guidelines or Calculating the Value o a Bypass Capacitor [6]. First, assuming all gates are switching simultaneously in a system, ind the imum expected step change in power supply current I. 2. Estimate the imum amount o noise that a given system can tolerate rom the system s noise budget. 3. Dividing the noise voltage by the current change gives the imum common path V impedances, n. I 4. Next, compute the inductance ( L ) o power supply wiring. Use this and to ind the requency, ( corner) 3dB (2πL ) below which the power supply wiring is ine (power supply noise< V n ). 5. Finally, calculate the capacitance (C bypass ) o the bypass capacitor: Cbypass 2π NOTE: I the operating requency is capacitor. On the other hand, i it is Please reer to the example below. < ( oper ), then it is not necessary to use a bypass ( oper ), then it is necessary to use a bypass capacitor. 2 Filtering Techniques: Isolating Analog and Digital Power Supplies in TI s PLL-Based CDC Devices

3 Example Let us assume that: () we have a board o 50 gates (output buers) each switching a 5-pF load in 2.4 ns, (2) a power supply wiring inductance o L 0 nh, (3) a power supply o V CC 3.3 V, and (4) a 20-mV noise margin ( V n 20mV ). Then current is: 2 Vcc (50) (5 0 ) (3.3) I n C A 9 t The imum impedance, Vn 20mV 0. Ω I Then, the requency ( L π 2 π 0 0 ) above which the power supply wiring needs a bypass capacitor, Ω KHz Finally, the value o the bypass capacitor is calculated according to: C 2 π bypass 2π µ (min) 3 This capacitance value is not common, so we can use 8 µf or0µf. This calculation shows that the 8 µf is eective at a requency above khz. Assuming that our bypass capacitor has an ESL o nh, we can calculate the upper requency range at which this capacitor will work as intended bypass MHz 9 2 π ESL (2 π 0 ) Thereore, this 8-µF bypass capacitor is eective rom 68 khz to 8.5 MHz. It is common practice to use an array o small parallel capacitors; this combination provides lower series inductance at high requency than a single bigger capacitor. The most common values bypass capacitors are: 47 µf, 22 µf, 4.7 µf, 0. µf, and 0.00 µf. The higher value capacitors (47 µf and 4.7 µf) work well at relatively low requency (lowrequency bypass). The 0. µf targets the middle requency range, while the 0.00 µf or smaller capacitors handle higher requencies (high requency bypass). Choosing two or three capacitors with dierent capacitance ranges will eectively ilter a wider noise bandwidth. Real capacitors are not ideal; they are exempliied by additional parasitics (non-ideal) in the orm o inductive and resistive elements. The most important elements are ESL and ESR; they act as an inductor and resistor in series with a capacitor, respectively. They act to deeat the eectiveness o a bypass capacitor. F Filtering Techniques: Isolating Analog and Digital Power Supplies in TI s PLL-Based CDC Devices 3

4 The complete impedance equation o a capacitor as a unction o requency, including ESR, is: X ( ) (2πL 2πC ) ;Where L lead induc tan ce, H ESR and C capacitance, F ESR is usually included in a manuacturer s data sheet. It can be measured using ESR meters that can measure low resistance (below Ω). However, methods o measuring ESR without ESR meters are available at [4]: Table lists some suggested capacitor values targeting various requency bypasses using the ollowing equation: 2 π C bypass (min) Table. Capacitance to Filter Corresponding Noise Frequency C bypass (min) Frequency ƒ Frequency ƒ 0.2Ω khz 6.93 khz khz 36 khz 0 59 khz 79.6 khz khz 69.5 khz MHz.6 MHz MHz 3.6 MHz 0. 6MHz 8MHz MHz 6 MHz MHz 40 MHz MHz 50 MHz MHz 80 MHz MHz 00 MHz MHz 59 MHz MHz 99 MHz GHz 796 MHz Decoupling All decoupling capacitors should be placed as close as possible to each power supply pin. Typically, 0.-µF capacitors should be connected between each VDD pin and ground. Use a size 0603, high quality, low-inductance, low-esr, surace-mount capacitors. Furthermore, capacitors should be o either a ceramic or monolithic type or optimal perormance. The value o decoupling capacitor is strongly dependent on the requency o the clock driver. It is also dependent on noise generated at higher requency harmonics. The rule o thumb is the higher the requency, the lower the capacitance. 4 Filtering Techniques: Isolating Analog and Digital Power Supplies in TI s PLL-Based CDC Devices

5 Ferrite Beads Clock drivers typically produce switching noise. There is a need to isolate this noise component and prevent it rom spreading into the PCB board. Inserting a errite bead between the clock driver s power supply and the main PCB power plane is an excellent method to eectively eliminate this problem. The errite bead does not enhance nor degrade the perormance o the driver; it is only used to provide noise isolation. Ferrite beads are composed o a erromagnetic material and are not susceptible to external radiated magnetic ields. They cannot be easily de-tuned. Only when the temperature rises above the Curie point will the errite lose its magnetic properties, rendering it useless. The Curie point is material dependent, ranging rom 20 C to 500 C. When selecting a errite, always know the requency o the unwanted noise. In addition, the impedance o the errite is a unction o requency, size, material, and number o turns. The dc impedance o the errite should be close to zero. While at the clock requency, the impedance should be greater than 50 Ω under loaded conditions. This relatively large impedance is necessary to prevent noise cased by clock harmonics rom spreading to the PCB board. In addition, errite beads should be capable o providing the rated dc current to the VCC plane. Filtering and Noise Reduction Circuits Figures and 2 below depict two recommended ilter circuits or TI s CDC clock drivers. These circuits can be used with any PLL-based clock generator in which the PLL has both digital (VDD) and analog (AVDD) power supplies. Figure is recommended where there is no board space constraint, while Figure 2 is the choice where there is limited board space. 5-5 Board VCC For Each VDD Pin Ohm To Analog VDD Ferrite Bead 0.00uF 0. uf 22 uf 0.0 uf 0. uf Ground Plane Analog GND Figure. Filter Circuit Filtering Techniques: Isolating Analog and Digital Power Supplies in TI s PLL-Based CDC Devices 5

6 5-5 Board VCC For Each VDD Pin Ohm To Analog VDD Ferrite Bead 0. uf 22 uf 0.0 uf 0. uf Ground Plane Analog GND Figure 2. Filter Circuit 2 Reerences. Design and Layout Guidelines or the CDCVF2505 Clock Driver, Texas Instruments application note, 2000 (SCAA045) 2. Application and Design Considerations or the CDC5XX Platorm o Phase-Lock Loop Clock Drivers, Texas Instruments CDC Data Book, 999, 996 (SCA028) 3. Fair-Rite Corp, Fair-Rite Sot Ferrites / Ferrite Products or The Electronic Industry. Product Catalog 4 th Edition 4. Samuel M. Goldwasser, Capacitor Testing, Sae Discharging and Other Related Inormation The Bypass Capacitor In High-Speed Environments Application Report, Texas Instruments, 996 (SCB007A) 6. Johnson, H.W., and Gram, M. High-Speed Digital Design. Prentice Hall, Filtering Techniques: Isolating Analog and Digital Power Supplies in TI s PLL-Based CDC Devices

7 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modiications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant inormation beore placing orders and should veriy that such inormation is current and complete. All products are sold subject to TI s terms and conditions o sale supplied at the time o order acknowledgment. TI warrants perormance o its hardware products to the speciications applicable at the time o sale in accordance with TI s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing o all parameters o each product is not necessarily perormed. TI assumes no liability or applications assistance or customer product design. Customers are responsible or their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating saeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Inormation published by TI regarding third party products or services does not constitute a license rom TI to use such products or services or a warranty or endorsement thereo. Use o such inormation may require a license rom a third party under the patents or other intellectual property o the third party, or a license rom TI under the patents or other intellectual property o TI. Reproduction o inormation in TI data books or data sheets is permissible only i reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction o this inormation with alteration is an unair and deceptive business practice. TI is not responsible or liable or such altered documentation. Resale o TI products or services with statements dierent rom or beyond the parameters stated by TI or that product or service voids all express and any implied warranties or the associated TI product or service and is an unair and deceptive business practice. TI is not responsible or liable or any such statements. Mailing Address: Texas Instruments Post Oice Box Dallas, Texas Copyright 200, Texas Instruments Incorporated