STP9NK60Z - STP9NK60ZFP STB9NK60Z - STB9NK60Z-1 N-CHANNEL 600V Ω - 7A TO-220/FP/D 2 PAK/I 2 PAK Zener-Protected SuperMESH Power MOSFET

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1 STP9NK60Z - STP9NK60ZFP STB9NK60Z - STB9NK60Z-1 N-CHANNEL 600V Ω - 7A TO-220/FP/D 2 PAK/I 2 PAK Zener-Protected SuperMESH Power MOSFET TYPE V DSS R DS(on) I D Pw STP9NK60Z STP9NK60ZFP STB9NK60Z STB9NK60Z V 600 V 600 V 600 V < 0.95 Ω < 0.95 Ω < 0.95 Ω < 0.95 Ω 7 A 7 A 7 A 7 A TYPICAL R DS (on) = 0.85 Ω EXTREMELY HIGH dv/dt CAPABILITY IMPROVED ESD CAPABILITY 100% AVALANCHE RATED GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING REPEATIBILITY 125 W 30 W 125 W 125 W TO-220 I 2 PAK TO-220FP D 2 PAK DESCRIPTION The SuperMESH series is obtained through an extreme optimization of ST s well established stripbased PowerMESH layout. In addition to pushing on-resistance significantly down, special care is taken to eure a very good dv/dt capability for the most demanding applicatio. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh products. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING IDEAL FOR OFF-LINE POWER SUPPLIES, ADAPTORS AND PFC ORDERING INFORMATION SALES TYPE MARKING PACKAGE PACKAGING STP9NK60Z P9NK60Z TO-220 TUBE STP9NK60ZFP P9NK60ZFP TO-220FP TUBE STB9NK60Z B9NK60Z D 2 PAK TUBE STB9NK60ZT4 B9NK60Z D 2 PAK TAPE & REEL STB9NK60Z-1 B9NK60Z-1 I 2 PAK TUBE June /13

2 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit (l) Pulse width limited by safe operating area (1) I SD 7A, di/dt 200 µa, V DD V (BR)DSS, T j T JMAX. (*) Limited only by maximum temperature allowed THERMAL DATA AVALANCHE CHARACTERISTICS GATE-SOURCE ZENER DIODE TO-220 / D 2 PAK / I 2 PAK TO-220FP V DS Drain-source Voltage (V GS = 0) 600 V V DGR Drain-gate Voltage (R GS = 20 kω) 600 V V GS Gate- source Voltage ± 30 V I D Drain Current (continuous) at T C = 25 C 7 7 (*) A I D Drain Current (continuous) at T C = 100 C (*) A I DM (l) Drain Current (pulsed) (*) A P TOT Total Dissipation at T C = 25 C W Derating Factor W/ C V ESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ) 4000 V dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ V ISO Iulation Withstand Voltage (DC) V T j T stg Operating Junction Temperature Storage Temperature TO-220 I 2 PAK -55 to to 150 D 2 PAK TO- 220FP Rthj-case Thermal Resistance Junction-case Max C/W Rthj-pcb Thermal Resistance Junction-pcb Max (When mounted on minimum Footprint) 30 C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 C/W T l Maximum Lead Temperature For Soldering Purpose 300 C Symbol Parameter Max Value Unit I AR Avalanche Current, Repetitive or Not-Repetitive 7 A (pulse width limited by T j max) E AS Single Pulse Avalanche Energy (starting T j = 25 C, I D = I AR, V DD = 50 V) 235 mj Symbol Parameter Test Conditio Min. Typ. Max. Unit BV GSO Gate-Source Breakdown Igs=± 1mA (Open Drain) 30 V Voltage C C PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device s ESD capability, but also to make them safely absorb possible voltage traients that may occasionally be applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and costeffective intervention to protect the device s integrity. These integrated Zener diodes thus avoid the usage of external components. 2/13

3 ELECTRICAL CHARACTERISTICS (TCASE =25 C UNLESS OTHERWISE SPECIFIED) ON/OFF Symbol Parameter Test Conditio Min. Typ. Max. Unit V (BR)DSS Drain-source I D = 1 ma, V GS = V Breakdown Voltage I DSS I GSS DYNAMIC SWITCHING ON SWITCHING OFF Zero Gate Voltage Drain Current (V GS = 0) Gate-body Leakage Current (V DS = 0) V DS = Max Rating V DS = Max Rating, T C = 125 C 1 50 V GS = ± 20V ±10 µa V GS(th) Gate Threshold Voltage V DS = V GS, I D = 100µA V R DS(on) Static Drain-source On V GS = 10V, I D = 3.5 A Ω Resistance Symbol Parameter Test Conditio Min. Typ. Max. Unit g fs (1) Forward Traconductance V DS = 15 V, I D = 3.5 A 5.3 S C iss C oss C rss C oss eq. (3) Input Capacitance Output Capacitance Reverse Trafer Capacitance Equivalent Output Capacitance V DS = 25V, f = 1 MHz, V GS = V GS = 0V, V DS = 0V to 480 V 72 pf Symbol Parameter Test Conditio Min. Typ. Max. Unit t d(on) t r Turn-on Delay Time Rise Time V DD = 300 V, I D = 3.5 A R G = 4.7Ω V GS = 10 V (Resistive Load see, Figure 3) Q g Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 480 V, I D = 7 A, V GS = 10V µa µa pf pf pf 53 nc nc nc Symbol Parameter Test Conditio Min. Typ. Max. Unit t d(off) t f Turn-off Delay Time Fall Time V DD = 300 V, I D = 3.5 A R G =4.7Ω V GS = 10 V (Resistive Load see, Figure 3) t r(voff) t f t c Off-voltage Rise Time Fall Time Cross-over Time V DD = 300 V, I D = 7 A, R G =4.7Ω, V GS = 10V (Inductive Load see, Figure 5) SOURCE DRAIN DIODE Symbol Parameter Test Conditio Min. Typ. Max. Unit I SD Source-drain Current 7 A I SDM (2) Source-drain Current (pulsed) 28 A V SD (1) Forward On Voltage I SD = 7 A, V GS = V t rr Q rr I RRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 7 A, di/dt = 100A/µs V DD = 30V, T j = 150 C (see test circuit, Figure 5) Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. C oss eq. is defined as a cotant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS µc A 3/13

4 Safe Operating Area For TO-220/D2PAK/I2PAK Safe Operating Area For TO-220FP Thermal Impedance For TO-220/D2PAK/I2PAK Thermal Impedance For TO-220FP Output Characteristics Trafer Characteristics 4/13

5 Traconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variatio Normalized Gate Threshold Voltage vs Temp. Normalized On Resistance vs Temperature 5/13

6 Source-drain Diode Forward Characteristics Normalized BVDSS vs Temperature Maximum Avalanche Energy vs Temperature 6/13

7 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 7/13

8 TO-220 MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A C D D E F F F G G H L L L L L L DIA D1 C F G H2 D A E L2 G1 F1 Dia. L5 L7 L9 F2 L6 L4 P011C 8/13

9 TO-220FP MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A B D E F F F G G H L L L L L L Ø H G B D A E L6 L7 L3 F G1 F1 L2 L5 F2 L /13

10 D 2 PAK MECHANICAL DATA DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A A A B B C C D D E E G L L L M R V2 0º 8º 3 10/13 1

11 TO-262 (I 2 PAK) MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A A B B C C D e E L L L E A C2 B2 B e A1 C L1 L2 D L P011P5/E 11/13

12 D 2 PAK FOOTPRINT TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix T4 )* REEL MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. A B C D G N T TAPE MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. A B D D E F K P P P R T W * on sales type 12/13 BASE QTY BULK QTY

13 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no respoibility for the coequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licee is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificatio mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. 13/13