Image Acquisition Application using USB 3.0 Device IP Core Application Note

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1 Image Acquisition Application using USB 3.0 Device IP Core Application Note, Ver. 1.0, Inc. (SLS) is a leading provider of innovative design IPs, VLSI and embedded systems solutions, for the development of SoC platform products, announced the availability of a USB 3.0 Image Acquisition Application using SLS USB 3.0 Device IP Core. This application note is intended to present USB 3.0 as an interface for the next generation camera development. It describes the benefits of the USB3.0 standard, application design architecture and advantages of using SLS USB 3.0 device IP core for such applications. USB 3.0 Technology The Universal Serial Bus is one of the most common digital interfaces found today. SuperSpeed USB, also known as USB 3.0, is the next generation of the popular plug and play Universal Serial Bus interface specification. The high bandwidth of USB 3.0 delivers a transfer speed of roughly 5Gb/s, which is five folds faster than the widely used GigE interface and 10 times faster than USB 2.0. USB 3.0 offers following advantages over the other machine vision interface: Low power consumption and higher capacity Higher bandwidth up to 5Gbps Low cpu usage Reduce image corruption Power and data over the same passive cable to five meters (more with active cables) Allows to use multiple camera using USB 3.0 Hub Low difficulty of system integration 1

2 Why Choose SLS USB 3.0 for Image Acquisition Application? Why Choose SLS USB 3.0 for Image Acquisition Application? Reasons to choose USB 3.0 for your next machine vision application is simple: High bandwidth, Widely deployed and Camera control interface All major PC vendors now shipping their products with USB 3.0 support. Some vendors have chosen to use a third party USB 3.0 Device Controller, integrating the controller with a sensor and creating a USB 3.0 camera. However, this limits the camera vendor s ability to modify the device controller and delays USB 3.0 related fixes and improvements to the end customer. While SLS has developed own USB 3.0 device IP Core on FPGA interfacing to an external PHY chip, as well as it s very own device driver. This gives full control over the imaging pipeline, allowing vendors to deliver features and improvements to customers much quicker. SLS have developed it s own custom library which supports Windows and Linux Operating System (OS). This library is very user friendly which allows you to control CMOS sensor to make the development faster. Also, USB 3.0 supports direct memory access which allows the data to be written directly to memory reducing CPU processing load. In this application, we have achieved full HD quality (1080p) with 60fps video streaming output using SLS USB 3.0 Device IP Core with 3.1 MP CMOS camera. This application can be upgraded to support higher resolution camera at the maximum data rate. 2

3 Application Note Design Architecture Following is the architectural block diagram of the application implemented on hardware. Figure 1. Design Architecture Block Diagram CMOS Sensor SLS I 2C Master IP Core ImgAcq Control IF A V A L O N Nios II Processor DDR2 SDRAM Video Frame Buffer SLS USB 3.0 Device IP Core B U S SDR SDRAM Controller FPGA External to FPGA SLS Altera USB3.0 Driver & DLL Video Application Windows /Linux Host PC As shown in the block diagram, a CMOS camera sensor data is being transferred over USB 3.0 interface using SLS USB 3.0 Device. The Nios II processor is used to control peripherals such as memory controller, I2C master and enumeration of the USB 3.0 Device on Host PC running with Windows or Linux Operating System (OS). The CMOS sensor is getting configured through SLS I2C Master IP Core. Once it is configured, it outputs the data in Video Frame Buffer. The Video Frame Buffer is used to match the data rate between CMOS sensor and USB 3.0. It outputs the first pixel as soon as the first 256 pixels from CMOS sensor are written in frame buffer. Figure 2 shows the hardware setup used in the application. 3

4 Design Architecture Figure 2. Hardware Setup USB 3.0 Development Board APTINA AR0331 Camera Head Board HSMC Interconnect Board The ImgAcq Control IF interface controls the input image frame to the Video Frame Buffer when the capture command is executed by host application. The capture command from host application activates the FPGA design to transfer COMS sensor data to host machine. As per block diagram the data path would be CMOS Sensor > Video Frame Buffer > USB30 IP Core > Host PC. The host application processes captured data and displays it on the screen. The application displays the captured data along with the frame details and it s resolution. It allows to capture series of frame and making a video of captured images. Figure 3 shows the Host application. 4

5 Application Note Figure 3. Host PC Application Achievement Imaging Sensor: AR0331 CMOS Sensor Lens Mount: CS Mount Image Resolution: 3.1 MP, 1920 x 1080 Full HD Image Compression: No Frame Rate: 60 fps Color Pattern: Bayer RGB Digital Interface: USB 3.0 (backward compatible to USB2.0) Operating System: Windows and Linux 5

6 Application Note Applications Industrial Automation and Machine vision Traffic Surveillance Aviation and defence Visualization Object Tracking Printing Technology Measuring Technology Medical Imaging 3 D Scanning Metrology Research Work Life science Enhancement Conclusion Further Information In this application, the device throughput is limited due to CMOS sensor. The transfer rate can be increased by changing the CMOS sensor with higher resolution and frame rate. SLS USB 3.0 camera interface is designed to fill the gap between Gigabit Ethernet and Camera Link and to replace older USB 2.0 and FireWire interfaces. SLS USB 3.0 solution opens a wealth of possibilities for faster and cheaper camera products. For more information about USB 3.0, refer to For more information about Image Acquisition Application, write us at info@slscorp.com., Inc. (USA) Murphy Avenue San Martin, CA (408) Copyright 2014,.All rights reserved. SLS, An Embedded systems company, the stylized SLS logo, specific device designations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of SLS in India and other countries. All other products or service names are the property of their respective holders. SLS products are protected under numerous U.S. and foreign patents and pending applications, mask working rights, and copyrights. SLS warrants performance of its semiconductor products to current specifications in accordance with SLS is standard warranty, but reserves the right to make changes to any products and services at any time without notice. SLS assumes no responsibility or liability arising out of the application or use of any information, products, or service described herein except as expressly agreed to in writing by SLS. SLS customers are advised to obtain the latest version of specifications before relying on any published information and before orders for products or services. an_740a_1.0 6