PPV120B Programmable Overvoltage Protector

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1 Programmable Overvoltage Protector Description This is a programmable overvoltage protective Line device designed to protect modern dual polarity supply rail ringing SLICs (Subscriber Line Interface Circuits ) against overvoltage on the telephone line. Overvoltages can be caused by lightning, a.c. power contact and induction. Four separate protection structures are used; two positive and two negative to provide optimum protection during Metallic (Differential) and Longitudinal (Common Mode) protection conditions in both polarities. Dynamic protection performance is specified under typical international surge waveforms from Telcordia GR Line CORE, ITU-T K.44 and YD/T G1 G2 Line The is programmed by connecting the G1 and G2 gate terminals to the negative (-V(BAT)) and positive (+V(BAT)) SLIC Battery supplies respectively. This creates a protector operating at typically +1.4 V above +V(BAT) and -1.4 V below -V(BAT) under a.c. power induction and power contact conditions. The protector gate circuitry incorporates 4 separate buffer transistors designed to provide independent control for each protection element. The gate buffer transistors minimize supply regulation issues by reducing the gate current drawn to around 5 ma, while the high voltage base emitter structures eliminate the need for expensive reverse bias protection gate diodes. The is rated for common surges contained in regulatory requirements such as ITU-T K.20, K.45, Telcordia GR-1089-CORE, YD/T 950. By the use of appropriate overcurrent protection devices, circuits can be designed to comply with modern telecom standards. DFN-8 Package Top View and Device Symbol (Tip or Ring) Line NC 8 (-V (BAT) ) G1 GND (+V (BAT) ) G2 GND 1 (Ring or Tip) K2 NC Rev.06 1

2 Feature High Performance Protection for SLICs with +ve and -ve Battery Supplies Wide -110 V to +110 V Programming Range Low 5 ma max. Gate Triggering Current Dynamic Protection Performance Specified for International Surge Wave Shapes Wireless Local Loop Access Equipment Regenerated POTS Applications (Tip) (220nF) (220nF) (Ring) () +V BAT -V BAT Telecom standards ITU-T K.20/21/45 Rated for LSSGR 1089 Conditions 2/10 Overshoot Voltage Specified 1089 TEST Section Test # Voltage waveform (μs) Required peak current(a) /10μs ,3 10/1000μs 30 Rev.06 2

3 1089 TEST Section Test # 60 Hz power fault time Required peak current(a) ms ,4,8 1s ,3 5s s /16 1,2 1,4,5 900s 0.73 Absolute Maximum Ratings Symbol Rating Value Unit Repetitive peak off-state voltage V DRM V G1(Line) = 0, V G2 +5 V -120 V V G2(Line) = 0, V G1-5 V +120 Non-repetitive peak impulse current (see Notes 1, 2, 3 and 4) I PPSM 2/10μs (Telcordia GR-1089-CORE) 5/310μs (ITU-T K.20, K.21 & K.45, K.44 open-circuit voltage wave shape 10/700 s) ±100 ±45 A 10/1000μs (Telcordia GR-1089-CORE) ±30 Non-repetitive peak on-state current, 50 Hz / 60 Hz (see Notes 1, 2, 3 and 5) I TSM 0.2 s 1 s A 900 s 1.7 V G1M Maximum negative battery supply voltage -110 V V G2M Maximum positive battery supply voltage +110 V V (BAT)M Maximum differential battery supply voltage 220 V T J Junction temperature -40 to +150 T stg Storage temperature range -65 to +150 NOTES: 1. Initially the device must be in thermal equilibrium with T J = 25. The surge may be repeated after the device returns to its initial conditions. 2. The rated current values may be applied to either of the Line to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the Ground terminal current will be twice the rated current value of a single terminal pair). 3. Rated currents only apply if pins 6 & 7 (Ground) are connected together. 4. Applies for the following bias conditions: V G1 = -20 V to -110 V, V G2 = 0 V to +110 V. 5. EIA/JESD51-2 environment and EIA/JESD51-7 high effective thermal conductivity test board (multi-layer) connected with 0.6 mm printed wiring track widths. Rev.06 3

4 Thermal Resistance Symbol Parameter Value Unit R θja Junction to free air thermal resistance 120 /W Electrical Characteristics (Tamb=25 ) I PPSM Symbol I D Parameter Off-state current Holding current I TSM I T V BO V BO Breakover voltage V GK(BO) V F Forward voltage V FRM Peak Forward Recovery voltage V GK(BD) Gate-cathode impulse breakover voltage I GKS Gate reverse current V GK(BO) I GT Gate trigger current V BO I T V GT Gate-cathode trigger voltage I TSM C KA Cathode-anode off-state capacitance I PPSM Parameters Related to The Diode (Tamb=25 ) Parameter Description Test Conditions Min Typ Max Unit V D = V DRM, V G1(Line) = 0, V G2 +5 V T A = 25 C -5 I D Off-state current T A = 85 C -50 μa I G1(Line) Negative-gate leakage current V G1(Line) = -220 V -5 μa I G2(Line) Positive-gate leakage current V G2(Line) = +220 V +5 μa V G1L(BO) Gate - Line impulse breakover voltage V G1 = -100 V, I T = -100 A (see Note 6) V G1 = -100 V, I T = -30 A 2/10 μs 10/1000 μ V V G2L(BO) Gate - Line impulse breakover voltage V G2 = +100 V, I T = +100 A (see Note 6) V G2 = +100 V, I T = +30 A 2/10 μs 10/1000 μ V - Negative holding current V G1 = -60 V, I T = -1 A, di/dt = 1 A/ms -150 ma I G1T Negative-gate trigger current I T = -5 A, t p(g) 20 μs, V G1 = -60 V +5 ma I G2T Positive-gate trigger current I T = 5 A, t p(g) 20 μs, V G2 = 60 V -5 ma C O Line - Ground off-state f = 1 MHz, V D = -3 V, G1 & G2 open 32 pf Rev.06 4

5 Parameters Related to The Protection Thyristor (Tamb=25 ) Parameter Description Test Conditions Min Typ Max Unit R θja Junction to ambient thermal resistance EIA/JESD51-7 PCB, EIA/JESD51-2 Environment, PTOT = 4 W 55 /W Parameters Related to The Protection Thyristor (Tamb=25 ) 50 Peak Non-Recurring AC VS Current Duration 45 Co - Off-state Capacitance - pf V D - Off-state Voltage - V Rev.06 5

6 Package dimension G A B C D E F J K H L Dim MIN Millimeters MAX A B C 1.00 D 4.00 E 5.00 F G H 1.27 J K 0.25 L Rev.06 6

7 IMPORTANT NOTICE and are registered trademarks of Prisemi Electronics Co., Ltd (Prisemi),Prisemi reserves the right to make changes without further notice to any products herein. Prisemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Prisemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in Prisemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Prisemi does not convey any license under its patent rights nor the rights of others. The products listed in this document are designed to be used with ordinary electronic equipment or devices, Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. Website: For additional information, please contact your local Sales Representative. Copyright 2009, Prisemi Electronics is a registered trademark of Prisemi Electronics. All rights are reserved. Rev.06 7

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