Overview of Computer Architecture ALU

Transcription

1 Tele 26 Overview of Computer Architecture General Von-Neumann Approach Other Architectural Approaches Also Exist Components ALU Memory Control Input/Output Review of Digital Circuits - Tele 26 ALU Arithmetic-Logic Unit Heart of a Computer Basic Arithmetic Functions are Performed Review of Digital Circuits - 2

2 Tele 26 Memory Closely Tied to ALU Used to Store Data Bytes Classes of Memory Main Memory Cache Memory Registers Review of Digital Circuits - 3 Tele 26 Control Controls Memory and ALU Controls the Execution of Programs Input/Output Interface to the Rest of the World Terminals Printers Secondary Storage (disk) Review of Digital Circuits - 4

3 Tele 26 Logic circuits Used to Implement Logical Functions In Computers Example Addition of Two Bits Operation: +=, +=, +=, += Result is Two Bits: SUM and CARRY Resultant Expression: SUM = A'B + AB' CARRY = AB Truth Tables S (A) C (A) (B) (B) Review of Digital Circuits - 5 Tele 26 Representing Binary Functions Truth Tables Algebraic Expression Canonical Forms Sum of Products Sum of Minterms Minterm is a Product-Only Term Product of Sums Product of Maxterms Maxterm is a Sum-Only Term Need New Algebra Traditional Algebra Does Not Apply New Relationships Hold Review of Digital Circuits - 6

4 Tele 26 Boolean Algebra Functions, Operators, and Truth Tables AND OR NOT XOR Review of Digital Circuits - 7 Tele 26 AND Function A AND B = AB = A.B = A B Truth Table: (A) (B) Logic Diagram: A B Review of Digital Circuits - 8

5 Tele 26 OR Function A OR B = A+B = A B Truth Table: (B) (A) Logic Diagram: A B Review of Digital Circuits - 9 Tele 26 NOT Function NOT A = A' = A Truth Table: A Logic Diagram: A Review of Digital Circuits -

6 Tele 26 XOR Function A XOR B = A B Truth Table: (A) (B) Logic Diagram: A B Review of Digital Circuits - Tele 26 Properties of Boolean Algebra Idempotence x+x=x x.x=x x+= x.= x+=x x.=x Communtativity x+y=y+x x.y=y.x Review of Digital Circuits - 2

7 Tele 26 Properties of Boolean Algebra Associativity (x+y)+z=x+(y+z) (x.y).z=x.(y.z) Complementation x+x'= x.x'= Distributivity x.(y+z)=x.y+x.z x+y.z=(x+y).(x+z) De Morgan's Theorem Important Boolean Algebra Theorem (A+B)' = A'B' Review of Digital Circuits - 3 Tele 26 Example Show: Proof by Truth Table x y = x y+ x y Compute the Intermediate Products Compare the Two Outputs Since They Are Identical, The Relation is Valid Input Output Output x y x y x y x y + x y x y Review of Digital Circuits - 4

8 Tele 26 Karnaugh Maps Alternate Form of Digital Representation Can Be Used to Design Circuits Two Variable Karnaugh Map: X' Y' X'Y' Y X'Y X XY' XY For F = XY+XY': Y X - - Review of Digital Circuits - 5 Tele 26 Three Variable Karnaugh Maps Adjacent Squares Are Minterms That Differ Only in a Single Variable Y'Z' Y'Z YZ YZ' X' X'Y'Z' X'Y'Z X'YZ X'YZ' X XY'Z' XY'Z XYZ XYZ' Review of Digital Circuits - 6

9 Tele 26 Three Variable K-Map Examples Example: F = m( 234,,, ) XYZ + XYZ + XYZ + XYZ = YZ + XY YZ X Example: F = m( 246,,,, ) = XYZ + XYZ + XYZ + XYZ + XYZ = Z + XY YZ X Review of Digital Circuits - 7 Tele 26 Four Variable Karnaugh Maps The Map Has 6 States (4 Rows x 4 Columns) Simplification Rules One Square Represents a Minterm of Four Literals Two Adjacent Squares Represent a Product Term of Three Literals Four Adjacent Squares Implies the Product Term of Two Literals Eight Adjacent Squares Implies the Product Term of One Literal Review of Digital Circuits - 8

10 Tele 26 Circuit Implementation Gate Representations NAND NOR XOR Any Digital System Can Be Implemented with NAND Widely Used in Practice Complement to NAND Also Universal XY = XY'+X'Y Two Level Implementation F =AB+CD = ((AB)'(CD)')' NAND Implementation Review of Digital Circuits - 9 Tele 26 Integration Levels SSI Several Gates in an IC The Glass Modem Uses SSI MSI to gates in an IC Registers, Latches, Adders, etc. Could Be MSI LSI to a Few Thousand Gates CPU's, Memory, etc. VLSI Large Memory Chips 32 bit CPU's, etc. Review of Digital Circuits - 2

11 Tele 26 Logic Families TTL Transistor-Transistor Logic One of the Oldest Normally Uses +5V and Ground as Supplies A "" is Normally 3.5 to 5V A "" is Normally to.4v Medium Speed, Moderate Density, Moderate Power Consumption CMOS More Recent Low Power, Moderate Speed, High Density Can Run Off of a Variety of Supply Voltages (+5, +2) The Threshold is Normally About.5 of V cc Review of Digital Circuits - 2 Tele 26 Logic Families ECL High Speed, High Power, Moderate Density Runs at Vcc of -3V Threshold is About /2 of V cc Review of Digital Circuits - 22

12 Tele 26 Logic Families of Popular CPU Chips Traditional High Speed Computers are Implemented in ECL IBM 39 DEC VAX 9 Most New Chips are CMOS DEC Alpha NVAX IBM - PowerPC HP - PA-RISC Intel - Pentium Sun/TI - SuperSPARC Review of Digital Circuits - 23 Tele 26 Other Practical Concepts Fan Out Number of Inputs an Output Can Support Typically Around Need a Driver if More Inputs are Attached Propagation Delay Time it Takes for a Signal to Propagate from Input to Output The Lower the Propagation Delay, the Faster the Chip Power Dissipation - Amount of Power Used by the Gate Review of Digital Circuits - 24

13 Tele 26 Standard Pin Arrangements 6 pin DIP 8 - Ground 6 - V cc 4 pin DIP 7 - Ground 4 - V cc 8 pin DIP 4 - Ground 8 - V cc Dot or Notch Review of Digital Circuits - 25 Tele 26 Definition of Combinational Circuits Perform a Mapping Between n Binary Inputs m Binary Outputs Use a Combination of Gates Review of Digital Circuits - 26

14 Tele 26 Analysis Procedure for Combinational Circuits Identify Inputs Identify Outputs Write Outputs in Terms of Inputs Create a Truth Table for the Function Review of Digital Circuits - 27 Tele 26 Design Procedure for Combinational Circuits Determine the Required Outputs and Assign a Letter Create a Truth Table for the Function Write the Boolean Functions for Each Output Simplify (Use Boolean Algebra or K-Maps) Draw Logic Diagram Review of Digital Circuits - 28

15 Tele 26 Example of Combinational Circuit Design A B C Z Z = A B C + A BC + AB C + AB C + ABC BC A Z = AC + BC + AC Review of Digital Circuits - 29 Gate Schematic Tele 26 Combinational Building Blocks Adder Decoder/Encoder Multiplexer Review of Digital Circuits - 3

16 Tele 26 Adder Half Adder Adds Two Bits Produces SUM and CARRY Truth Table & Logic Circuit (p. 89) Full Adder Adds Three Bits Two Bits Carry from Previous Stage Produces SUM and CARRY Truth Table & Logic Circuit (p. 9, 9) Review of Digital Circuits - 3 Tele 26 Decoder Function Convert a Binary Input to a Single Line Output eg Three Digit Binary Number has Eight Values (or Lines) Associated With It Truth Table & Diagram: p. 97 Encoder is the Inverse Function Review of Digital Circuits - 32

17 Tele 26 Multiplexer Function Select One of Four Inputs Under Control of CONTROL Signals Logic Implementation Block Diagram Truth Table Gate Representation (Fig.8, p. 38) Review of Digital Circuits - 33 Tele 26 Timing Considerations Most First-Order Analyses Assume Immediate Gate Response More Sophisticated Analyses Must Include Gate Delays Race Conditions Occur When the Output of A Combintational Circuit Depends on the Order in Which Signals Arrive at Various Gates The Signals Are in a Race to Get to the Input Usually the Result of a Bad Design May Need a Clock Signal to Elimate Review of Digital Circuits - 34