VLF Test Frequency Source

Transcription

1 BAA RAG VLF Frequency Source Objective: A simple source that can be used to set up VLF receivers on any one of the commonly used frequencies: For use with type designs a square wave is acceptable Pre set frequencies only +/ 100Hz accuracy Minimal component count Hand held Principle of operation: PIC serial data outputs (UART/EUART) are driven by a configurable Baud Rate Generator which is configured independently of the PIC s main oscillator source. By continually feeding the value 0x55 into the serial output buffer we can generate a square wave at the TX pin. Unlike toggling one of the general purpose port pins, once we have loaded this byte we can leave the UART to get on with generating the individual Marks and Spaces as a background task, leaving ample time to get ready to load the next byte. Last STOP START x55 (clocked out as LSB first) STOP Next START Frequency of square wave = ½ Baud rate (1Hz = 0 followed by a 1 ) Because absolute accuracy is not an issue, we can use the internal chip oscillator function, dispensing with the need for a crystal. Limitations: The frequency of the generated square wave is not continually variable but depends on the value loaded into the Baud Rate Generator. Many options are not precisely the same as the required frequency, but are close enough to set up receivers prior to final fine tuning. Using a higher frequency oscillator setting on the PIC decreases the step size increasing the chances of an exact match. The prototype device uses an 8MHz oscillator but other PICs can provide a 32MHz internal oscillator setting. Paul Hyde 2010 Page 1

2 1 20 PIC 16F690 The principle can be extended to cover more than four frequencies by adding 7 segment displays to indicate the frequency directly, and UP and DOWN buttons to cycle around them. Paul Hyde 21 st October 2010 Paul Hyde 2010 Page 2

3 ****************************************************************** Filename: VLF_Generator.asm Date: 12th June 2010 File Version: v1 Author: Paul Hyde Company: BAA RAG ******************************************************************* Files Required: P16F690.INC ****************************************************************** Notes: The Hex byte 0x55 is repeatedly loaded into the UART TX buffer and clocked out, generating a stream of interleaved marks & spaces. One of 4 pre-defined values is loaded into the Baud Rate Generator to determine the tx data rate. A different LED is lit to indicate each frequency. A momentary-make pushbutton is used to cycle around the four different frequencies. ******************************************************************* list p=16f690 list directive to define processor #include <P16F690.inc> CONFIG _CP_OFF & _CPD_OFF & _BOR_OFF & _PWRTE_ON & _WDT_OFF & _INTRC_OSC_NOCLKOUT & _MCLRE_OFF & _FCMEN_OFF & _IESO_OFF ***** FIXED DEFINITIONS #define BUTTON PORTA,3 Press button to cycle around four frequencies FREQ1 EQU khz for 8 MHz Fosc FREQ2 EQU khz for 8 MHz Fosc FREQ3 EQU khz for 8 MHz Fosc FREQ4 EQU khz for 8 MHz Fosc NB: Output frequency will be half the baud rate (1 Hz = 10) ***** VARIABLE DEFINITIONS CBLOCK 0x020 FREQ_PARAM:4 Four values to set Baud rate LED_OUTPUT:4 Four LED output patterns PNTR Pointer to current selected frequency INNER Counters for debounce delay ENDC ORG 0x000 processor reset vector main go to beginning of program init initialise system bsf STATUS,RP0 Select Bank 1 bcf STATUS,RP1 movlw 0x70 Set up for 8MHz operation (already config for internal osc) iorwf OSCCON bsf OSCCON,SCS PIE1 Disable all interrupts PIE initialise I/O ports For PIC16F690 PORT A PORTB PORTC RA0 ICSPDATA RC0 LED1 RA1 ICSPCLK RC1 LED2 Paul Hyde 2010 Page 3

4 RA2 RC2 LED3 RA3 Vpp/BUTTON RC3 LED4 RA4 RB4 RC4 RA5 RB5 RC5 RB6 RC6 RB7 UART TX RC7 bcf STATUS,RP0 Select Bank 0 PORTA bsf BUTTON Set BUTTON as high bsf STATUS,RP1 Select Bank 2 ANSEL set for digital inputs bsf STATUS,RP0 Select Bank 1 bcf STATUS,RP1 movlw b' ' Set all pins as input TRISA bcf STATUS,RP0 Select Bank 0 PORTB bsf STATUS,RP0 Select Bank 1 movlw b' ' All inputs TRISB bcf STATUS,RP0 Select Bank 0 PORTC Set LEDs to off bsf STATUS,RP0 Select Bank 1 movlw b' ' Set LED pins as output TRISC clear flags and counters? bcf STATUS,RP0 Select Bank 0 PNTR INNER Load fixed patterns movlw FREQ_PARAM load the first address movlw FREQ1 SPBRG value for 1st frequency movlw FREQ2 SPBRG value for 2nd frequency movlw FREQ3 SPBRG value for 3rd frequency movlw FREQ4 SPBRG value for 4th frequency movlw 0x01 Port pattern for LED1 movlw 0x02 Port pattern for LED2 movlw 0x04 Port pattern for LED3 movlw 0x08 Port pattern for LED initialise UART Configure UART generator to use formula RATE = Fosc/4(SPBRG+1) bsf STATUS,RP0 Select Bank 1 bsf BAUDCTL,BRG16 Select 16- generator mode bcf TXSTA,SYNC Set for asynch operation bsf TXSTA,BRGH Select High Speed operation bcf STATUS,RP0 Select Bank 0 bsf RCSTA,SPEN Enable the serial port movf FREQ_PARAM,W Set initial baud rate to FREQ1 Paul Hyde 2010 Page 4

5 bsf STATUS,RP0 Select Bank 1 SPBRG bsf TXSTA,TXEN Enable transmission initialise display bcf STATUS,RP0 Select Bank 0 movf LED_OUTPUT,W PORTC Load starting display retfie Initialisation complete main call init state_chk bcf STATUS,RP1 Select Bank 0 bcf STATUS,RP0 btfss PIR1,TXIF Is the TX buffer empty? bttn_chk movlw 0x55 Fill it TXREG bttn_chk btfsc BUTTON Has the button been pressed? state_chk Action a button press movlw.40 Set up debounce (INNER = 256) dwn_dly call short 256*3*0.5us = 0.38ms approx btfsc BUTTON state_chk Button bounced to 1 - start again decfsz dwn_dly Action command on button up, so repeat process up_chk btfss BUTTON Output stream could fail here, but no matter up_chk movlw.40 Reload counter up_dly call short btfss BUTTON up_chk Button bounced to 0 - start again decfsz up_dly PNTR,F Increment pointer movlw LED_OUTPUT Load new LED pattern movlw 0x03 Keep PNTR within 0 to 3 andwf PNTR,W addwf Add the offset movf,w Get the new port pattern PORTC Switch LEDs movlw FREQ_PARAM Load new Frequency movlw 0x03 Keep PNTR within 0 to 3 andwf PNTR,W addwf Add the offset movf,w Get the new SPBRG value bsf STATUS,RP0 Bank 1 SPBRG state_chk Paul Hyde 2010 Page 5

6 ----- subroutines short decfsz INNER short btfss PIR1,TXIF Is the TX buffer empty? return movlw 0x55 Fill it TXREG return END directive 'end of program' Paul Hyde 2010 Page 6