Switched-Capacitor Voltage Doublers
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- Clemence Matthews
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1 9-; Rev ; 9/ Switched-Capacitor Voltage Doublers General Description The ultra-small / monolithic, CMOS charge-pump voltage doublers accept input voltages ranging from +.V to +.V. Their high voltage-conversion efficiency (over 98%) and low operating current (µa for ) make these devices ideal for both battery-powered and board-level voltage-doubler applications. Oscillator control circuitry and four power MOSFET switches are included on-chip. The operates at khz, and the operates at khz. A typical application includes generating a 6V supply to power an LCD display in a hand-held PDA. Both parts are available in a -pin SOT3 package and can deliver 3mA with a typical voltage drop of 6mV. Applications Small LCD Panels Cell Phones Handy-Terminals PDAs Features -Pin SOT3 Package +.V to +.V Input Voltage Range 98% Voltage-Conversion Efficiency µa Quiescent Current () Requires Only Two Capacitors Up to 4mA Output Current PART TEMP. RANGE EUK-T -4 C to +8 C EUK-T -4 C to +8 C Ordering Information PIN- PACKAGE SOT3- SOT3- SOT TOP MARK ACCL ACCM Note: These parts are available in tape-and-reel only. Minimum order quantity is pieces. / Typical Operating Circuit 4 + IN V IN INPUT SUPPLY Pin Configuration 3 - TOP VIEW + OUT OUTPUT x V IN OUT IN DOUBLER SOT3- Maxim Integrated Products For price, delivery, and to place orders, please contact Maxim Distribution at , or visit Maxim s website at
2 / ABSOLUTE MAXIMUM RATINGS IN to...+6v to -.3V OUT to...+v, V IN -.3V OUT Output Current...mA Output Short-Circuit Duration...sec (Note ) Continuous Power Dissipation (T A = +7 C) SOT3- (derate 7.mW/ C above +7 C)...7mW Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Operating Temperature Range EUK/EUK...-4 C to +8 C Junction Temperature...+ C Storage Temperature Range...-6 C to +6 C Lead Temperature (soldering, sec)...+3 C Note : Avoid shorting OUT to, as it may damage the device. For temperatures above +8 C, shorting OUT to even instantaneously will damage the device. (V IN = +.V, capacitor values from Table, T A = C to +8 C, unless otherwise noted. Typical values are at T A = + C.) PARAMETER No-Load Supply Current Supply Voltage Range Minimum Operating Voltage Oscillator Frequency Output Resistance Voltage Conversion Efficiency T A = + C R LOAD = kω (Note ) T A = + C I OUT = ma I OUT = ma, T A = + C CONDITIONS T A = + C T A = C to +8 C T A = + C T A = C to +8 C MIN TYP MAX UNITS µa V V khz Ω % Note : Once started, the / typically operate down to V. ELECTRICAL CHARACTERISTICS (V IN = +.V, capacitor values from Table, T A = -4 C to +8 C, unless otherwise noted.) (Note 3) PARAMETER CONDITIONS MIN TYP MAX UNITS No-Load Supply Current 6 µa Supply Voltage Range R LOAD = kω.3. V Oscillator Frequency khz Output Resistance I OUT = ma 6 Ω Voltage Conversion Efficiency I OUT = ma 97 % Note 3: Specifications at -4 C to +8 C are guaranteed by design.
3 Typical Operating Characteristics (Typical Operating Circuit, V IN = +V, = = µf for the and 3.3µF for the, T A = + C, unless otherwise noted.) OUTPUT RESISTANCE vs. SUPPLY, = = 3.3µF, = = µf, = = µf V IN (V) OUTPUT RESISTANCE vs. CAPACITANCE 3 CAPACITANCE (µf) VRIPPLE (mv) /83 TO /83 TOC4 OUTPUT RIPPLE vs. OUTPUT CURRENT = =µf = = 3.3µF 3 4 I OUT (ma) = = µf OUTPUT RESISTANCE vs. TEMPERATURE I LOAD = ma TEMPERATURE ( C) /83 TOC7 OUTPUT RESISTANCE vs. CAPITANCE 3 CAPACITANCE (µf) SUPPLY CURRENT (µa) 3 /83 TO /83 TOC VRIPPLE (mv) OUTPUT RESISTANCE vs. TEMPERATURE I LOAD = ma TEMPERATURE ( C) OUTPUT RIPPLE vs. OUTPUT CURRENT = = 3.3µF = = 33µF = = µf 3 4 I OUT (ma) SUPPLY CURRENT vs. SUPPLY SUPPLY (V) /83 TOC9 /83 TOC3 /83 TOC6 / 3
4 / Typical Operating Characteristics (continued) (Typical Operating Circuit, V IN = +V, = = µf for the and 3.3µF for the, T A = + C, unless otherwise noted.) OSCILLATOR FREQUENCY (khz).... OSCILLATOR FREQUENCY vs. TEMPERATURE TEMPERATURE ( C) /83 TO OSCILLATOR FREQUENCY (khz) OSCILLATOR FREQUENCY vs. TEMPERATURE TEMPERATURE ( C) /83 TO OUTPUT (V) OUTPUT vs. OUTPUT CURRENT OUTPUT CURRENT (ma) /83 TO OUTPUT (V) OUTPUT vs. OUTPUT CURRENT /83 TO3 EFFICIENCY (%) EFFICIENCY vs. LOAD CURRENT /83 TO4 EFFICIENCY (%) EFFICIENCY vs. LOAD CURRENT /83 TO OUTPUT CURRENT (ma) 8 3 LOAD CURRENT (ma) 8 3 LOAD CURRENT (ma) OUTPUT RIPPLE toc6 OUTPUT RIPPLE toc7.. START-UP vs. RESISTIVE LOAD toc8 V OUT mv/div V OUT mv/div VSTART (V)... µs/div I LOAD = ma,, = = µf µs/div I LOAD = ma,, = 3.3µF, = µf R LOAD (kω) 4
5 Pin Description PIN NAME Ground OUT 3-4 IN Input Supply + FUNCTION Doubled Output Voltage. Connect between OUT and. Negative Terminal of the Flying Capacitor Positive Terminal of the Flying Capacitor Detailed Description The / capacitive charge pumps double the voltage applied to their input. Figure shows a simplified functional diagram of an ideal voltage doubler. During the first half-cycle, switches S and S close, and capacitor charges to VIN. During the second half cycle, S and S open, S3 and S4 close, and is level shifted upward by VIN volts. This connects to the reservoir capacitor, allowing energy to be delivered to the output as necessary. The actual voltage is slightly lower than x VIN, since switches S S4 have resistance and the load drains charge from. Charge-Pump Output The / have a finite output resistance of about Ω (Table ). As the load current increases, the devices output voltage (VOUT) droops. The droop equals the current drawn from VOUT times the circuit s output impedance (RS), as follows: VDROOP = IOUT x RS VOUT = x VIN - VDROOP Efficiency Considerations The power efficiency of a switched-capacitor voltage converter is affected by three factors: the internal losses in the converter IC, the resistive losses of the capacitors, and the conversion losses during charge transfer between the capacitors. The total power loss is: ΣPLOSS = PINTERNAL LOSSES + PPUMP CAPACITOR LOSSES + PCONVERSION LOSSES The internal losses are associated with the IC s internal functions, such as driving the switches, oscillator, etc. These losses are affected by operating conditions such as input voltage, temperature, and frequency. The next two losses are associated with the voltage converter circuit s output resistance. Switch losses occur because of the on-resistance of the MOSFET switches in the IC. Charge-pump capacitor losses occur because of their ESR. The relationship between these losses and the output resistance is as follows: PPUMP CAPACITOR LOSSES + PSWITCH LOSSES = IOUT x ROUT ROUT + RSWITCHES + 4ESR ( fosc ) x + ESR where fosc is the oscillator frequency. The first term is the effective resistance from an ideal switchedcapacitor circuit (Figures a and b). V+ f R L V OUT / S S3 V IN V OUT Figure a. Switched-Capacitor Model S S4 V+ R EQUIV R EQUIV = f R L VOUT V IN Figure. Simplified Functional Diagram of Ideal Voltage Doubler Figure b. Equivalent Circuit
6 / Conversion losses occur during the charge transfer between and when there is a voltage difference between them. The power loss is: P CONVERSION LOSS = / 4V IN VOUT + / V OUT V RIPPLE V RIPPLE x fosc where VRIPPLE is the peak-to-peak output voltage ripple determined by the output capacitor and load current (see Output Capacitor section). Choose capacitor values that decrease the output resistance (see Flying Capacitor section). Applications Information Flying Capacitor () To maintain the lowest output resistance, use capacitors with low ESR. Suitable capacitor manufacturers are listed in Table. The charge-pump output resistance is a function of and s ESR and the internal switch resistance, as shown in the equation for R OUT in the Efficiency Considerations section. Minimizing the charge-pump capacitor s ESR minimizes the total resistance. Suggested values are listed in Tables and 3. Using a larger flying capacitor reduces the output impedance and improves efficiency (see the Efficiency Considerations section). Above a certain point, increasing s capacitance has a negligible effect because the output resistance becomes dominated by the internal switch resistance and capacitor ESR (see the Output Resistance vs. Capacitance graph in the Typical Operating Characteristics). Table lists the most desirable capacitor values those that produce a low output resistance. But when space is a constraint, it may be necessary to sacrifice low output resistance for the sake of small capacitor size. Table 3 demonstrates how the capacitor affects output resistance. Output Capacitor () Increasing the output capacitance reduces the output ripple voltage. Decreasing its ESR reduces both output resistance and ripple. Smaller capacitance values can be used with light loads. Use the following equation to calculate the peak-to-peak ripple: VRIPPLE = IOUT / (fosc x ) + x IOUT x ESR Input Bypass Capacitor Bypass the incoming supply to reduce its AC impedance and the impact of the / s switching noise. When loaded, the circuit draws a continuous current of x IOUT. A.µF bypass capacitor is sufficient. Table. Recommended Capacitor Manufacturers PRODUCTION METHOD Surface-Mount Tantalum Surface-Mount Ceramic MANUFACTURER AVX SERIES TPS PHONE FAX Matsuo Sprague 93D, 9D AVX X7R Matsuo X7R Table. Suggested Capacitor Values for Low Output Resistance Table 3. Suggested Capacitor Values for Minimum Size PART FREQUENCY (khz) CAPACITOR VALUE (µf) TYPICAL R OUT (Ω) PART FREQUENCY (khz) CAPACITOR VALUE (µf) TYPICAL R OUT (Ω)
7 Cascading Devices Devices can be cascaded to produce an even larger voltage (Figure 3). The unloaded output voltage is nominally (n + ) x VIN, where n is the number of voltage doublers used. This voltage is reduced by the output resistance of the first device multiplied by the quiescent current of the second. The output resistance increases when devices are cascaded. Using a two-stage doubler as an example, output resistance can be approximated as ROUT = x ROUT + ROUT, where ROUT is the output resistance of the first stage and ROUT is the output resistance of the second stage. A typical value for a two-stage voltage doubler is 6Ω (with at µf for and 3.3µF for ). For n stages with the same value, ROUT = ( n - ) x ROUT. INPUT SUPPLY Paralleling Devices Paralleling multiple or s reduces the output resistance. Each device requires its own pump capacitor (), but the reservoir capacitor () serves all devices (Figure 4). Increase s value by a factor of n, where n is the number of parallel devices. Figure 4 shows the equation for calculating output resistance. Layout and Grounding Good layout is important, primarily for good noise performance. To ensure good layout, mount all components as close together as possible, keep traces short to minimize parasitic inductance and capacitance, and use a ground plane. INPUT SUPPLY / OUTPUT + + IN - OUT IN + - OUT + IN - OUT - IN OUT OUTPUT R OUT = R OUT OF SINGLE DEVICE NUMBER OF DEVICES Figure 3. Cascading Devices Figure 4. Paralleling Devices Chip Information TRANSISTOR COUNT: 97 7
8 / Package Information SOTL.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 Maxim Integrated Products, San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
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