Digital Logic: From Transistors to Gates. Textbook Chapter 3
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1 Digital Logic: From Transistors to Gates Textbook Chapter 3
2 The Transistor Transistor: building block of computers Microprocessors contain tons of transistors AMD 6-core Opteron (2009): 904 million Intel Core i7 Quad (2008): 731 million Intel Core 2 Duo (2006): 291 million Intel Itanium 2 (2003): 220 million Intel Pentium 4 (2000): 42 million IBM PowerPC 750FX (2002): 38 million IBM/Apple PowerPC G5 (2003): 58 million Intel 4004 (1971): 2300 CMPE12 Fall
3 The Transistor: Past and Present CMPE12 Fall
4 Moore s Law The number of active components per chip will double every 18 months. CMPE12 Fall
5 GPU Processing Compared to CPU CMPE12 Fall
6 What Is a Transistor? A switch, which can close between the source and the drain Changing the voltage of the gate lets you change the current flow between the source and drain (closing or opening the switch) CMPE12 Fall
7 Metal-Oxide-Semiconductor transistor CMPE12 Fall
8 How big is a transistor? If a CPU die were as big as this whole classroom A transistor would be CMPE12 Fall
9 What is a transistor? Logically, each transistor is used as a switch Combined to implement logic functions AND, OR, NOT Combined to build higher-level structures Adder, multiplexer, decoder, register, Combined to build a processor LC-3, Core 2 Duo, etc CMPE12 Fall
10 Simple switch circuit Switch open: No current through circuit Light is off V out is +2.9V Switch-based circuits can easily represent two states: on/off, open/closed, voltage/no voltage. Switch closed: Short circuit across switch Current flows Light is on V out is 0V CMPE12 Fall
11 n-type MOS transistor n-type MOS (nmos) when Gate has positive voltage, short circuit between #1 and #2 (switch closed) when Gate has zero voltage, open circuit between #1 and #2 (switch open) Gate = 1 Terminal #2 must be connected to GND (0V). Gate = 0 CMPE12 Fall
12 p-type MOS transistor p-type is complementary to n-type when Gate has positive voltage, open circuit between #1 and #2 (switch open) when Gate has zero voltage, short circuit between #1 and #2 (switch closed) Gate = 1 Terminal #1 must be connected to +2.9V in this example. Gate = 0 CMPE12 Fall
13 Digital Values for Analog Signals Use the switch behavior of MOS transistors to implement logical functions: AND, OR, NOT Digital symbols: We assign a range of analog voltages to each digital (logic) symbol Assignment of voltage ranges depends on electrical properties of transistors being used CMPE12 Fall
14 CMOS circuit CMOS is Complementary Metal Oxide Semiconductor Uses both n-type and p-type MOS transistors p-type (pmos) Attached to + voltage Pulls output voltage UP when input is zero n-type (nmos) Attached to GND Pulls output voltage DOWN when input is one CMPE12 Fall
15 Truth Table The most basic representation of a logic function It is a perfect induction proof - Lists the output for all possible input combinations How many rows of the truth table needed? 2 #inputs Inputs A B Outputs X Y CMPE12 Fall
16 Truth Table: Inverter Inverted signals are denoted with an overbar Or with a prime symbol A Input Output A Y = A CMPE12 Fall
17 Inverter (NOT gate) In Out 0 V 2.9 V 2.9 V 0 V In Out CMPE12 Fall
18 Truth Table: AND Gate The result of an AND operation is 1 if and only if all inputs are 1 Depict AND by the multiplication symbol A B Or by lumping the signals together AB We don t really build these gates Inputs A B Output Y = A B CMPE12 Fall
19 NAND gate (NOT-AND) Note: Parallel structure on top, serial on bottom. A B C CMPE12 Fall
20 AND gate A B C Add an inverter to a NAND. CMPE12 Fall
21 Truth Table: OR Gate The result of an OR operation is 1 if and only if any inputs are 1 Depict OR by the addition symbol A+B Inputs A B Output Y = A + B CMPE12 Fall
22 NOR Gate: NOT-OR Note: Serial structure on top, parallel on bottom. A B C CMPE12 Fall
23 OR gate A B C Add an inverter to a NOR gate. CMPE12 Fall
24 Truth table to transistors So giving some arbitrary truth table, how do you go about creating a transistor-based circuit for it? Typically this is only done for a handful of gate types. (ASIC flow vs full custom) Recall: PMOS (with the bubbles) on top NMOS (no bubbles) on bottom Series structure makes AND Parallel structure makes OR CMPE12 Fall
25 Synthesis of an AOI Gate AOI means AND-OR-Invert There are many kinds of these in standard cell libraries CMPE12 Fall
26 Synthesis of AOI Gate CMPE12 Fall
27 Why are our circuits so big? The circuits for the NAND and NOR were a lot smaller than the one we just did. Why is that? We just used the brute force method. To do correctly you need the Function and the dual of the function. CMPE12 Fall
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