Leistungselektronik in der Leiterplatte

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1 Leistungselektronik in der Leiterplatte Thermal Management Neue Entwärmungskonzepte Gregor Langer Project Leader Senior R&D Austria Technologie & Systemtechnik Aktiengesellschaft Fabriksgasse13 A-8700 Leoben Tel +43 (0)

2 Agenda Trends in Power Electronics Thermal Management on PCBs: Motivation Thermal Path PCB Technologies Cavity Board: Thermal Simulations Cu-filled Thermal Vias: Thermal Simulations Conclusion 1

3 Trends in Power Electronics Modern Power Electronics is using new components MOSFETs IGBTs GTOs High Brightness LEDs Trends Smaller components Higher switching speed Higher current densities Miniaturisation of modules New materials innovative and reliable PCB solutions are requested!!! 2

4 Technology Trends Range of Power Electronics Applications Regenerative energy (wind power, photovoltaics, fuel cell) Decentral energy distribution (Smart Grids) Efficient lighting (LEDs) Electromobility Source: inemi Technology Roadmaps, Jan

5 Motivation: Thermal management on PCBs Reason for deficiencies of electrical systems 6% 20% 55% 19% Vibration Humidity Temperature Dust Source: US Air Force Avionics Integrity Programm (AVIP) 4

6 Motivation: Thermal management on PCBs Thermal conductive Printed Circuit Boards Advanced mechanical properties Lower operating temperature due to better heat spreading High power density Advantages Reduced PCB form factor 5

7 Thermal path through LED-module LED Thermal System Configuration Thermal System Configuration R th = Thermal resistance [K/W] d = Length of thermal path [m] l = Thermal conductivity of material [W/mK] A = Area of contact pad [m 2 ] Thermal Resistor Network 6

8 Thermal Management Thermal Management Approaches on PCBs BUILD-UP Cavities IMS Thermal Vias 7

9 Specific thermal conductivity Thermal conductivity (l) of different materials => Thermal conductivity of FR4 ca. 10x better than of air (without convection)! => Thermal conductivity of Copper ca. 1000x better than of FR4! 8

10 PCB technologies: IMS IMS (Insulating Metal Substrate): Single layer AT&S - Base Layer: Aluminum (1, 1.5, 2, 3 mm) - Insulation Layer: Thermally conductive insulation material ( W/mK) Layout Layer Insulation Layer Base Layer - Layout Layer: Copper (35, 70, 105 µm) Solder Mask Copper Thermal conductive insulation material Aluminum 9

11 PCB technologies: IMS IMS: Single sided / two layers Single sided Aluminum / single sided two layout layers - Double sided plated through hole FR4 pressed on Aluminum - Insulated material: FR4-prepreg or thermal conductive prepregs Double sided PTH PCB Insulation Material Aluminum Double sided PTH PCB Insulation Material Aluminum 10

12 PCB technologies: IMS IMS: Single layer / Double sides Construction single layer Aluminum / double sided two layout layers - Drilling of through holes into Aluminum core - Aluminum Core laminated with insulation material (plugging of holes) and copper foils - Drilling through plugged holes (smaller diameter) and plating of holes to connect the two copper layers Insulation Material PTH Solder Mask and Copper Insulation Material Aluminum Insulation Material Solder Mask and Copper 11

13 PCB technologies: HSMtec Technology Integration of Cu-wires and Cu-profiles into FR4-PCBs High current- and thermal management Multidimensional PCBs Portfolio Innovation Award and patented in 2006 Cooperation between AT&S and Häusermann since 2009 Seamless support by joint competence center team Cross section Up to 12 layer PCB HSMtec on up to 3 separate laysers 12 mm 500µm Rectangular profiles Copper wires 12

14 PCB technologies: HSMtec Applications High current management Thermal management 3D-applications Up to 400A within standard PCBs Power & control electronics on one board Optimized heat dissipation from hotspots Suited for MOSFETs, LEDs, IGBTs Self-supporting multidimensional PCB s Electrical and thermal connections over bending points 13

15 PCB technologies: HSMtec Build-up Exemplary Cross section 3D PCB Concept 14

16 PCB technologies: Thermal vias 15

17 PCB technologies: Thermal vias Thermal measurements: Experimental setup - Demonstrator mounted on water cooled heatsink - LED: OSTAR SMT (Footprint: 5 x 6 mm 2 ) Ostar SMT module: I=700 ma, U~13,5 V LED-module mounted on heatsink (water-cooled Cu-block at 13 C ; = quasi ideal heatsink ) 16

18 PCB technologies: Thermal vias Thermographic and thermocouple measurements R th,pad bot T pad P EL T bottom 1 DK2 DK6 FR4 with plugged thermal vias FR4 with open thermal vias laminated on Al R th = 3,8 K/W R th = 4,8 K/W IMS 1 l = 0.5 W/mK IMS 3 l = 4.0 W/mK R th = 2,6 K/W R th = 2,3 K/W 17

19 Cavity Board Examples: High Power Chip Product Details 2 Layer PCB ENEPIG - Bondable surface 300 µm thickness Very good thermal performance Z-Axis Miniaturization High power chip SM Cu FR4 Cu Heat Sink Cavity Wire bond Low thermal resistance Chip in cavity 18

20 Cavity Board Examples: High Power LED Chip Product Details Cavity in cavity Excellent thermal management Protection of wire bonds (packaging) Additional functional integration (reflective cavity walls for LED applications possible) Miniaturization High power LED SM FR4 Cu FR4 Cu Heat Sink Low thermal resistance Silicon Wire bond Reflective cavity wall Cross section and photo: Cavity board 19

21 Cavity Board Examples Photos: Cavities with reflective surfaces Cross sections: Cavity in cavity board 20

22 Cavity Board: Thermal Simulations Build-up IMS TIM Glob-Top Ag-Glue LED-Chip Cu Dielectric Layer Alu Heatsink Layer build-up of thermal model Material d / µm l / W/mK Silicone GaAlN-Chip Si Ag-Glue Cu Dielectric Layer 4 4 Aluminum TIM (thermal conductive paste) 30 2 Thermal Via Glob-Top FR4-DK Cu FR4 LED-Chip Cavity Glob-Top Cavity FR4 FR4 LED-Chip Cu 21

23 Cavity Board: Thermal Simulations Simulation Design: DK-FR4 Parameter Parameter value unit LED size A = 900 x 900 µm 2 LED forward current U = 350 ma Electrical power P el = 1.1 W Power loss in LED P loss = 0.66 W Ambient Temperature T amb = 25 C Model Simulation network 22

24 Cavity Board: Thermal Simulations Results T / C 23

25 Cavity Board: Thermal Simulations Results Temperature along z-axis in C T J = 27,5 C z z-axis / mm 24

26 Cavity Board: Thermal Simulations Comparison of the results of the different PCB technologies Temperature along z-axis in C FR4-DK FR4-DK-plugged IMS Cavity IMS FR4-DKb FR4-DK FR4-DKc FR4-DKa Cavity FR4-DK-pl z-axis / mm 25

27 Cavity Board: Thermal Simulations Comparison of the results of the different PCB technologies T j R th,j-amb PCB technology C K/W IMS FR4-DK FR4-DK plugged LED-in-Cavity

28 Cu-filled Thermal Vias Advantages Product Details Thin PCBs (100 µm 200 µm) Cu-filled thermal vias (excellent thermal management solution) Applicable for Flip Chip attachement High Tg-materials Cross Section: Cu-filled thermal vias Thermal Simulation: Heat dissipation of Flip Chip attached to Chip carrier 27

29 Cu-filled Thermal Vias: Thermal Simulations Chip carrier (Submount) with Copper filled thermal vias LED-Chip (1 x 1 mm 2 ) Chip carrier (3 x 3 mm 2 ) IMS (10 x 10 mm 2 ) LED-Chip Cu Dielectric layer Aluminum Au-Sn solder Thermal Via Build-up LED-Chip Chip carrier Thermal Via Chip carrier Design 28

30 Cu-filled Thermal Vias: Thermal Simulations Simulation of different designs Different variations of via designs Version 25 Version 26 Version Vias, Via = 150 µm 35 Vias, Via = 100 µm 20 Vias, Via = 200 µm Thermal via with and without dimple (80% of the via area: depths of 10 µm) 29 d = 100 µm, Via = 100 µm, no dimple d = 100 µm, Via = 200 µm, dimple ~ 5µm 29

31 Cu-filled Thermal Vias: Thermal Simulations 3D-Scan: Dimples in thermal vias 3D-Scan of the surface Profile: Depth of dimple: 4 8 µm 30

32 Cu-filled Thermal Vias: Thermal Simulations Results: Different via geometries Version Vias, Via = 100 µm Version Vias, Via = 200 µm 31

33 Cu-filled Thermal Vias: Thermal Simulations Results: Different via geometries Kein dimple mm mm 2 mm 2 C K/W Mit dimple Version 25 Version 26 Version Vias, Via = 150 µm 35 Vias, Via = 100 µm 20 Vias, Via = 200 µm 32

34 Conclusion Thermal management on PCBs is becoming more and more important for power electronic applications There are different possibilities to reduce the thermal resistance of a PCB (material, length of thermal path, build-up.) There are many different PCB-technologies to optimize thermal management The cavity board approach shows excellent thermal performance, if applicable for the application Thermal performance of the cavity board approach could be shown by thermal measurements and simulations Thermal simulation were used to optimize the via design of substrate boards with Cu-filled vias 33

35 AT&S Well Positioned for the Future Thank you for your attention!

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