APPLICATIONS TYPICAL APPLICATION. LTC1623 SMBus Dual High Side Switch Controller DESCRIPTION FEATURES

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1 SMBus Dual High Side Switch Controller FEATRES SMBus and I C Compatible Built-In Charge Pumps Drive N-Channel Switches 1 Available Switches on the Same Bus.V V IL and 1.V V IH for and Available in -Lead MSOP and S Packages Low Standby Current: 1µA Eight Addresses from Two Three-State Address Pins Internal Power-On Reset Timer Internal ndervoltage Lockout No Need for External Pull-p Resistors at Output No Need for Secondary Power Source APPLICATIONS Computer Peripheral Control Laptop Computer Power Plane Switching Portable Equipment Power Control Industrial Control Systems Handheld Equipment DESCRIPTION The LTC 13 SMBus switch controller is a slave device that controls two high-side N-channel MOSFETs on either the SMBus or the I C bus. The LTC13 operates with an input voltage from.7v to.v with a low standby current of 1µA (at 3.3V). In accordance with the SMBus specification, the LTC13 maintains the.v V IL and 1.V V IH input thresholds throughout the supply voltage range. sing the -wire interface, and, the LTC13 monitors the bus for a start condition ( going from high to low while is high). Once detected, the LTC13 compares its address with the first (address) byte sent over the bus from the master. If matched, the LTC13 will execute the second (command) byte from the master and independently control the built-in charge pumps to drive two external switches. The LTC13 has two three-state programmable address pins, thus allowing eight different addresses and a total of sixteen available switches on the same bus., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATION.7V TO.V Gate Drive Voltage 1µF * 1 1 T J = C (FROM SMBus) (PROGRAMMABLE) GA GB LTC13 AD GND Q1 LO Q LOAD GATE VOLTAGE (V) 1 * SILICONIX Si9Q 13 TA1 1 3 SPPLY VOLTAGE (V) 13 G1 1

2 ABSOLTE MAXIMM RATINGS W W W (Voltages Referred to GND Pin) Input Supply Voltage ( )....3V to V, (Bus Pins 1, )....3V to V AD, (Address Pins 3, )....3V to ( +.3V) GA,GB (Gate Drive Pins, 7)....3V to ( + 7V) Junction Temperature... 1 C Operating Temperature Range LTC13C... to 7 C LTC13I... C to C Storage Temperature Range... C to 1 C Lead Temperature (Soldering, 1 sec)... 3 C PACKAGE/ORDER INFORMATION 1 AD 3 GND TOP VIEW 7 GA GB MS PACKAGE -LEAD PLASTIC MSOP T JMAX = 1 C, θ JA = 1 C/ W Consult factory for Military grade parts. W ORDER PART NMBER LTC13CMS MS PART MARKING LTCH 1 AD 3 GND TOP VIEW 7 S PACKAGE -LEAD PLASTIC SO T JMAX = 1 C, θ JA = 11 C/ W GA GB ORDER PART NMBER LTC13CS LTC13IS S PART MARKING 13 13I ELECTRICAL CHARACTERISTICS T A = C, = V unless otherwise specified. C GA = 1pF, C GB = 1pF SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS Operating Supply Voltage Range.7. V I VCC Supply Current Charge Pump Off, AD and High or Low, =.7V 1 3 µa and High = 3.3V 1 3 µa = V 17 3 µa I VCC Supply Current GA or GB High (Command Byte 1 or 1) 1 µa Both GA and GB High (Command Byte 11) 1 µa V GS Gate Voltage Above Supply =.7V.7. 7 V = 3.3V.. 7 V =.V.. 7 V V VLO ndervoltage Lockout Falling Edge (Note1) 1... V t POR Power-On Reset Delay Time =.7V (Note) 3 1 µs =.V 3 1 µs f OSC Charge Pump Oscillator Frequency 3 khz (Note 3) t ON Turn-On Time into 1pF =.7V (From ON to GA, GB = + 1V) (Note ) 17 µs =.V (From ON to GA, GB = + V) (Note ) 1 µs t OFF Turn-Off Time into 1pF =.7V (From OFF to GA, GB = 1mV) (Note ) 17 µs =.V (From OFF to GA, GB = 1mV) (Note ) 1 µs V IL / Input Low Voltage =.7V to.v. V V IH / Input High Voltage =.7V to.v 1. V

3 ELECTRICAL CHARACTERISTICS LTC13 T A = C, = V unless otherwise specified. C GA = 1pF, C GB = 1pF SYMBOL PARAMETER CONDITIONS MIN TYP MAX NITS V IL AD and Input Low Voltage =.7V to.v. V V IH AD and Input High Voltage =.7V to.v. V V OL Data Output Low Voltage =.7 to.v, I PLLP = 3µA.. V C IN Input Capacitance pf (,, AD, ) I IN Input Leakage Current (, ) ±1 µa Input Leakage Current(AD, ) ± na SMBus Related Specs (Note ) f SMB SMBus Operating Frequency 1 1 khz t SSTA Start Condition Setup Time.7 µs t BF Bus Free Time Between Stop and Start.7 µs t HDSTA Start Condition Hold Time. µs t SSTP Stop Condition Setup Time. µs t HDDAT Data Hold Time 3 ns t SDAT Data Setup Time ns t LOW Clock Low Period.7 µs t HIGH Clock High Period. µs t f Clock /Data Fall Time 3 ns t r Clock/Data Rise Time 1 ns I PLLP Current Through External Pull-p (Data Pull-Down Current Capacity) 1 3 µa Resistor on Pin =.7V to.v The denotes the specifications which apply over the full operating temperature range. Note 1: Approximately 3% hysteresis is provided to ensure stable operation and eliminate false triggering by minor glitches. Note : Measured from > V VLO to SMBus ready for data input. Note 3: The oscillator frequency is not tested directly but is inferred from turn-on time. Note : ON is enabled upon receiving the Stop condition from the SMBus master. Note : OFF is enabled upon receiving the Stop condition from the SMBus master. Note : SMBus timing specs are guaranteed but not tested. PIN FNCTIONS : (Pin 1) Open-Drain Connected Serial Data Interface. Must be pulled high to with external resistor. The pull-up current must be limited to 3µA. : (Pin ) Serial Clock Interface. Must be pulled high to with external resistor. The pull-up current must be limited to 3µA. AD: (Pin 3) Lower Three-State Programmable Address Pin. Must be connected directly to, GND, or / (using two resistors 1M). Do not float this pin. GND: (Pin ) Ground. : (Pin ) Higher Three-State Programmable Address Pin. Must be connected directly to, GND, or / (using two resistors 1M). Do not float this pin. GB: (Pin ) Gate Drive to External High-Side Switch. Fully enhanced by internal charge pump. Controlled by nd LSB of command byte. GA: (Pin 7) Gate Drive to External High-Side Switch. Fully enhanced by internal charge pump. Controlled by LSB of command byte. : (Pin ) Input Supply Voltage. Range from.7v to.v. 3

4 TYPICAL PERFORMANCE CHARACTERISTICS W 3 3 Standby Current Supply Current =.7V 3 STANDBY CRRENT (µa) 1 1 = V =.7V SPPLY CRRENT (µa) BOTH CHANNELS ON ONE CHANNEL ON 1 13 G 1 13 G Supply Current = V 3 Supply Current = V 3 SPPLY CRRENT (µa) BOTH CHANNELS ON ONE CHANNEL ON SPPLY CRRENT (µa) BOTH CHANNELS ON ONE CHANNEL ON 1 13 G G ton (µs) t ON vs Temperature 3 3 =.7V 1 =.V G toff (µs) t OFF vs Temperature 1 =.7V =.V G7

5 TYPICAL PERFORMANCE CHARACTERISTICS W OTPT VOLTAGE (V) GA, GB Output Voltage = V 1 13 G V OL (mv) V OL vs Temperature = V I PLLP = 3µA G9 7 V GS vs Temperature 1 Gate Drive Current =.V = V = V V gs (V) 3 = 3.3V =.7V GATE CRRENT (µa) 1 1 = 3.3V =.7V GATE VOLTAGE ABOVE SPPLY (V GS ) 13 G1 13 G11

6 W W TI I G DIAGRA t HDSTA t HIGH t r t f t SSTP t SSTA t HDDAT t LOW t SDAT START STOP 13 TD1 F CTIO AL BLOCK DIAGRA W START- AND-STOP DETECTORS ACK V NDER- VOLTAGE LOCKOT POWER-ON RESET PORB 1 INPT BFFER SHIFT REGISTER GLE LOGIC OTPT LATCHES REGLATING CHARGE PMPS 7 GA GB INPT BFFER CONTER AD 3 ADDRESS DECODER ADDRESS COMPARATOR 13 BD

7 OPERATIO SMBus Operation SMBus is a serial bus interface that uses only two bus lines, and, to control low power peripheral devices in portable equipment. It consists of masters, also known as hosts, and slave devices. The master of the SMBus is always the one to initiate communications to its slave devices by varying the status of the and lines. The SMBus specification establishes a set of protocols that devices on the bus must follow during communications. The protocol that the LTC13 uses is the Send Byte Protocol. In this protocol, the master first sends out a Start signal by switching the line from high to low while is high. (Because there may be more than one master on the same bus, an arbitration process takes place if two masters attempt to take control of the line simultaneously; the first master that outputs a one while the other master is zero loses the arbitration and becomes a slave itself.) pon detecting this Start signal, all slave devices on the bus wake up and get ready to shift in the next byte of data. The master then sends out the first byte. The first seven bits of this byte consist of the address of the device that the master wishes to communicate with. The last bit indicates whether the command will be a read (logic one) or write (logic zero). Because the LTC13 is a slave device that can only be written to by a master, it will ignore the ensuing commands of the master if it wants to read from the LTC13, even if the address sent by the master matches that of the LTC13. After reception of the first byte, the slave device (LTC13) with the matching address then acknowledges the master by pulling the data line low before the rising edge of the ninth clock cycle. By now, all other nonmatching slave devices will have gone back to their original standby states to wait for the next start signal. Meanwhile, upon receiving the acknowledge from the matching slave, the master then sends out the command byte. In the case of the LTC13, the two LSBs of this second byte from the master are the signals controlling the status of the external switches; a digital one turns on the charge pump to drive up the output gate voltage while a digital zero shuts down the charge pump and discharges the output gate voltage to zero. After receiving the command byte, the slave device (LTC13) needs to again acknowledge the master by pulling the line low on the following clock cycle. The master then ends this Send Byte Protocol by sending the Stop signal, which is a transition from low to high on the line while the line is high. Valid data is shifted into the output latch on the last acknowledge signal; the external switch will not be enabled, however, until the Stop signal is detected. This double-buffering feature allows the user to daisy-chain several differently addressed SMBus devices such that their output executions are synchronous to the Stop signal even though valid data were loaded into their output latches at different times. Figure 1 shows an example of this special protocol. If somehow either the Start or the Stop signal is detected in the middle of a byte, the slave device (LTC13) will regard this as an error and reject all previous data. Other than the Stop and Start conditions, must be stable during high; can change state only during low. START ADD1 A COMMAND A START ADD A COMMAND A START ADD3 A COMMAND A STOP Figure 1. Daisy-Chaining Multiple SMBus Devices 13 F1 Example of Send Byte Protocol to Slave Address 111 Turning GA and GB On START ACK 1 1 ACK STOP (PROGRAMMABLE) (WRITE) (GB ON)(GA ON) ADDRESS BYTE COMMAND BYTE 13 TD 7

8 OPERATIO Address The LTC13 has an address of 111XXX; the four MSBs are hard-wired, but the 3 LSBs are programmed by the user with the help of two three-state address pins. Refer to Table 1 for the pin configurations and their corresponding addresses. To conserve standby current, it is preferable to tie the address pins to either or GND. If more than four addresses are needed, then either one of the address pins can be tied to the third state of / by using two equal value resistors ( 1M) shown in Figure. Do not connect both address pins to the / state simultaneously because this is not a valid address. Table 1. Address Pin Truth Table AD ADDRESS GND GND 111 GND / 1111 GND 1111 / GND / / NSED / 1111 GND / CLOCK 1 GA 7 LTC13 3 AD GB GND 1M 1M LO LOAD Charge Pump To fully enhance the external N-channel switches, an internal charge pump is used to boost the output gate drive to a minimum of.7v and a maximum of V above, depending on itself. The reason for the maximum output voltage limit is to avoid switch gate source breakdown due to excessive gate overdrive. A feedback network is used to limit the charge pump output to V above. Because the output will only need to drive the gate of the external switch by charging and discharging the parasitic gate capacitances, the internal charge pump, clocked by an approximately 3KHz oscillator, is appropriately sized to source less than 1µA. Power-On Reset and ndervoltage Lockout The LTC13 starts up with both gate drives low. An internal power-on reset (POR) signal inhibits operation until about 3µs after crosses the undervoltage lockout threshold (typically V). The circuit includes some hysteresis and delay to avoid nuisance resets. Once operation begins, must drop below the threshold for at least 1µs to trigger another POR sequence. During standby, when both gate drive outputs are disabled, quiescent current is kept to a minimum (13µA typical) because only the VLO block is active. Input Threshold Anticipating the trend toward lower supply voltages, the SMBus is specified with a V IH of 1.V and a V IL of.v. While some SMBus parts may violate this stringent SMBus specification by allowing a higher V IH value for a correspondingly higher input supply voltage, the LTC13 meets and maintains the constant SMBus input threshold specification across the entire supply voltage range of.7v to.v. Figure. LTC13 Programmed with Address F

9 APPLICATIONS INFORMATION W To avoid turning on the external power MOSFETs too quickly, an internal resistor has been placed in series with each of the output gate drive pins (see Functional Block Diagram). Therefore, it only needs an external.1µf capacitor to create enough RC delay (.1µF = 1ms) to slow down the ramp rate of the output gate drive. In other words, it will take a minimum of 1ms to charge up the external MOSFET. An additional external resistor between the.1µf capacitor and the gate of the MOSFET (Figure 3) is required to eliminate possible MOSFET self oscillations. For active-low applications in which the load needs to be on upon power-up, an external P-channel switch can be used (Figure 3). This load can be switched off later after the proper protocol has been sent. sed with the LT 131, the LTC13 makes a 3.3V/3A extremely low voltage drop regulator (Figures and ). In this application, the other output channel can be used to drive a separate load, or it can also be used to control the output of the LDO so that the user has total control over the switching in and switching out of the LDO (Figure ). Also, with the help of the LT13-, the LTC13 can be used to make a boost switching regulator with a low standby current of µa (Figure ). 3.V TO.V.7V TO.V 1µF (FROM SMBus) 1µF (PROGRAMMABLE) GA LTC13 GB AD GND.1µF DISPLAY Q1 Si3DV.1µF FAN Q Si33DQ 13 F3 (FROM SMBus) (PROGRAMMABLE) GA LTC13 AD GB GND.1µF 1 3 LT131 Ω 1pF 3.3k Si3DV + V OT 3.3V 7µF V LOAD Si3DV 13 F Figure 3. Dual Load Switch with Q On upon Power-p Figure. 3.3V/3A Extremely Low Voltage Drop Regulator and Load Switch 1µF (FROM SMBus) (PROGRAMMABLE) 3.V TO.V GA LTC13 AD GB GND 1 3 LT131.1µF Ω 1pF Si3DV 3.3k 13 TA3 Si3DV Figure. SMBus Controlled Low Dropout Regulator + V OT 3.3V 7µF V SWITCHED V OT 3.3V 1µF (FROM SMBus) (PROGRAMMABLE) *SMIDA CD- +.7V TO.V GA LTC13 AD GND 1µF GB 99k k.1µf Figure. Switching Regulator with Low-Battery Detect sing µa Standby Current 3 7 SHDN Si3DV µh* LT13-1N17 LBO + LOAD V ma µf Si3DV 13 F 9

10 PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. MS Package -Lead Plastic MSOP (LTC DWG # --1).11 ±.* (3. ±.1) 7.19 ±. (. ±.1).11 ±.** (3. ±.1) (.1).1 ±. (.3 ±.1) TYP SEATING PLANE. ±. (1. ±.1).1 (.3) REF. (.) TYP.3 ±. (. ±.1) * DIMENSION DOES NOT INCLDE MOLD FLASH, PROTRSIONS OR GATE BRRS. MOLD FLASH, PROTRSIONS OR GATE BRRS SHALL NOT EXCEED." (.1mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH OR PROTRSIONS. INTERLEAD FLASH OR PROTRSIONS SHALL NOT EXCEED." (.1mm) PER SIDE. ±. (.1 ±.1) MSOP (MS)

11 PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. S Package -Lead Plastic Small Outline (Narrow.1) (LTC DWG # --11) * (.1.) 7.. ( ).1.17** ( ) (.3.).1. (..) TYP.3.9 ( )..1 (.11.) *DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED." (.1mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED.1" (.mm) PER SIDE.1.19 (.3.3). (1.7) TYP SO 99 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11

12 TYPICAL APPLICATIONS Single Slot PCMCIA 3.3V/V Switch V 1µF *1/ Si9DQ GA LTC13 AD GB GND.1µF.1µF 3.3V Q1 Si3DY Q* Q3* 1µF TO PC CARD V/3.3V/V 13 TA LTC13 Driving Both High Side and Low Side Switches V EXT (3V MAX).7V TO.V LOW SIDE LOAD 1µF (FROM SMBus) (PROGRAMMABLE) GA LTC13 GB AD GND.1µF Si9DQ.1µF HIGH SIDE LOAD Si9DQ 13 TA RELATED PARTS PART NMBER DESCRIPTION COMMENTS LTC113/LTC11 Single High Side Micropower MOSFET Drivers Circuit Breaker with Auto Reset LTC11/LTC1 Dual High Side Micropower MOSFET Drivers Latch-Off Current Limit LTC113 Triple 1.V to V High Side MOSFET Driver Three MOSFET Drivers in -Lead SO Package LT13 Micropower DC/DC Converter Low-Battery Detector Active in Shutdown LTC173 Dual PowerPath TM Switch Matrix Current Limit with Timer LTC179 PowerPath Controller for Dual Battery Systems Complete Smart Battery Controller PowerPath is a trademark of Linear Technology Corporation. 1 Linear Technology Corporation 13 McCarthy Blvd., Milpitas, CA ()3-19 FAX: () f LT/TP 9 K PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 1997