Chapter 1 Design Concepts. Fundamentals of DIGITAL LOGIC with VHDL design. Chapter 2 Introduction to Logic Circuits. 2.1 Variables and Functions

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1 Fundamentals o DIGITA OGIC with VHD design Chapter Design Concepts tephen Brown and Zvonko Vranesic McGraw-Hill, 2 Read as introduction lides prepared b P.J. Bakkes (2) (Edited in June 23) 2 Chapter 2 Introduction to ogic Circuits Digital versus analog circuits Binar logic (Ar. Binêre logika) witches or, ON or OFF, HIGH or OW 2. Variables and Functions Reerence igure 2. Controlled switches Input variable controls a switch ogic epression e.g. () = describes the output as a unction o the input variable I =, = and light is o I =, = and light is on 3 4 = = Batter ight (a) Two states o a switch (a) imple connection to a batter (b) mbol or a switch Power suppl (b) Using a ground connection as the return path Figure 2. A binar switch 5 Figure 2.2 A light controlled b a switch 6

2 Other unctions Reerence igure 2.3 and 2.4 AND (Ar. EN): (,2) = 2 OR (Ar. OF): (,2) = + 2 Other: (,2,3) = ( + 2) 3 Power suppl (a) The logical AND unction (series connection) Power suppl 2 ight ight 2 (b) The logical OR unction (parallel connection) 7 Figure 2.3 Two basic unctions Inversion (Ar. Inversie) Power suppl 2 3 ight () = () =! () = not I =, = I =, = Figure 2.4 A series-parallel connection 9 Power suppl R 2.3 Truth tables (Ar. Waarheidstabelle) Reerence igures 2.6 and 2.7 Alternative description o a logic unction or combinatorial circuits Figure 2.5 An inverting circuit 2 2

3 Figure 2.6 A truth table or AND and OR 3 Figure 2.7 Three-input AND and OR ogic gates and networks (Ar. ogiese hekke en netwerke) n 2 n The three basic unctions (AND, OR and NOT) can be combined to orm logic unctions o an compleit. The can be represented b smbols (Ar. imbole) (igure 2.8) A combination o these smbols in a drawing is called a circuit diagram or a schematic (Ar. troombaandiagram). Figure 2.9. arger circuit uses a network o gates (a) AND gates 2 n (b) OR gates n 5 Figure 2.8 The basic gates (c) NOT gate 6 2 = ( + ) Analsis o a ogic Network Analsis (Ar. analise) Determine the unction o an eisting circuit nthesis (Ar. sintese) Create a new circuit or an application (main task o an engineer!) Optimiation is important Reerence igure 2.a Figure 2.9 An OR-AND unction 7 8 3

4 2 (a) Network that implements = + 2 (, ) 2 2 A B Timing diagram (Ar. tddiagram) Reerence igure 2.b ogic variables can change rapidl with time (up to GH) (b) Truth table or Figure 2. a ogic network A B (c) Timing diagram Time 2 g Functional equivalent networks Reerence igure 2.d Function g is unctionall equivalent to, but timing, cost, etc. can be dierent. Optimiation o unctions (later). (d) Network that implements g = + 2 Figure 2. b ogic network Boolean Algebra In 849 George Boole deined an algebraic description o processes involved in thought and reasoning. In the late 93 s hannon applied this to logic circuits. Boolean algebra developed into a powerul tool to describe logic circuits. Aioms o Boolean Algebra = + = = + = = = + = + = I =, then = I =, then =

5 ingle variable theorems Dualit = + = = + = = + = = + = = Replace all s with s, all s with s, all AND s with OR s and all OR s with AND s More later Two and three variable properties Commutative = + = + Associative ( ) = ( ) +(+) = (+)+ Distributive (+) = + +( ) = (+) (+) Absorption + = (+) = Combining + = (+) (+ ) = + = + ( + ) = DeMorgan s Theorem ( ) = + (+) = Net page: prove b perect induction 29 Figure 2. Proo o DeMorgan s theorem 3 5

6 Appling identities (a) Constant (b) Constant ee eamples 2. and 2.2 (c) Variable (d) (e) () + 3 (g) (h) + 32 Figure 2.2 The Venn diagram representation (a) (d) (b) + (e) + (c) ( + ) () Figure 2.3 Veriication o the distributive propert 34 Figure 2.4 Veriication o + + = Alternative Notation Precedence o Operators AND: OR: NOT, AND and then OR

7 2.6 nthesis using AND, OR and NOT gates nthesis: generate a circuit that implements a unction rom speciications. imple eample: 37 Figure 2.5 A unction to be snthesied 38 Eample 2 Reerence igure 2.5 and 2.6 Concept o sum-o-products impli epression using theorems (,2) = = = = ( + ) 2 + (2 + 2) = (a) Canonical sum-o-products (b) Minimal-cost realiation 39 Figure 2.6 Two implementations o a unction um-o-products and Product-o-ums Introduce more ormal terms Minterm: or a unction o n variables, a product term in which each o the n variables appears once, is called a minterm. um-o-products orm: A unction can be represented b an epression that is a logical sum o sum o the minterms. ee igure 2.7 Figure 2.7 Three-variable Minterms and Materms

8 Another eample ee igure 2.8 and 2.9 (,2,3) = This orm is not minimal, but can be reduced to: = Alternative orms: = 3 (m,m4,m5,m6) = 3 m(,4,5,6) Figure 2.8 A three-variable unction Materms (a) A minimal sum-o-products realiation In stead o considering rows in the truth table or which =, it is also possible to snthesie considering where =. This implies using the dualit principle. Uses materms, which are the complements o minterms. (b) A minimal product-o-sums realiation Figure 2.9 Two realiations o a unction Product-o-sums orm ee igure 2.5 = m2 = 2 From DeMorgan: = = ( 2 ) = + 2 Thus = m2 = M2 (materm) Another eample ee igure 2.8 = m + m2 + m3 + m7 = (m + m2 + m3 + m7) = m m2 m3 m7 (demorgan) = M M2 M3 M7 = (+2+3) (+2 +3) (+2 +3 ) ( ) (product-o-sums) = J(M,M2,M3,M7) = JM(,2,3,7)

9 2.7 Design eamples Design process: peciication o solution to a problem in words Formal speciication with truth table nthesis Implementation Testing Possible iteration 2.7. Three-wa light control Three doors in room each with switch One or three on switches must turn light on ee truth table in igure 2.2 = m + m2 + m4 + m7 or = M M3 M5 M6 ee igure 2.2. For implementation (a) um-o-products realiation Figure 2.2 Truth table or a three-wa light controller 5 Figure 2.2 OP implementation o the three-wa light controller Multipleer Circuit Circuit oten used in digital and computer designs witches one o multiple sources o data to a single destination ee igure 2.22 (b) Product-o-sums realiation Figure 2.2 PO implementation o the three-wa light controller

10 s 2 (s,, 2 ) (a) Truth table s 2 (c) Graphical smbol s 2 (b) Circuit s (s,, 2 ) 2 (d) More compact truth-table representation 2.8 Introduction to CAD tools ecturers comment: Read onl at this stage 2.8. Design Entr Truth table (igure 2.23) chematic entr (igure 2.24) Hardware description languages (HD) nthesis Functional simulation Figure 2.22 Multipleer Figure 2.23 creen capture o the Waveorm Editor 57 Figure 2.24 creen capture o the Graphic Editor 58 Design conception Truth table DEIGN ENTRY chematic capture VHD 2.9 Introduction to VHD imple snthesis (see section 2.8.2) Merge INITIA YNTHEI TOO Boolean equations Functional simulation No Design correct? Yes Translation IEEE standard 64 Used or the algorithmic description o digital circuits Used or snthesis and simulation ee igures 2.27 to 2.3 ogic snthesis, phsical design, timing simulation (see section 4.2) 59 Figure 2.25 The irst stages o a CAD sstem 6

11 2 3 Figure 2.26 A simple logic unction and corresponding VHD code 6 Figure 2.3 VHD code or a our-input unction g 4 Figure 2. 3 ogic circuit or our-input unction 63