HCPL3700 AC/DC to Logic Interface Optocoupler

Transcription

1 HCPL37 AC/DC to Logic Interface Optocoupler Features AC or DC input Programmable sense voltage Logic level compatibility Threshold guaranteed over temperature ( C to 7 C) Optoplanar construction for high common mode immunity UL recognized (file # E97) VDE certified ordering option V, e.g., HCPL37V Applications Low voltage detection 5 V to 24 V AC/DC voltage sensing Relay contact monitor Current sensing Microprocessor Interface Industrial controls August 28 Description The HCPL-37 voltage/current threshold detection optocoupler consists of an AlGaAs LED connected to a threshold sensing input buffer IC which are optically coupled to a high gain darlington output. The input buffer chip is capable of controlling threshold levels over a wide range of input voltages with a single resistor. The output is TTL and CMOS compatible. Schematics Package Outlines AC 8 V CC DC+ 2 7 NC 8 DC- 3 6 V O AC 4 5 GND 8 8 AC/DC POWER R X HCPL-37 LOGIC TRUTH TABLE (Positive Logic) Input Output H L L H GND GND 2 A.µF bypass capacitor must be connected between pins 8 and 5. HCPL37 Rev...3

2 Absolute Maximum Ratings (No derating required up to 7 C) Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Value Units EMITTER T STG Storage Temperature -55 to +25 C T OPR Operating Temperature -4 to +85 C T SOL Lead Solder Temperature 26 for sec C DETECTOR I IN Input Current Average 5 (Max.) ma Surge, 3ms, 2Hz Pulse Rate 4 (Max.) Transient, µs, 2Hz Pulse Rate 5 (Max.) V IN Input Voltage (Pins 2-3) -.5 (Max.) V P IN Input Power Dissipation () 23 (Max.) mw P T Total Package Power Dissipation (2) 35 (Max.) mw I O Output Current (Average) (3) 3 (Max.) ma V CC Supply Voltage (Pins 8-5) -.5 to 2 V V O Output Voltage (Pins 6-5) -.5 to 2 V P O Output Power Dissipation (4) 2 (Max.) mw Notes:. Derate linearly above 7 C free-air temperature at a rate of.8 mw/ C. 2. Derate linearly above 7 C free-air temperature at a rate of 2.5 mw/ C. 3. Derate linearly above 7 C free-air temperature at a rate of.6 ma/ C. 4. Derate linearly above 7 C free-air temperature at a rate of.9 mw/ C. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Min. Max. Units V CC Supply Voltage 2 8 V T A Operating Temperature 7 C f Operating Frequency 4 khz HCPL37 Rev...3 2

3 Electrical Characteristics (T A = C to 7 C Unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. Max. Unit I TH+ Input Threshold Current V IN = V TH+, V CC = 4.5 V ma I TH- V O =.4 V, I O 4.2mA (5) ma V TH+ Input Threshold Voltage DC (Pins 2,3) V IN = V 2 V 3 (Pins & 4 Open) V CC = 4.5 V, V O =.4V (5) I O 4.2mA V V TH- V TH+ AC (Pins,4) V TH- V IN = V 2 - V 3 (Pins & 4 Open) V CC = 4.5 V, V O = 2.4 V (5) I O µa V IN = V V 4 (Pins 2 & 3 Open) V CC = 4.5 V, V O =.4 V (5) I O 4.2 ma V IN = V - V 4 (Pins 2 & 3 Open) V CC = 4.5 V, V O = 2.4 V (5) I O µa V V V I HYS Hysteresis I HYS = I TH+ I TH-.2 ma V HYS V HYS = V TH+ V TH-.3 V V IHC Input Clamp Voltage V IHC = V 2 - V 3, V 3 = GND I IN = ma, Pins & 4 connected to Pin V V IHC2 V IHC2 = V V 4, I IN = ma (Pins 2 & 3 Open) V V IHC3 V IHC3 = V 2 V 3, V 3 = GND, V I IN = 5mA (Pins & 4 Open) V ILC V ILC = V 2 V 3, V 3 = GND, -.75 V I IN = -ma I IN Input Current V IN = V 2 V 3 = 5.V ma (Pins & 4 Open) V D,2 Bridge Diode I IN = 3mA.65 V V D3,4 Forward Voltage I IN = 3mA.65 V V OL Logic LOW Output Voltage V CC = 4.5 V, I OL = 4.2mA (5).4.4 V I OH Logic HIGH Output Current V OH = V CC = 8V (5) µa I CCL Logic LOW Supply Current V 2 V 3 = 5.V, V O = Open,. 4 ma V CC = 5V I CCH Logic HIGH Supply Current V CC = 8V, V O = Open. 4 µa C IN Input Capacitance f = MHz, V IN = V (Pins 2 & 3, Pins & 4 Open) 5 pf Note: 5. Logic LOW output level at pin 6 occurs when V IN V TH+ and when V IN > V TH- once V IN exceeds V TH+. Logic HIGH output level at pin 6 occurs when V IN V TH- and when V IN < V TH+ once V IN decreases below V TH-. HCPL37 Rev...3 3

4 Switching Characteristics (T A = 25 C, V CC = 5 V Unless otherwise specified) Symbol AC Characteristics Test Conditions Min. Typ. Max. Unit T PHL Propagation Delay Time R L = 4.7kΩ, C L = 3pF (6) 6. 5 µs (to Output Low Level) T PLH Propagation Delay Time R L = 4.7kΩ, C L = 3pF (6) µs (to Output High Level) t r Output Rise Time ( 9%) R L = 4.7kΩ, C L = 3pF 45 µs t f Output Fall Time (9 %) R L = 4.7kΩ, C L = 3pF.5 µs CM H Common Mode Transient Immunity (at Output High Level) I IN = ma, R L = 4.7kΩ, V O min = 2. V, V CM = 4V (7)(8) 4 V/µs CM L Common Mode Transient Immunity (at Output Low Level) I N = 3.mA, R L = 4.7kΩ, 6 V/µs V O max =.8V, V CM = 4V (7)(8) Package Characteristics (T A = C to 7 C Unless otherwise specified) Symbol Characteristics Test Conditions Min. Typ. Max. Unit V ISO Withstand Insulation Voltage Relative humidity < 5%, T A = 25 C, t = min, I I-O 2µA (9)() 25 V RMS R I-O Resistance (input to output) V IO = 5Vdc (9) 2 Ω C I-O Capacitance (input to output) f = MHz, V IO = Vdc.6 pf Notes: 6. T PHL propagation delay is measured from the 2.5V level of the leading edge of a 5.V input pulse (µs rise time) to the.5 V level on the leading edge of the output pulse. T PLH propagation delay is measured on the trailing edges of the input and output pulse. (Refer to Fig. 9) 7. Common mode transient immunity in logic high level is the maximum tolerable (positive) dv cm /dt on the leading edge of the common mode pulse signal V CM, to assure that the output will remain in a logic high state (i.e., V O > 2. V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dv cm /dt on the trailing edge of the common mode pulse signal, V CM, to assure that the output will remain in a logic low state (i.e., V O <.8 V). Refer to Fig.. 8. In applications where dv cm /dt may exceed 5, V/µs (Such as static discharge), a series resistor, R CC, should be included to protect the detector chip from destructive surge currents. The recommended value for R CC is 24V per volt of allowable drop in V CC (between pin 8 and V CC ) with a minimum value of 24Ω. 9. Device is considered a two terminal device: Pins, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.. The 25 V RMS / min. capability is validated by a 3. kv RMS / sec. dielectric voltage withstand test.. AC voltage is instantaneous voltage for V TH+ & V TH-. 2. All typicals at T A = 25 C, V CC = 5V unless otherwise specified. HCPL37 Rev...3 4

5 T P PROPAGATION DELAY (µs) Tr RISE TIME (µs) Tf FALL TIME (µs) V TH (DC) VOLTAGE THRESHOLD (V) I TH (DC) CURRENT THRESHOLD (ma) I CCL LOGIC LOW SUPPLY CURRENT (ma) Typical Performance Curves IIN INPUT CURRENT (ma) Fig. Logic Low Supply Current vs. Operating Supply Voltage V CC OPERATING SUPPLY VOLTAGE (V) Fig. 3 Input Current/Low Level Output Voltage vs. Temperature I IN V IN = 5. V (PINS 2 and 3) V CC = 5. V V OL V CC = 5. V I OL = 4.2 ma T A TEMPERATURE ( C) VOL (mv) IIN INPUT CURRENT (ma) Fig. 2 Input Current vs. Input Voltage DC (Pins,2 shorted together pins 3,4 shorted together) V IN INPUT VOLTAGE (V) DC (Pins & 4 Open) AC (pins 2 & 3 Open) Fig. 4 Current Threshold/Voltage Threshold vs. Temperature ITH+ VTH+ VTH- ITH T A TEMPERATURE ( C) Fig. 5 Propagation Delay vs. Temperature Fig. 6 Rise and Fall Time vs. Temperature Tf T PLH T PHL Tr T A TEMPERATURE ( C) T A TEMPERATURE ( C). HCPL37 Rev...3 5

6 I CCH LOGIC HIGH SUPPLY CURRENT (na) V+/V- EXTERNAL THRESHOLD VOLTAGE (V) Typical Performance Curves (Continued) Fig. 7 Logic High Supply Current vs. Temperature VCC = 8V V O = OPEN I IN = ma T A TEMPERATURE ( C) Fig. 8 External Threshold Characteristics V+/V- vs. Rx 3 25 V- (AC) 2 V+ (AC) V+ (DC) V- (DC) R X EXTERNAL SERIES RESISTOR (kω) HCPL37 Rev...3 6

7 Test Circuits Pulse Generator tr = 5ns Z O= 5Ω AC DC+ DC- AC VCC VO GND 5 VIN Pulse Amplitude = 5V Pulse Width = ms f = Hz T r = T f =.µs (% 9%).µF bypass R L +5V Output (V O) Input (V IN) Output (V O) 9% Fig. 9. Switching Test Circuit tr t PHL t PLH % % t f 9% 5V 2.5V V V O.5 V V OL VC I IN AC VCC 8 R CC* +5V VC A B 2 3 DC+ DC- VO 7 6.µF bypass RL Output (V O) VCM 5V V FF 4 AC GND 5 V + - CM Pulse Gen C L** * SEE NOTE 8 VO Switching Pos. (A) I IN = ma V O (Min) 5V ** C L IS 3 pf, WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE VO V O (Max) Switching Pos. (B) I IN = 3. ma V Fig.. Test Circuit for Common Mode Transient Immunity and Typical Waveforms HCPL37 Rev...3 7

8 Package Dimensions Through Hole SEATING PLANE.2 (5.8).4 (3.55).22 (.56).6 (.4) Surface Mount (9.9).37 (9.4).39 (9.9).37 (9.4) 3 2. (2.54) TYP PIN ID..27 (6.86).25 (6.35).7 (.78).45 (.4).54 (3.9).2 (3.5) PIN ID..2 (.5) MIN.6 (.4).8 (.2) 5 MAX.3 (7.62) TYP.4" Lead Spacing SEATING PLANE.2 (5.8).4 (3.55).22 (.56).6 (.4) (9.9).37 (9.4). (2.54) TYP PIN ID. 8-Pin DIP Land Pattern.27 (6.86).25 (6.35).7 (.78).45 (.4).54 (3.9).2 (3.5).4 (.) MIN.6 (.4).8 (.2).7 (.78) to 5.4 (.6) TYP.27 (6.86).25 (6.35).6 (.52) (.78).45 (.4).3 (7.62) TYP.45 (.54).295 (7.49). (2.54).3 (.76).2 (.5) MIN.6 (.4).8 (.2).22 (.56).6 (.4). (2.54) TYP Lead Coplanarity :.4 (.) MAX.45 (.4).35 (8.) MIN.45 (.3) MAX. Note: All dimensions are in inches (millimeters) HCPL37 Rev...3 8

9 Ordering Information Option Example Part Number Description No Suffix HCPL37 Shipped in Tubes S HCPL37S Surface Mount Lead Bend SD HCPL37SD Surface Mount; Tape and Reel W HCPL37W.4" Lead Spacing V HCPL37V VDE884 WV HCPL37WV VDE884;.4 Lead Spacing SV HCPL37SV VDE884; Surface Mount SDV HCPL37SDV VDE884; Surface Mount; Tape and Reel Marking Information 37 V XX YY T Definitions Fairchild logo 2 Device number VDE mark (Note: Only appears on parts ordered with VDE 3 option See order entry table) 4 Two digit year code, e.g., 7 5 Two digit work week ranging from to 53 6 Assembly package code HCPL37 Rev...3 9

10 Carrier Tape Specifications Reflow Profile 2. ±. 4.9 ±.2 4. ±..3 ±.5 4. ±. 3.2 ±.2. MAX.3 ±.2 User Direction of Feed Note: All dimensions are in inches (millimeters) Ø.55 ±.5.75 ±. 7.5 ±. 6. ±.3.3 ±.2 Ø.6 ±. Temperature ( C) C, 3 s 225 C peak Time above 83C, 6 5 sec Ramp up = 3C/sec Time (Minute) Peak reflow temperature: 225C (package surface temperature) Time of temperature higher than 83C for 6 5 seconds One time soldering reflow is recommended HCPL37 Rev...3

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