SERVICE MANUAL VHF FM TRANSCEIVER

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1 SRVI MANUAL VHF FM TRANSIVR

2 INTRODUTION This service manual describes the latest service information for the I-V000 VHF FM TRANSIVR at the time of publication. VRSION Asia.S.America U.S.A. SYMOL SA SA SA- USA- USA- SUPPLID MIROPHON HM-N HM-TN HM-V HM-TAN To upgrade quality, any electrical or mechanical parts and internal circuits are subject to change without notice or obligation. DANGR NVR connect the transceiver to an A outlet or to a D power supply that uses more than V. This will ruin the transceiver. DO NOT expose the transceiver to rain, snow or any liquids. DO NOT reverse the polarities of the power supply when connecting the transceiver. DO NOT apply an RF signal of more than 0 dm (00mW) to the antenna connector. This could damage the transceiver's front end. ORDRING PARTS e sure to include the following four points when ordering replacement parts:. 0-digit order numbers. omponent part number and name. quipment model name and unit name. Quantity required <SAMPL ORDR> S.I TAFN I-V000 MAIN UNIT pieces Screw Icom screw I-V000 hassis 0 pieces Addresses are provided on the inside back cover for your convenience. RPAIR NOTS. Make sure a problem is internal before disassembling the transceiver.. DO NOT open the transceiver until the transceiver is disconnected from its power source.. DO NOT force any of the variable components. Turn them slowly and smoothly.. DO NOT short any circuits or electronic parts. An insulated turning tool MUST be used for all adjustments.. DO NOT keep power ON for a long time when the transceiver is defective.. DO NOT transmit power into a signal generator or a sweep generator.. ALWAYS connect a 0 d to 0 d attenuator between the transceiver and a deviation meter or spectrum analyzer when using such test equipment.. RAD the instructions of test equipment thoroughly before connecting equipment to the transceiver.

3 TAL OF ONTNTS STION SPIFIATIONS STION INSID VIWS STION DISASSMLY AND OPTION INSTRUTIONS STION IRUIT DSRIPTION - RIVR IRUITS TRANSMITTR IRUITS PLL IRUITS POWR SUPPLY IRUITS PORT ALLOATIONS STION PARTS LIST STION MHANIAL PARTS AND DISASSMLY - I-V HM-V STION SMI-ONDUTOR INFORMATION STION OARD LAYOUTS - HM-V LOGI OARD MAIN UNIT STION LOK DIAGRAM STION 0 VOLTAG DIAGRAM 0- MAIN UNIT LOGI OARD HM-V

4 STION SPIFIATIONS GNRAL Frequency coverage : Usable temperature range Dimensions (projections not included) Weight Version [USA] [SA] [SA] Receiving Receive MHz* Transmit MHz MHz* MHz* *Specifications Guaranteed: MHz only Type of emission : FM (FD / F) Frequency stability : ± 0 ppm ( 0 to +0 ; + F to +0 F) Tuning steps :, 0,.,, 0,, 0 or 0 khz Antnna connector : - (0 Ω) Power supply requirement :. V D (Operable voltage range:. to. V) (negative ground) Number of memory channel : 0 channels (including scan edges and call channel) all channel : channel Scanning mode : Full, Program, Priority, Memory, hannel, Skip, Tone, DTS, ank and WX urrent drain (approx.) : High ( W) A Transmit Middle High ( W).0 A Middle Low (0 W).0 A Low ( W).0 A Max. audio Stand-by.0 A 0. A : 0 to +0 ; + F to +0 F : 0(W) 0(H) 0(D) mm; (W) (H) (D) in. :.0 kg;. oz.;. oz TRANSMITTR RF output power (at. V D) : W / W / 0 W / W (High / Middle High / Middle Low / Low) Modulation system : Variable reactance frequency modulation Maximum frequency deviation : Narrow: ±. khz*; Wide: ±.0 khz Spurious emissions : Less than 0 d Microphone connector : -pins modular (00 Ω) RIVR Receive system : Double conversion superheterodyne system Intermediate frequencies : st. MHz nd 0 khz Sensitivity : 0. µv at d SINAD (typical) Squelch sensitivity : 0.0 µv at threshold (typical) Selectivity : Narrow; More than ±.0 khz at d, Less than ±.0 khz at d* Wide; More than ±.0 khz at d, Less than ±.0 khz at 0 d Spurious and image rejection : 0 d (typical) Audio output power (at. V D) : More than.0 W at 0% distortion with an Ω load xt. speaker connector : -conductor.(d) mm ( )/ Ω *[USA] version only All stated specifications are subject to change without notice or obligation. -

5 STION INSID VIWS MAIN UNIT AF power amplifier (Q: RD0HVF) Antenna switching circuit (D, D: XA0, D: XA0, D: HVUTRF) VO circuit nd IF filter (FI: FWS0F, FI: FWS0HT) Reference oscillator (X: R-) st IF filter (FI, FI: FL-0) LOGI OARD System clock (X: R-) PU (I: HDH) Speaker PROM (I: HNXTI) Reset I (I: S-0ANMP-DD) LOGI board -

6 STION DISASSMLY AND OPTION INSTRUTIONS RMOVING TH OVR Unscrew screws, MP0. Remove the cover in the direction of the arrow. RMOVING TH MAIN UNIT Unscrew screws, MP, and screws, MP, and screws, MP. Unsolder points, A, to remove the antenna connector. Remove the Main unit in the direction of the arrow. over MP0 MP MP MP MP A J Main unit hassis RMOVING TH FRONT PANL Unscrew screws, MP. Unplug J to separate front panel and chassis. Remove the front panel in the direction of the arrow. Unplug J to separate fan and chassis. Unscrew screws, MP, to separate MP and chassis. OPTIONAL UNIT INSTALLATION Install the optional unit as illustrated below. Insert it tightly to avoid bad contact. J (MF) MP MP J (SP) Front panel hassis MP -

7 STION IRUIT DSRIPTION - RIVR IRUITS -- ANTNNA SWITHING IRUIT (MAIN UNIT) Received signals passed through the low-pass filter (L, L, L, L, 0,, 0, 0, 0,, ). The filtered signals are applied to the / λ type antenna switching circuit (D, D). The antenna swtiching circuit functions as a low-pass filter while transmitting. However, its impedance becomes very high while D and D are turn ON. Thus transmit signals are blocked from entering the receiver circuits. The antenna switching circuit employs a / λ type diode swtiching system. The passed signals are then applied to the RF amplifier circuit. The signals from the RF circuit are mixed at the st mixer (Q) with a st LO signal coming from the VO circuit to produce a.0 MHz st IF signal. The st IF signal is applied to two crystal filters (FI and FI) to suppress out-of-band signals. The filtered st IF signal is applied to the IF amplifier (Q), then applied to the nd mixer circuit (I, pin ). -- ND IF AND DMODULATOR IRUITS (MAIN UNIT) The nd mixer circuit converts the st IF signal to a nd IF signal. A double conversion superheterodyne system (which converts receive signal twice) improves the image rejection ratio and obtain stable receiver gain. -- RF IRUIT (MAIN UNIT) The RF circuit amplifies signals within the range of frequency coverage and filters out-of-band signals. The signals from the antenna switching circuit are applied to the limitter (D), and are then passed through the bandpass filter (D, L,, ). The filtered signals are amplified at the RF amplifier (Q), then applied to the st mixer circuit after out-of-band signals are suppressed at the bandpass filter (D D). D D, D employ varactor diodes that track the bandpass filters and are controlled by the T T signals from the D/A convertor (I, pins 0,, ). These diodes tune the center frequency of an RF passband for wide bandwidth receiving and good image response rejection. -- ST MIXR AND ST IF IRUITS (MAIN UNIT) The st mixer circuit converts the received signal to a fixed frequency of the st IF signal with a PLL output frequency. y changing the PLL frequency, only the desired frequency will pass through two crystal filters at the next stage of the st mixer. ND IF AND DMODULATOR IRUITS R R R The st IF signal from the IF amplifier is applied to the nd mixer section of the FM IF I (I, pin ), and is mixed with the nd LO signal to be converted to a 0 khz nd IF signal. The FM IF I contains the nd mixer, limiter amplifier, quadrature detector and active filter circuits. A. MHz nd LO signal is produced at the PLL circuit. The nd IF signal from the nd mixer (I, pin ) passes through a ceramic filter (FI; When wide is selected, F; When Narrow is selected. (Narrow is [USA] version only.)) to remove unwanted heterodyned frequencies. It is then amplified at the limiter amplifier (I, pin ) and applied to the quadrature detector (I, pins 0, ) to demodulate the nd IF signal into AF signals. -- AF IRUIT (MAIN AND LOGI UNITS) The AF amplifier circuit amplifies the demodulated AF signals to drive a speaker. AF signals from the FM IF I (I, pin ) are applied to the analog swtich (LOGI UNIT; I, pin ) via the high pass filter (Ic, pins, ). The output signals from pin are applied to the volume adjustment pot (LOGI UNIT; R). The signals are applied to the AF power amplifier (I, pin ) after passing through the AFmute swtich (Q). nd IF filter 0 khz FI LPF PLL I I "SQLIN" signal from the D/A convertor (I, pin AF signal "" R Active filter FM detector 0 Noise detector Limiter amp. R Noise comp. RSSI Mixer X. MHz I TAF st IF from the IF amplifier (Q) "NOIS" signal to the PU pin 0 0 X R RV "" signal to the PU pin -

8 The AF signals are applied to the AF power amplifier circuit (I, pin ) to obtain the specified audio level. The amplified AF signals, output from pin, are applied to the internal speaker (HASSIS UNIT; SP) via the speaker jack (J) when no plug is connected to the external speaker jack (J). -- SQULH IRUIT (MAIN AND LOGI UNITS) A squelch circuit cuts out AF signals when no RF signals are received. y detecting noise components in the AF signals, the squelch switches the analog swtich. A portion of the AF signals from the FM IF I (I, pin ) are applied to the D/A converter (I, pin ) as the signal. The signals from the D/A converter (I, pin ) are applied to the FM IF I active filter section (I, pin ) where noise components are amplified and detected with an internal noise detector via the SQLIN line. The trigger circuit converts the detected signals to a HIGH or LOW signal and applies this (from pin ) to the PU (LOGI UNIT; I, pin ) as the NOIS signal.the PU controls the analog swtich I (LOGI UNIT; I) via the expander I (LOGI UNIT; I). When the PU receives a HIGH level NOIS signal, the PU controls the RMUT line to cut the AF signals at the analog swtich I (LOGI UNIT; I). At the same time, the AFON line controls the AF mute circuit (Q) to cut out the VOLOUT signal for the AF power amplifier (I). - TRANSMITTR IRUITS -- MIROPHON AMPLIFIR IRUIT (LOGI AND MAIN UNITS) The microphone amplifier circuit amplifies audio signals with + d/octave pre-emphasis from the microphone to a level needed for the modulation circuit. The AF signals from the microphone pass through the MI switch (I, D) and high-pass filter (Ia, pin ), and are then applied to the microphone amplifier circuit (Id, pin ) via the R and for + d/octave pre-emphasis. The amplified AF signals are applied to the analog swtich (I, pin ), and are then applied to the D/A converter (MAIN UNIT; I, pin ) via the signal. The AF signals are applied to the modulator circuit via the MOD signal. -- MODULATION IRUIT (MAIN UNIT) The modulation circuit modulates the VO oscillating signal (RF signal) using the microphone audio signals. The audio signals (SHIFT) change the reactance of D to modulate an oscillated signal at the VO (Q, D). The oscillated signal is amplified at the LO (Q) and buffer (Q) amplifiers, then applied to the TX/RX switch circuit (D, D). -- DRIV/POWR AMPLIFIR IRUITS (MAIN UNIT) The signal from the VO circuit passes through the TX/RX swtiching circuit (D) and is amplified at the pre-drive (Q), drive (Q, Q0) and power (Q) amplifiers to obtain W of RF power (at. V D/typical). The amplified signal passes through the low-pass filter (L, L,,,,,, ), and then applied to the antenna swtiching circuit (D). The signal is applied to the antenna connector (HASSIS UNIT; J) after being passed through the low-pass filter (L, L, L, L, 0,, 0, 0, 0,, ). The bias current of the drive (Q, Q0) and power (Q) amplifiers is controlled by the AP circuit to stabilize the output power. -- AP IRUIT (MAIN UNIT) The AP (Automatic Power ontrol) circuit (Ia, Q) protects drive and power amplifiers from excessive currents and selects HIGH or LOW output power. The output voltage from the power detector circuit (D, D) is applied to the differential amplifier (Ia, pin ), and the T signal from the D/A converter (I, pin ) is applied to the other input for reference. When the driving current increases, the input voltage of the differential amplifier (Ia, pin ) will be increased. In such cases, the differential amplifier output voltage (pin ) is decreased to reduce the drive current. Q is controlled by the TX signal from the expander I (I, pin ) to select HIGH or LOW output power. AP IRUIT HV SWHV RF signal from PLL I (I) Q Driver amp. Q0 Driver amp. Q Power amp. ANT SW L, 0,,, LPF to antenna +V D D TX T Q Ia + Power detector circuit (D, D) AP control circuit -

9 - PLL IRUITS -- PLL IRUIT (MAIN AND LOGI UNITS) A PLL circuit provides stable oscillation of the transmit frequency and receive st LO frequency. The PLL output compares the phase of the divided VO frequency to the reference frequency. The PLL output frequency is controlled by the divided ratio (N-data) of a programmable divider. An oscillated signal from the TX and RX-VO circuits passes through the LO and buffer amplifiers (Q, Q) is applied to the PLL I (I, pin ) and is prescaled in the PLL I based on the divided ratio (N-data). The reference signal is generated at the reference oscillator (X) and is also applied to the PLL I. The PLL I detects the out-of-step phase using the reference frequency and outputs it from pin. The output signal is passed through the loop filter(q) and is then applied to the TX and RX-VO circuits as lock voltage. The lock voltage is also used for the receiver tunable bandpass filters to match the filter s center frequency to the desired receive frequency. The lock voltage is passed through the loop filter (Q), and then applied to the D amplifier (Q0). The amplified signal is applied to the PU (LOGI unit; I, pin ) via the signal. The signal is analyzed at the PU, and then applied to bandpass filters (D D, D) as T, T, T signals via the D/A converter. -- VO IRUIT (MAIN UNIT) The VO circuit contains a separate TX-VO (Q, D, D) and RX-VO (Q, D). The oscillated signal is amplified at the LO (Q) and buffer (Q) amplifiers, and is then Tx/Rx switching circuit (D, D). Then Tx and Rx signals are applied to the pre-driver (Q) and st mixer circuit (Q) respectively. - POWR SUPPLY IRUITS VOLTAG LIN LIN HV SWHV V +V +V T RV DSRIPTION The voltage from the power supply. The same voltage as HV line which is controlled by the HVSW circuit (Q, Q0, Q). When the [POWR] switch is pushed, the PU outputs the control signal via the expander I (I). The signal is applied to the HVSW circuit to turn the circuit ON. The output voltage is applied to the drive amplifier (Q), +V regulator circuit (I), etc. ommon V for the PU converted from the HV line by the V regulator circuit (I). The circuit outputs the voltage regardless of the power ON/OFF condition. The output voltage is applied to the PROM (LOGI UNIT; I), PU (LOGI UNIT; I), etc. ommon V converted from the. V line by the +V regulator circuit (I). The output voltage is applied to the LO (Q) and buffer (Q) amplifiers, etc. ommon V converted from the + V line by the +V regulator circuit (Q, Q). Transmit V controlled by the TV regulator circuit (Q, Q) using the TX signal from the I/O expander I (I). Receive V controlled by the RV regulator circuit (Q) using RX signal from the I/O expander I (I). The output voltage is applied to the FM I I (I), IF (Q) and RF (Q) amplifiers, etc. A portion of the signal from LO amplifier (Q) is amplified at the buffer amplifier (Q) and is then fed back to the PLL I (I, pin ) as the comparison signal. PLL IRUIT Loop filter Q TX VO Q, D, D RX VO Q, D LO Q I (PLL I) Q uff. Q uff. D D TX/RX switch to transmitter circuit to st mixer circuit (Q) X. MHz Phase Programable Prescaler detector divider Reference divider Shift register PLLK PLLDATA PLLST. MHz nd LO signal to the nd IF I (I, pin ) -

10 - PORT ALLOATIONS -- PU (LOGI UNIT: I) Pin number Port name Description Input port for the weather alert signal detection. Pin number Port name SK Description Outputs PROM (LOGI unit; I, pin ) clock signal. RST SHIFT SK PTT LIN LOUT NOIS Input port for reset signal. Outputs reference oscillator for the PU control signal. Outputs serial clock signal to the expander I (MAIN unit; I, pin ), D/A convertor I (MAIN unit, I, pin ), etc. Outputs serial signals to the D/A convertor I (MAIN unit; I, pin ),etc. Input port for the [PTT] switch. High : While [PTT] switch is pushed. Input port for the cloning signal. Outputs the cloning signal. Input port for noise signals (pulse type). 0 A SG SG T TON SQLV MIUD I/O port for the data signals from/to the PROM (LOGI unit; I, pin ). Output LD driver signals. Outputs TSS and DTS tone signal. Outputs DTMF, P and 0 Hz tone signal. Input port for the squelch level detection. Input port for the microphone up/down signal while connecting the microphone. Input port for the RSSI detection. Input port for the PLL lock voltage. 0 OLOR DIM DIM0 Outputs LD back light color control signal. Low : While choosing umber color. Outputs LD contrast control signal. 00 TMP Input port for the power detector voltage. Input port for the transceiver s internal tempareture detection. RMO Input port for the remote signals from a remote microphone (HM-V) via the [MI] jack. Input port for PLL unlock signal from the PLL I (MAIN unit; I, pin ). OM OM Outputs LD common signals. KR KR0 Input port for initial matrix. Low : While keys are pushing. 0 XTMI Input port for the remote control microphone (HM-V) connecting detection. Low : While HM-V is connected. OPV Input port for the optional unit detection signal. PLLST Outputs strobe signals to the PLL I (I, pin ). PLLK Outputs PLL I (I, pin ) clock signal. XST OPV Outputs strobe signal to the expander I (I, pin ). Input port for the optional unit detection signal. OPT OPT I/O port for optional unit control signal. DUS Outputs low-pass filter cut-off frequency control signal when DTS is activated. -

11 -- D/A ONVRTOR I (MAIN UNIT: I) Pin number 0, Port name MOD SQLATT T T, T SQLIN DT F Description Outputs transmit devetion control signal. Outputs attenuator control signal. Outputs tunable bandpass filter control signal while receiving. Outputs TX power control signal while transmitting. Output tunable bandpass filter control signals. Outputs squelch control signal. Outputs DTS s gradient control signal. Outputs reference frequency control signal to X. -- I/O XPANDR I (MAIN UNIT: I) Pin number Port name FAN FAN FAN Description Outputs cooling fan control signal. The fan speed is depended as shown below. Fan speed Hi Middle Low FAN H H H FAN H L H FAN H H L AFMUT SHIFT RX TX Outputs AF mute circuit control signal. High : While AF mute is ON. Outputs TX and RX VO s regulator control signals. High : While receiving. Low : While transmitting. Outputs R regulator control signal. Low : While receiving. Outputs TX power control signal. High : While transmitting. -

12 STION PARTS LIST [LOGI OARD] RF I 0000 S.I TASF (TR) I S.I TSF (TR) I 0000 S.I NJM0V-T I 0000 S.I S-0ANMP-DD-T I 0000 S.I HNXTI I S.I U0FV- I S.I HDH (FX-0A) I 0000 S.I U0FV- Q Q Q Q Q Q Q Q Q Q ORDR DSRIPTION 0000 S.TRANSISTOR S-GR (TR) S.TRANSISTOR DTUA T S.TRANSISTOR XP0 (TX) S.TRANSISTOR DTUA T S.TRANSISTOR DTTU T S.TRANSISTOR SAA T0R 0000 S.TRANSISTOR S-GR (TR) 0000 S.TRANSISTOR S-GR (TR) S.TRANSISTOR DTUA T S.TRANSISTOR S-GR (TR) D 0000 S.ZNR MA0-M (TX) D 0000 S.DIOD MAS-(TX) D 0000 S.ZNR MA0-M (TX) D S.DIOD DANTL D S.DIOD DA TL D S.DIOD DANTL D S.DIOD DANTL D S.DIOD DANTL D 0000 S.DIOD MAS-(TX) [SA], [USA] only D 0000 S.DIOD MAS-(TX) [USA] only D S.DIOD DANTL D S.DIOD DANTL D 0000 S.DIOD MAS-(TX) [SA] only D 0000 S.DIOD MAS-(TX) [SA] only D 0000 S.DIOD MAS-(TX) X S.XTAL R- (.00 MHz) R S.RSISTOR RJGYF V ( kω) R S.RSISTOR RJKF 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R 0000 S.RSISTOR RAYKD V R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R 0000 VARIAL VU-FAF0 (0K) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V ( kω) R 0000 VARIAL VU-FAF0 A (0KA) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) [LOGI OARD] RF ORDR DSRIPTION R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ V (. kω) R S.ARRAY X-VV 0JV R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ 00 V (0 Ω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (. MΩ) R S.RSISTOR RJGYJ 0 V ( kω) [USA] only R S.RSISTOR RJGYJ 0 V ( kω) [SA], [SA] only R S.RSISTOR RJGYJ R0 V ( Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 Ω) R S.ARRAY X-VV 0JV R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V ( kω) [SA], [SA] S.RSISTOR RJGYJ V ( kω) [USA] R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V ( kω) [USA] only R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V ( kω) S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.=Surface mount -

13 [LOGI OARD] RF ORDR DSRIPTION S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A 0000 S.LTROLYTI VA00SR S.RAMI 0 J 0K-T-N S.RAMI 0 J H K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 J H 0K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 J H K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 J H K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 H H J-T-A S.RAMI 0 J H K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J H K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VA00SR S.RAMI 0 J 0K-T-N S.RAMI 0 J 0K-T-N S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H K-T-A 0000 S.LTROLYTI VHARSR S.RAMI 0 J H K-T-A 0000 S.RAMI 0 H H J-T-A S.RAMI 0 J H K-T-A 0000 S.LTROLYTI VHARSR S.RAMI 0 J H 0K-T-A S.RAMI 0 H H J-T-A J 0000 ONNTOR 0- <AI> J 0000 ONNTOR - J 0000 ONNTOR - J 000 S.ONNTOR AXN00P DS S.LD S DS S.LD S DS S.LD S DS S.LD S DS S.LD S DS S.LD S DS S.LD S DS S.LD S DS S.LD SML-0MT T DS S.LD SML-0MT T DS S.LD SML-0MT T DS S.LD SML-0MT T DS S.LD SML-0MT T DS LD L-0TAM [LOGI OARD] RF ORDR DSRIPTION S NODR VQ-VNF0 SP 0000 SPAKR 0P00 <KS> WS 0000 FX0 P0LO P 000 S.AD MMZ0Y 0T P 000 S.AD MMZ0Y 0T P 000 S.AD MMZ0Y 0T P 000 S.AD MMZ0Y 0T P 000 S.AD MMZ0Y 0T P 000 S.AD MMZ0Y 0T P 000 S.AD MMZ0Y 0T P 000 S.AD MMZ0Y 0T P 000 LD ONTAT SRN-0-SP-N-W P0 000 P 0 [MAIN UNIT] RF ORDR DSRIPTION I 0000 S.I LV0V-TLM I S.I U0F-T I S.I TAFN (L) I S.I MFP-0 I 0000 S.I NJM0V-T I 0000 S.I TA0F (TL) I S.I TAL0F (TR) I I LAA Q 0000 S.TRANSISTOR S-L (TR) Q 0000 S.TRANSISTOR XP0 (TX) Q 0000 S.TRANSISTOR S-L (TR) Q 0000 S.TRANSISTOR S-L (TR) Q 0000 S.TRANSISTOR S-L (TR) Q 0000 S.TRANSISTOR S-T R Q 0000 S.TRANSISTOR S-T R Q S.TRANSISTOR DTAZU T0 Q 0000 S.TRANSISTOR S0--TL Q S.FT SK0--TL Q 0000 S.TRANSISTOR S0--TL Q 0000 S.TRANSISTOR S0--TL Q S.TRANSISTOR DTAUA T0 [USA] only Q S.TRANSISTOR SA (TR) Q 0000 S.TRANSISTOR S-L (TR) Q 0000 S.TRANSISTOR S0--TL Q S.TRANSISTOR S-T Q S.FT SK0 (TL) Q S.FT SK-(TX) Q S.FT SK0 (TL) Q S.TRANSISTOR DTZK T Q S.TRANSISTOR DTUA T0 Q 0000 FT RD0HVF Q S.TRANSISTOR DTZK T Q S.TRANSISTOR DTAUA T0 Q S.FT SK-(TX) Q 0000 S.TRANSISTOR S (TR) Q S.TRANSISTOR S- (TR) Q S.TRANSISTOR DTATU T0 Q 0000 S.TRANSISTOR DTZUA T0 Q 0000 S.TRANSISTOR S-L (TR) Q S.TRANSISTOR S T00 R Q 0000 S.TRANSISTOR S-L (TR) D 0000 S.DIOD MAS-(TX) D S.VARIAP HVTRF D S.VARIAP HVTRF D S.VARIAP HVTRF D S.VARIAP HVTRF D S.DIOD MA (TX) D S.DIOD MA (TX) D S.VARIAP HV0TRF S.=Surface mount -

14 [MAIN UNIT] RF ORDR DSRIPTION D S.VARIAP HV0TRF D S.VARIAP HV0TRF D DIOD XA0 D S.VARIAP HV0TRF D S.DIOD MA (TX) D S.DIOD SS T- D S.DIOD HVUTRF D S.DIOD MA (TX) D 0000 S.DIOD MAS-(TX) D DIOD XA0 D ZNR RD0 D DIOD DSAA D 0000 S.ZNR MA0-L (TX) D 0000 S.DIOD MAS-(TX) [USA] only D 0000 S.DIOD MAS-(TX) [USA] only D 0000 S.DIOD MAS-(TX) [USA] only D 0000 S.DIOD MAS-(TX) [USA] only D DIOD XA0 D S.DIOD MA (TX) D S.DIOD DA TL FI RAMI FWLA0KFFA-0 (FWS0F) FI RAMI FWLA0KHFA-0 (FWS0HT) [USA] only FI MONOLITH RA (FL-0) FI MONOLITH RA (FL-0) X S.XTAL R- (. MHz) X DISRIMINATOR DLA0KAY-0 L S.OIL MLF0D RK-T L S.OIL NL 0T-RJ L S.OIL LJF R0K-F L S.OIL 0-R0G L S.OIL A-NG-A L S.OIL LJF RK-F L S.OIL LJF RK-F L S.OIL LJF R0K-F L S.OIL LJR R0G-F L S.OIL LJR R0G-F L S.OIL LJR R0G-F L S.OIL LJR NG-F L S.OIL LJR NG-F L S.OIL LJR NG-F L S.OIL MLF0A RK-T L S.OIL LJR NG-F L S.OIL LJR R0G-F L S.OIL LJR NG-F L S.OIL LJR NG-F L S.OIL XLU L S.OIL NL 0T-RJ L S.OIL NL 0T-RJ L S.OIL XLU L S.OIL TL 0N L S.OIL TR.N L S.OIL 0-NG L S.OIL 0-NG L OIL X-LDR L OIL X-LDR L 0000 OIL LA- L S.OIL AS000-0N L S.OIL 0-R0G L S.OIL AS00-N L OIL LW- L S.OIL LJF RK-F L S.OIL TL N L S.OIL AS00-N L S.OIL 0.-.-TL N L S.OIL AS00-N L S.OIL AS00-N L S.OIL AS00-N L S.OIL NL 0T-RJ L S.OIL AS00-N L S.OIL NL 0T-RJ L S.OIL LJR NG-F R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) [MAIN UNIT] RF ORDR DSRIPTION R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 Ω) R 0000 S.THRMISTOR NTM0AGJ-T R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( MΩ) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 00 V (0 Ω) R S.RSISTOR RJGYJ 00 V (0 Ω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (. kω) [SA], [SA] S.RSISTOR RJGYJ V (. kω) [USA] R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR MR0ZHJ Ω (0) R S.RSISTOR MR0ZHJ 0 kω R S.RSISTOR RJRSJRU S.=Surface mount -

15 [MAIN UNIT] RF ORDR DSRIPTION R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR MR0JZHJ 0 Ω (00) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR MR0ZHJ. Ω (R) R S.RSISTOR RJGYJ V (. kω) R S.RSISTOR RJGYJ V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V ( kω) [USA] only R S.RSISTOR RJGYJ V ( kω) [USA] only R S.RSISTOR RJGYJ V ( kω) [USA] only R S.RSISTOR RJGYJ V ( kω) [USA] only R S.RSISTOR RJGYJ V ( kω) [USA] only R S.RSISTOR RJGYJ V ( kω) [USA] only R S.RSISTOR RJYJ0U (00 Ω) R S.RSISTOR RJRSJRU R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ V (. kω) [USA] only R S.RSISTOR RJGYJ V ( kω) [USA] only R S.RSISTOR RJGYJ V ( kω) [USA] only R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR MR0ZHJ Ω (0) R S.RSISTOR MR0ZHJ Ω (0) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 kω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V ( Ω) R S.RSISTOR RJGYJ V (0 Ω) R S.RSISTOR RJGYJ 0 V ( kω) [USA] only R S.RSISTOR RJGYJ 0 V (00 kω) [USA] only R S.RSISTOR RJGYJ 0 V (0 kω) R S.RSISTOR RJGYJ 0 V (00 Ω) R S.RSISTOR RJGYJ V ( kω) R S.RSISTOR RJGYJ 0 V ( kω) 0000 S.TANTALUM STVYR S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VHA00SR S.RAMI 0 J 0K-T-N S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.LTROLYTI VA0SP [MAIN UNIT] RF ORDR DSRIPTION 0000 S.TANTALUM TMSVA A 0M-L 0000 S.TANTALUM TMSV A M-R S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00D-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A 0000 S.TANTALUM STAYR S.RAMI 0 H H 00D-T-A S.RAMI 0 H H 00D-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00D-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0R-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0R-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00D-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00D-T-A 0000 S.LTROLYTI VA00SR S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VA00SR S.RAMI 0 J A 0M-T-A S.RAMI 0 H H J-T-A S.RAMI 0 H H J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0R-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.LTROLYTI VA0UP S.=Surface mount -

16 [MAIN UNIT] RF ORDR DSRIPTION S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VA0SP S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00-T-A 0000 S.LTROLYTI VA00SR S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VA0UP S.RAMI 0 H H 00J-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 J H 0K-T-A 0000 S.RAMI RFX H 0J D0L (GRM) S.RAMI 0 H H 00-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.RAMI RFX H 0J D0L (GRM) 0000 S.TANTALUM STX0R S.RAMI 0 J H 0K-T-A 0000 S.RAMI RFX H 0J D0L (GRM) S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VA0UP 0000 S.RAMI GRMMH0JV0L (GRM- H) S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.RAMI GRMMH0JV0L (GRM- H) S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VAUP 0000 S.RAMI GRMMH0JV0L (GRM- H) 0000 S.LTROLYTI VA00SR S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VHA00SR S.RAMI 0 H H 0J-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VHA00SR S.RAMI 0 J H 0K-T-A S.RAMI GRMMHR0YL (GRM- K) S.RAMI 0 H H 0J-T-A S.RAMI 0 J H K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VAUP S.RAMI 0 J 0K-T-A S.RAMI GRMMHR0YL (GRM- K) S.RAMI 0 H H 0J-T-A S.RAMI 0 J H 0K-T-A [MAIN UNIT] RF ORDR DSRIPTION S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 0J-T-A S.RAMI RFX H 0J D0L S.LTROLYTI VAAUP S.RAMI 0 J H 0K-T-A S.RAMI GRMMHR0YL (GRM- J) LTROLYTI MV 00 H S.RAMI GRMMH0JV0L (GRM- H) S.RAMI 0 J 0K-T-N S.RAMI GRMMH0JV0L (GRM- H) S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J H 0K-T-A 0000 S.LTROLYTI VA0SP S.RAMI 0 J 0K-T-N S.RAMI 0 J 0K-T-N 0000 S.RAMI GRMMH0JV0L (GRM- H) 0000 S.RAMI GRMMH0JV0L (GRM- H) S.RAMI 0 H H 00D-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-N S.RAMI GRMRJ0KY0L (GHM00 R) 0000 S.RAMI GRMMH0JV0L (GRM- H) 0000 S.RAMI GRMMH0JV0L (GRM- H) 0000 S.RAMI GRMMH0JV0L (GRM- H) S.LTROLYTI VA00SR [USA] only S.RAMI 0 J H 0K-T-A [USA] only S.RAMI 0 J 0K-T-N [USA] only S.RAMI 0 H H J-T-A S.RAMI 0 H H J-T-A S.RAMI 0 H H 00-T-A S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 J H 0K-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 J H 0K-T-A S.RAMI 0 H H 00D-T-A S.RAMI 0 J 0K-T-N S.RAMI 0 JF 0Z-T-A J 0000 ONNTOR 0- J 0000 ONNTOR 0- J 0000 ONNTOR PJ-000P- <AI> J 000 S.ONNTOR -ZR-SM-TF J 000 S.ONNTOR -ZR-SM-TF W S.JUMPR RJG JPW V [SA], [SA] only W S.JUMPR RJG JPW V [SA], [SA] only W S.JUMPR RJG JPW V W JUMPR RDST0 W AL OP- P 000 S.AD MMZ0Y 0T P 000 S.AD MMZ0Y 0T P 000 P 00 S.=Surface mount -

17 STION MHANIAL PARTS AND DISASSMLY - I-V000 [HASSIS PARTS] RF. ORDR DSRIPTION QTY. J 0000 onnector MR-DS-0 MF Fan DF00H MP hassis- MP Fan holder MP over MP 0000 Screw T M x NI-ZU (T) MP 0000 Screw T M x NI-ZU (T) MP 0000 Screw T M x NI-ZU (T) MP Screw H M. x MP 0000 Hex socket bolt M x 0 ZK MP Screw M. x ZK MP 000 Thermally sheet () MP 0000 Screw M x 0 ZK MP Shield plate MP 000 Rubber sheet (A) MP 000 Sheet (Z) [ASRIS] RF. ORDR DSRIPTION QTY. F Fuse (0A) M Microphone HM- A [SA-], [USA-] Microphone HM-TN A [SA] Microphone HM-N A [SA] Microphone HM-TAN A [USA-] W able OP- A MP Mobil bracket MP 000 Felt MP Flange bolt M x MP Screw A0 M x MP Flat washer M SUS MP Spring washer M SUS MP Screw M x (+/ ) MP Nut M SUS MP MI hanger [USA] only [LOGI OARD] RF. ORDR DSRIPTION QTY. DS L-0TAM F M* W MP S ncoder VQ-VNF0 SP 0000 Speaker 0P00 WS 0000 FX0 P0L0 MP P 000 LD contact SRN-0-SP-N-W MP Front panel MP LD filter MP Reflectort MP A-keyboard MP keyboard MP keyboard MP Front plate MP 0000 Knob N-- MP 000 Knob N- MP 0000 Screw 0 M x NI-ZU (T) [MAIN UNIT] MP Screw abbreviations MP MP MP MP MP *The illustration is the HM-V. A0, 0, T: Self-tapping NI-ZU: Nickel-Zinc ZK: lack SUS: Stainless RF. ORDR DSRIPTION QTY. W able OP- MP 0000 Heatsink MP VO case MP VO cover -

18 J () MP () MP () MP () MP () MP () MP () MP (L) LOGI unit MP (L) MP () MP (L) MF () MP (L) DS (L) P (L) MP (L) MP (L) MP (L) MP () MP () MP (L) MAIN unit MP () MP (L) MP () MP () W (M) SP (L) WS (L) MP () I (M) MP () MP (L) MP () MP (L) MP () MP () MP () MP () UNIT abbreviations (): HASSIS PARTS, (L): LOGI OARD, (M): MAIN UNIT MP0 () MP0 () -

19 - HM-V [HASSIS PARTS] RF. ORDR DSRIPTION QTY. W able OP- [MAIN UNIT] RF. ORDR DSRIPTION QTY. M Microphone M-0 MP 000 Front panel 000 Front panel (A) 000 Front panel () MP 000 Rear panel MP 000 PTT button MP 000 LD lens MP 000 SW rubber MP 000 Keyboard 000 Keyboard (A) 0000 Keyboard () MP 0000 Screw 0 M x ZK (T) MP 0000 Screw 0 M x ZK (T) Screw abbreviations 0, T: Self-tapping ZK: lack MAIN unit MP () MP () MP () MP () MP () MP () M (M) MP () MP () MP () W () HM-V UNIT abbreviations (): HASSIS PARTS (M): MAIN UNIT -

20 STION SMI-ONDUTOR INFORMATION TRANSISTOR AND FT S DIODS SA R (Symbol: FR) SA (Symbol: L) SA GR (Symbol: S0) S R (Symbol: AR) S L (Symbol: L0) SS (Symbol: Yellow line) yellow SS (Symbol: A) DA (Symbol: K) DAN (Symbol: N) DSAA (Symbol: ) green A A A S (Symbol: R) S L (Symbol: LL) S GR (Symbol: LG) S (Symbol: A) S R (Symbol: R) HV0 (Symbol: O) HV (Symbol: ) HV (Symbol: ) HVUTRF (Symbol: P) MAS (Symbol: A) S0 (Symbol: JT) S (L) (Symbol: -A) SK0 (Symbol: FJ) SK0 (Symbol: UW) SK0 (Symbol: U F) MAS (Symbol: ) MA (Symbol: MU) MA (Symbol: ) MA0M (Symbol: -) MA0 L (Symbol: -) S D G G S D G S D A SK (Symbol: K) DTA ZU (Symbol: ) DTA U (Symbol: ) DTA TUA (Symbol: ) DTA U (Symbol: ) MA0 M (Symbol: -) RD0 (Symbol: 0) XA0 (Symbol: T) XA0 (Symbol: None) G S G D K A DT ZK (Symbol: G) DT U (Symbol: ) DT ZU (Symbol: ) DT U (Symbol: ) DT TU (Symbol: 0) RD0HVF (Symbol: RD0HVF) D XP0 (Symbol: ) D S G G S -

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