Comparison Between a Digital Processor
|
|
- Deirdre Berry
- 7 years ago
- Views:
Transcription
1 A Platform-Based Comparison Between a Digital Signal Processor and a General-Purpose Processor from an Perspective 1, 1 Ole Olsen, 1 Peter Koch 2 Allan Federiksen, 3 Ole Wolf, 4 Rasmus Damsgaard Christiansen 1,,, 9220 Aalborg, Denmark, {kapokasa,oo,pk}@kom.auc.dk 2 Nokia Danmark A/S, Allan.Frederiksen@nokia.com 3 DSP Assist, wolf@dspassist.com 4 ETI A/S, rasmus@christiansen.dk (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
2 Contents Introduction Scenario Platforms Case Studies Results Conclusions Future Work Center for PersonKommunikation,
3 Introduction Platforms state-of of-the-art processors well suited for modern DSP applications. processors with DSP extensions. Motivation What would it happen if C was the only programming language available? Previous Work: A. Frederiksen,, R. Christiansen, J. Bier, and P. Koch. An Evaluation of Compiler-Processor Interaction for DSP Applications. BDTI. EEMBC ( Microprocessor Benchmarking Consortium). (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
4 Scenario Platform Comparison. Case Studies Analysis C Programs C55x ARM9E-S Platform Analysis Measurements Cycle Count Code Size Profiling Profiling Cycle Count Code Size / Evaluation Improvement Factors (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
5 Contents Introduction Scenario Platforms Summary of Architectures TMS320C55x ARM9E-S Case Studies Results Conclusions Future Work Center for PersonKommunikation,
6 Summary of architectures Feature/Platform C55x ARM9 Instructions/cycle up to 2 1 Numeric Representations Fixed-point Fixed-point Wordlength Intended Applications 16 applications that are DSP intensive 32 mixture of µ-controller and DSP performance Pipeline 7 stages 5 stages Register File Small and heterogeneous Large and homogeneous Instruction Set CISC RISC (ARM & Thumb) Orthogonality No Instruction length Variable (8-48 bits) Fixed (32 or 16 bits) Viterbi Support No MAC Dual MAC No Circular Buffering No Zero Overhead Looping Conditional Execution No Saturated Arithmetic (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
7 TMS320C55x Data Path C Bus D Bus B Bus (Coefficient) MAC-1 MAC-2 Shifter 40-Bit ALU 16-Bit ALU AC0 AC1 AC2 AC3 Three Address Generators DR0 DR1 C Y X DR2 DR3 Data Computation Unit (D unit) Address Data Flow Unit (A unit) AR0 AR1 AR2 AR3 AR4 AR5 AR6 AR7 CDP 5 Address Buses 24-bit (kapokasa@cpk.auc.dk),, Center for PersonKommunikation, Source: BDTI
8 ARM9 Data Path RDATA MAC 32-Bit ALU Shifter Register Bank Plus Program Counter WDATA ADDRESS Center for PersonKommunikation,
9 Contents Introduction Scenario Platforms Case Studies Characterization Code Types Program Size Description Results Conclusions Future Work Center for PersonKommunikation,
10 Characterization of Case Studies Case Study Type Size Matrix Functions DSP Kernel Dhrystone CVSD Control DSP Kernel Application Viterbi Control Kernel Domain Considered TYPE Control Grey Zone DSP HLL Kernel Application SIZE Center for PersonKommunikation,
11 Code Types Control Code Origin: Finite State Machines (FSM). Properties: Branch intensive.. Contains Switch / if-then then-else else constructs, many basic blocks. Control code is typically size-constrained rather than time- constrained. DSP Code Origin: mathematical transformations used in signal processing. Properties: inner loops, performing arithmetic intensive functions, i.e., a high instruction locality. The time-constrained parts of a DSP application are often DSP code. Grey zone Code In general, everything in between Control and DSP code. The term grey zone code is used about DSP code, which is not time-critical. I.e., functions with DSP code that are rarely executed. (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
12 Program Size HLL constructs: pointer addressing, function call, loop constructs Too small for relevant results. Kernels: FFT, FIR, LMS, small state machines Applications: CVSD, GSM EFR transcoder. Provide a realistic mixture of different code types. (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
13 Case Studies Description Examples from real life applications to synthetic benchmarks. Matrix Functions Autocorrelation Matrix.. (AC) Forward Substitution Vector. (FS) Dhrystone Mark (DM) Synthetic Benchmark,, by Reinhold P. Weicker. Version 2.1 released in Tries to reflect systems programming practice at that time. CVSD (Continuous Variable Slope Delta Modulation) (CE / CD) Used on the Bluetooth air interface. More robust than log PCM (Pulse Code Modulation). Encoding / decoding of a 64 ksamples/s signal. Viterbi (VD) Andrea Viterbi in Recover bit errors in sequences. It finds the most probable sequence of symbols from all the transitions in a state diagram. (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
14 Contents Introduction Scenario Platforms Case Studies Results C55x - ARM Comparison Cycle Count Code Size ARM Thumb Comparison Conclusions Future Work (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
15 C55x - ARM Comparison (Cycle Count) C55x supports complex addressing generation and parallel data transfer. ARM is a micro-controller controller showing best performance in control. C55x ARM9E-S Cycle Count Improvement factor % A C F S D M C E C D V D Experiment (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
16 C55x - ARM Comparison (Code Size) C55x supports variable length instruction word. CISC processors have an advantage over RISC. C55x ARM9E-S Code Size Improvement factor % A C F S D M C E C D V D Experiment (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
17 ARM Thumb Instruction Set Comparison (I) Thumb is a subset of ARM: Cycle count -> ~ 85% increase in cycle count Code Size -> ~ 25% reduction in code size Cycle Count Increase Code Size Decrease Percentage % Auto Forward Dhrystone CVSD CVSD Decode Viterbi Correlation Substitution Mark Encode Function Decoding Matrix Vector Function Experiment (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
18 ARM Thumb Instruction Set Comparison (II) Extensible to C55x: CS 25% ~ 20% CC 85% ~ 17% ARM Thumb ARM Thumb Cycle Count % Code Size % Original 90/10 80/20 70/30 60/40 50/50 Original 90/10 80/20 70/30 60/40 50/50 Partition Partition Percentage % CC CS Original 90/10 80/20 70/30 60/40 50/50 Partition (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
19 Conclusions Platform approach is relevant if C language should be the programming language. Compilers considered are not able to exploit advanced architectural features. Standard C extensions for DSP features (intrinsics( intrinsics) ) would be desirable. ARM9 compares favorably with C55x for the experiments performed. Thumb instruction set improves code density at the cost of an increase in cycle count. General purpose processors with DSP extensions are a viable alternative to DSP processors. (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
20 Future Work Apply GSM EFR to the ARM platform. Extend experiments to ADI s Blackfin Power Efficiency measurements and comparisons of the platforms. Students and Ph.D s are welcome. (kapokasa@cpk.auc.dk),, Center for PersonKommunikation,
ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-12: ARM
ADVANCED PROCESSOR ARCHITECTURES AND MEMORY ORGANISATION Lesson-12: ARM 1 The ARM architecture processors popular in Mobile phone systems 2 ARM Features ARM has 32-bit architecture but supports 16 bit
More informationChapter 2 Logic Gates and Introduction to Computer Architecture
Chapter 2 Logic Gates and Introduction to Computer Architecture 2.1 Introduction The basic components of an Integrated Circuit (IC) is logic gates which made of transistors, in digital system there are
More informationChapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language
Chapter 4 Register Transfer and Microoperations Section 4.1 Register Transfer Language Digital systems are composed of modules that are constructed from digital components, such as registers, decoders,
More informationGuidelines for Software Development Efficiency on the TMS320C6000 VelociTI Architecture
Guidelines for Software Development Efficiency on the TMS320C6000 VelociTI Architecture WHITE PAPER: SPRA434 Authors: Marie Silverthorn Leon Adams Richard Scales Digital Signal Processing Solutions April
More informationAdvanced Computer Architecture-CS501. Computer Systems Design and Architecture 2.1, 2.2, 3.2
Lecture Handout Computer Architecture Lecture No. 2 Reading Material Vincent P. Heuring&Harry F. Jordan Chapter 2,Chapter3 Computer Systems Design and Architecture 2.1, 2.2, 3.2 Summary 1) A taxonomy of
More informationPROBLEMS #20,R0,R1 #$3A,R2,R4
506 CHAPTER 8 PIPELINING (Corrisponde al cap. 11 - Introduzione al pipelining) PROBLEMS 8.1 Consider the following sequence of instructions Mul And #20,R0,R1 #3,R2,R3 #$3A,R2,R4 R0,R2,R5 In all instructions,
More informationArchitectures and Platforms
Hardware/Software Codesign Arch&Platf. - 1 Architectures and Platforms 1. Architecture Selection: The Basic Trade-Offs 2. General Purpose vs. Application-Specific Processors 3. Processor Specialisation
More information(Refer Slide Time: 00:01:16 min)
Digital Computer Organization Prof. P. K. Biswas Department of Electronic & Electrical Communication Engineering Indian Institute of Technology, Kharagpur Lecture No. # 04 CPU Design: Tirning & Control
More informationMICROPROCESSOR. Exclusive for IACE Students www.iace.co.in iacehyd.blogspot.in Ph: 9700077455/422 Page 1
MICROPROCESSOR A microprocessor incorporates the functions of a computer s central processing unit (CPU) on a single Integrated (IC), or at most a few integrated circuit. It is a multipurpose, programmable
More informationARM Architecture. ARM history. Why ARM? ARM Ltd. 1983 developed by Acorn computers. Computer Organization and Assembly Languages Yung-Yu Chuang
ARM history ARM Architecture Computer Organization and Assembly Languages g Yung-Yu Chuang 1983 developed by Acorn computers To replace 6502 in BBC computers 4-man VLSI design team Its simplicity it comes
More informationARM Microprocessor and ARM-Based Microcontrollers
ARM Microprocessor and ARM-Based Microcontrollers Nguatem William 24th May 2006 A Microcontroller-Based Embedded System Roadmap 1 Introduction ARM ARM Basics 2 ARM Extensions Thumb Jazelle NEON & DSP Enhancement
More informationLSN 2 Computer Processors
LSN 2 Computer Processors Department of Engineering Technology LSN 2 Computer Processors Microprocessors Design Instruction set Processor organization Processor performance Bandwidth Clock speed LSN 2
More informationEmbedded System Hardware - Processing (Part II)
12 Embedded System Hardware - Processing (Part II) Jian-Jia Chen (Slides are based on Peter Marwedel) Informatik 12 TU Dortmund Germany Springer, 2010 2014 年 11 月 11 日 These slides use Microsoft clip arts.
More informationCHAPTER 4 MARIE: An Introduction to a Simple Computer
CHAPTER 4 MARIE: An Introduction to a Simple Computer 4.1 Introduction 195 4.2 CPU Basics and Organization 195 4.2.1 The Registers 196 4.2.2 The ALU 197 4.2.3 The Control Unit 197 4.3 The Bus 197 4.4 Clocks
More informationwhat operations can it perform? how does it perform them? on what kind of data? where are instructions and data stored?
Inside the CPU how does the CPU work? what operations can it perform? how does it perform them? on what kind of data? where are instructions and data stored? some short, boring programs to illustrate the
More information8051 MICROCONTROLLER COURSE
8051 MICROCONTROLLER COURSE Objective: 1. Familiarization with different types of Microcontroller 2. To know 8051 microcontroller in detail 3. Programming and Interfacing 8051 microcontroller Prerequisites:
More informationCISC, RISC, and DSP Microprocessors
CISC, RISC, and DSP Microprocessors Douglas L. Jones ECE 497 Spring 2000 4/6/00 CISC, RISC, and DSP D.L. Jones 1 Outline Microprocessors circa 1984 RISC vs. CISC Microprocessors circa 1999 Perspective:
More informationMathematical Modelling of Computer Networks: Part II. Module 1: Network Coding
Mathematical Modelling of Computer Networks: Part II Module 1: Network Coding Lecture 3: Network coding and TCP 12th November 2013 Laila Daniel and Krishnan Narayanan Dept. of Computer Science, University
More informationInstruction Set Design
Instruction Set Design Instruction Set Architecture: to what purpose? ISA provides the level of abstraction between the software and the hardware One of the most important abstraction in CS It s narrow,
More informationThe AVR Microcontroller and C Compiler Co-Design Dr. Gaute Myklebust ATMEL Corporation ATMEL Development Center, Trondheim, Norway
The AVR Microcontroller and C Compiler Co-Design Dr. Gaute Myklebust ATMEL Corporation ATMEL Development Center, Trondheim, Norway Abstract High Level Languages (HLLs) are rapidly becoming the standard
More informationBDTI Solution Certification TM : Benchmarking H.264 Video Decoder Hardware/Software Solutions
Insight, Analysis, and Advice on Signal Processing Technology BDTI Solution Certification TM : Benchmarking H.264 Video Decoder Hardware/Software Solutions Steve Ammon Berkeley Design Technology, Inc.
More informationGSM/GPRS PHYSICAL LAYER ON SANDBLASTER DSP
GSM/GPRS PHYSICAL LAYER ON SANDBLASTER DSP Raghunath Kalavai, Murugappan Senthilvelan, Sitij Agrawal, Sanjay Jinturkar, John Glossner Sandbridge Technologies, 1 North Lexington Avenue, White Plains, NY
More informationChapter 2 Basic Structure of Computers. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan
Chapter 2 Basic Structure of Computers Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Outline Functional Units Basic Operational Concepts Bus Structures Software
More informationCentral Processing Unit (CPU)
Central Processing Unit (CPU) CPU is the heart and brain It interprets and executes machine level instructions Controls data transfer from/to Main Memory (MM) and CPU Detects any errors In the following
More informationSOFTWARE RADIO APPROACH FOR RE-CONFIGURABLE MULTI-STANDARD RADIOS
SOFTWARE RADIO APPROACH FOR RE-CONFIGURABLE MULTI-STANDARD RADIOS Jörg Brakensiek 1, Bernhard Oelkrug 1, Martin Bücker 1, Dirk Uffmann 1, A. Dröge 1, M. Darianian 1, Marius Otte 2 1 Nokia Research Center,
More informationInstruction Set Architecture (ISA)
Instruction Set Architecture (ISA) * Instruction set architecture of a machine fills the semantic gap between the user and the machine. * ISA serves as the starting point for the design of a new machine
More informationİSTANBUL AYDIN UNIVERSITY
İSTANBUL AYDIN UNIVERSITY FACULTY OF ENGİNEERİNG SOFTWARE ENGINEERING THE PROJECT OF THE INSTRUCTION SET COMPUTER ORGANIZATION GÖZDE ARAS B1205.090015 Instructor: Prof. Dr. HASAN HÜSEYİN BALIK DECEMBER
More informationComputer organization
Computer organization Computer design an application of digital logic design procedures Computer = processing unit + memory system Processing unit = control + datapath Control = finite state machine inputs
More informationComputer Architecture Lecture 2: Instruction Set Principles (Appendix A) Chih Wei Liu 劉 志 尉 National Chiao Tung University cwliu@twins.ee.nctu.edu.
Computer Architecture Lecture 2: Instruction Set Principles (Appendix A) Chih Wei Liu 劉 志 尉 National Chiao Tung University cwliu@twins.ee.nctu.edu.tw Review Computers in mid 50 s Hardware was expensive
More informationOverview. CISC Developments. RISC Designs. CISC Designs. VAX: Addressing Modes. Digital VAX
Overview CISC Developments Over Twenty Years Classic CISC design: Digital VAX VAXÕs RISC successor: PRISM/Alpha IntelÕs ubiquitous 80x86 architecture Ð 8086 through the Pentium Pro (P6) RJS 2/3/97 Philosophy
More informationCoding and decoding with convolutional codes. The Viterbi Algor
Coding and decoding with convolutional codes. The Viterbi Algorithm. 8 Block codes: main ideas Principles st point of view: infinite length block code nd point of view: convolutions Some examples Repetition
More informationInstruction Set Architecture
Instruction Set Architecture Consider x := y+z. (x, y, z are memory variables) 1-address instructions 2-address instructions LOAD y (r :=y) ADD y,z (y := y+z) ADD z (r:=r+z) MOVE x,y (x := y) STORE x (x:=r)
More information150127-Microprocessor & Assembly Language
Chapter 3 Z80 Microprocessor Architecture The Z 80 is one of the most talented 8 bit microprocessors, and many microprocessor-based systems are designed around the Z80. The Z80 microprocessor needs an
More informationThe ARM Architecture. With a focus on v7a and Cortex-A8
The ARM Architecture With a focus on v7a and Cortex-A8 1 Agenda Introduction to ARM Ltd ARM Processors Overview ARM v7a Architecture/Programmers Model Cortex-A8 Memory Management Cortex-A8 Pipeline 2 ARM
More informationProgramming Logic controllers
Programming Logic controllers Programmable Logic Controller (PLC) is a microprocessor based system that uses programmable memory to store instructions and implement functions such as logic, sequencing,
More informationComputer Organization and Architecture
Computer Organization and Architecture Chapter 11 Instruction Sets: Addressing Modes and Formats Instruction Set Design One goal of instruction set design is to minimize instruction length Another goal
More informationFLIX: Fast Relief for Performance-Hungry Embedded Applications
FLIX: Fast Relief for Performance-Hungry Embedded Applications Tensilica Inc. February 25 25 Tensilica, Inc. 25 Tensilica, Inc. ii Contents FLIX: Fast Relief for Performance-Hungry Embedded Applications...
More informationDigital Signal Controller Based Automatic Transfer Switch
Digital Signal Controller Based Automatic Transfer Switch by Venkat Anant Senior Staff Applications Engineer Freescale Semiconductor, Inc. Abstract: An automatic transfer switch (ATS) enables backup generators,
More informationLet s put together a Manual Processor
Lecture 14 Let s put together a Manual Processor Hardware Lecture 14 Slide 1 The processor Inside every computer there is at least one processor which can take an instruction, some operands and produce
More informationAn Introduction to the ARM 7 Architecture
An Introduction to the ARM 7 Architecture Trevor Martin CEng, MIEE Technical Director This article gives an overview of the ARM 7 architecture and a description of its major features for a developer new
More informationA New, High-Performance, Low-Power, Floating-Point Embedded Processor for Scientific Computing and DSP Applications
1 A New, High-Performance, Low-Power, Floating-Point Embedded Processor for Scientific Computing and DSP Applications Simon McIntosh-Smith Director of Architecture 2 Multi-Threaded Array Processing Architecture
More informationAn Efficient VLSI Architecture for Software Defined Radio by Using Montium Processing Tile
An Efficient VLSI Architecture for Software Defined Radio by Using Montium Processing Tile A.Saida Assistant Professor ECE Department KG Reddy College of Engineering And Technology, Moinabad,TS,India.
More informationCSCI 4717 Computer Architecture. Function. Data Storage. Data Processing. Data movement to a peripheral. Data Movement
CSCI 4717/5717 Computer Architecture Topic: Functional View & History Reading: Sections 1.2, 2.1, & 2.3 Function All computer functions are comprised of four basic operations: Data processing Data storage
More informationCprE 588 Embedded Computer Systems Homework #1 Assigned: February 5 Due: February 15
CprE 588 Embedded Computer Systems Homework #1 Assigned: February 5 Due: February 15 Directions: Please submit this assignment by the due date via WebCT. Submissions should be in the form of 1) a PDF file
More informationMACHINE ARCHITECTURE & LANGUAGE
in the name of God the compassionate, the merciful notes on MACHINE ARCHITECTURE & LANGUAGE compiled by Jumong Chap. 9 Microprocessor Fundamentals A system designer should consider a microprocessor-based
More informationTHE FLORIDA STATE UNIVERSITY COLLEGE OF ARTS AND SCIENCES APPLICATION CONFIGURABLE PROCESSORS CHRISTOPHER J. ZIMMER
THE FLORIDA STATE UNIVERSITY COLLEGE OF ARTS AND SCIENCES APPLICATION CONFIGURABLE PROCESSORS By CHRISTOPHER J. ZIMMER A Thesis submitted to the Department of Computer Science In partial fulfillment of
More informationUsing Predictive Adaptive Parallelism to Address Portability and Irregularity
Using Predictive Adaptive Parallelism to Address Portability and Irregularity avid L. Wangerin and Isaac. Scherson {dwangeri,isaac}@uci.edu School of Computer Science University of California, Irvine Irvine,
More informationUsing Code Coverage and Multi-event Profiler in Code Composer Studio v2.3 for Robustness and Efficiency Analyses
Application Report SPRA868A April 2004 Using Code Coverage and Multi-event Profiler in Code Composer Studio v2.3 for Robustness and Efficiency Analyses Amit Rangari, N.Pradeep Software Development Systems
More informationTMS320C6000 Programmer s Guide
TMS320C6000 Programmer s Guide Literature Number: SPRU198K Revised: July 2011 Printed on Recycled Paper Preface Read This First About This Manual This manual is a reference for programming TMS320C6000
More informationManagement Challenge. Managing Hardware Assets. Central Processing Unit. What is a Computer System?
Management Challenge Managing Hardware Assets What computer processing and storage capability does our organization need to handle its information and business transactions? What arrangement of computers
More informationUNIT 2 CLASSIFICATION OF PARALLEL COMPUTERS
UNIT 2 CLASSIFICATION OF PARALLEL COMPUTERS Structure Page Nos. 2.0 Introduction 27 2.1 Objectives 27 2.2 Types of Classification 28 2.3 Flynn s Classification 28 2.3.1 Instruction Cycle 2.3.2 Instruction
More informationCPU Organisation and Operation
CPU Organisation and Operation The Fetch-Execute Cycle The operation of the CPU 1 is usually described in terms of the Fetch-Execute cycle. 2 Fetch-Execute Cycle Fetch the Instruction Increment the Program
More informationDIGITAL-TO-ANALOGUE AND ANALOGUE-TO-DIGITAL CONVERSION
DIGITAL-TO-ANALOGUE AND ANALOGUE-TO-DIGITAL CONVERSION Introduction The outputs from sensors and communications receivers are analogue signals that have continuously varying amplitudes. In many systems
More informationPART B QUESTIONS AND ANSWERS UNIT I
PART B QUESTIONS AND ANSWERS UNIT I 1. Explain the architecture of 8085 microprocessor? Logic pin out of 8085 microprocessor Address bus: unidirectional bus, used as high order bus Data bus: bi-directional
More informationAn Optimised Software Solution for an ARM Powered TM MP3 Decoder. By Barney Wragg and Paul Carpenter
An Optimised Software Solution for an ARM Powered TM MP3 Decoder By Barney Wragg and Paul Carpenter Abstract The market predictions for MP3-based appliances are extremely positive. The ability to maintain
More informationVALAR: A BENCHMARK SUITE TO STUDY THE DYNAMIC BEHAVIOR OF HETEROGENEOUS SYSTEMS
VALAR: A BENCHMARK SUITE TO STUDY THE DYNAMIC BEHAVIOR OF HETEROGENEOUS SYSTEMS Perhaad Mistry, Yash Ukidave, Dana Schaa, David Kaeli Department of Electrical and Computer Engineering Northeastern University,
More informationLogical Operations. Control Unit. Contents. Arithmetic Operations. Objectives. The Central Processing Unit: Arithmetic / Logic Unit.
Objectives The Central Processing Unit: What Goes on Inside the Computer Chapter 4 Identify the components of the central processing unit and how they work together and interact with memory Describe how
More informationImplementing an In-Service, Non- Intrusive Measurement Device in Telecommunication Networks Using the TMS320C31
Disclaimer: This document was part of the First European DSP Education and Research Conference. It may have been written by someone whose native language is not English. TI assumes no liability for the
More informationDriving force. What future software needs. Potential research topics
Improving Software Robustness and Efficiency Driving force Processor core clock speed reach practical limit ~4GHz (power issue) Percentage of sustainable # of active transistors decrease; Increase in #
More informationSoftware based Finite State Machine (FSM) with general purpose processors
Software based Finite State Machine (FSM) with general purpose processors White paper Joseph Yiu January 2013 Overview Finite state machines (FSM) are commonly used in electronic designs. FSM can be used
More informationThe Central Processing Unit:
The Central Processing Unit: What Goes on Inside the Computer Chapter 4 Objectives Identify the components of the central processing unit and how they work together and interact with memory Describe how
More informationAN3998 Application note
Application note PDM audio software decoding on STM32 microcontrollers 1 Introduction This application note presents the algorithms and architecture of an optimized software implementation for PDM signal
More informationGUJARAT TECHNOLOGICAL UNIVERSITY, AHMEDABAD, GUJARAT. COURSE CURRICULUM COURSE TITLE: COMPUTER ORGANIZATION AND ARCHITECTURE (Code: 3340705)
GUJARAT TECHNOLOGICAL UNIVERSITY, AHMEDABAD, GUJARAT COURSE CURRICULUM COURSE TITLE: COMPUTER ORGANIZATION AND ARCHITECTURE (Code: 3340705) Diploma Programmes in which this course is offered Computer Engineering
More informationDigital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill
Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill Objectives: Analyze the operation of sequential logic circuits. Understand the operation of digital counters.
More informationDigitale Signalverarbeitung mit FPGA (DSF) Soft Core Prozessor NIOS II Stand Mai 2007. Jens Onno Krah
(DSF) Soft Core Prozessor NIOS II Stand Mai 2007 Jens Onno Krah Cologne University of Applied Sciences www.fh-koeln.de jens_onno.krah@fh-koeln.de NIOS II 1 1 What is Nios II? Altera s Second Generation
More informationEmbedded Systems on ARM Cortex-M3 (4weeks/45hrs)
Embedded Systems on ARM Cortex-M3 (4weeks/45hrs) Course & Kit Contents LEARN HOW TO: Use of Keil Real View for ARM Use ARM Cortex-M3 MCU for professional embedded application development Understanding
More informationLesson 7: SYSTEM-ON. SoC) AND USE OF VLSI CIRCUIT DESIGN TECHNOLOGY. Chapter-1L07: "Embedded Systems - ", Raj Kamal, Publs.: McGraw-Hill Education
Lesson 7: SYSTEM-ON ON-CHIP (SoC( SoC) AND USE OF VLSI CIRCUIT DESIGN TECHNOLOGY 1 VLSI chip Integration of high-level components Possess gate-level sophistication in circuits above that of the counter,
More informationPROBLEMS. which was discussed in Section 1.6.3.
22 CHAPTER 1 BASIC STRUCTURE OF COMPUTERS (Corrisponde al cap. 1 - Introduzione al calcolatore) PROBLEMS 1.1 List the steps needed to execute the machine instruction LOCA,R0 in terms of transfers between
More informationMaking Multicore Work and Measuring its Benefits. Markus Levy, president EEMBC and Multicore Association
Making Multicore Work and Measuring its Benefits Markus Levy, president EEMBC and Multicore Association Agenda Why Multicore? Standards and issues in the multicore community What is Multicore Association?
More informationProgrammable Logic Controllers Definition. Programmable Logic Controllers History
Definition A digitally operated electronic apparatus which uses a programmable memory for the internal storage of instructions for implementing specific functions such as logic, sequencing, timing, counting,
More informationThe Evolution of CCD Clock Sequencers at MIT: Looking to the Future through History
The Evolution of CCD Clock Sequencers at MIT: Looking to the Future through History John P. Doty, Noqsi Aerospace, Ltd. This work is Copyright 2007 Noqsi Aerospace, Ltd. This work is licensed under the
More informationLecture 8: Digital Signal Processors Professor David A. Patterson Computer Science 252 Spring 1998
Lecture 8: Digital Signal Processors Professor David A. Patterson Computer Science 252 Spring 1998 DAP Spr. 98 UCB 1 Vector Summary Vector is alternative model for exploiting ILP If code is vectorizable,
More informationStructure of Presentation. The Role of Programming in Informatics Curricula. Concepts of Informatics 2. Concepts of Informatics 1
The Role of Programming in Informatics Curricula A. J. Cowling Department of Computer Science University of Sheffield Structure of Presentation Introduction The problem, and the key concepts. Dimensions
More informationELEC 5260/6260/6266 Embedded Computing Systems
ELEC 5260/6260/6266 Embedded Computing Systems Spring 2016 Victor P. Nelson Text: Computers as Components, 3 rd Edition Prof. Marilyn Wolf (Georgia Tech) Course Topics Embedded system design & modeling
More informationMobile Processors: Future Trends
Mobile Processors: Future Trends Mário André Pinto Ferreira de Araújo Departamento de Informática, Universidade do Minho 4710-057 Braga, Portugal maaraujo@mail.pt Abstract. Mobile devices, such as handhelds,
More informationOverview of the Cortex-M3
CHAPTER Overview of the Cortex-M3 2 In This Chapter Fundamentals 11 Registers 12 Operation Modes 14 The Built-In Nested Vectored Interrupt Controller 15 The Memory Map 16 The Bus Interface 17 The MPU 18
More informationBroadband Networks. Prof. Dr. Abhay Karandikar. Electrical Engineering Department. Indian Institute of Technology, Bombay. Lecture - 29.
Broadband Networks Prof. Dr. Abhay Karandikar Electrical Engineering Department Indian Institute of Technology, Bombay Lecture - 29 Voice over IP So, today we will discuss about voice over IP and internet
More informationEnergiatehokas laskenta Ubi-sovelluksissa
Energiatehokas laskenta Ubi-sovelluksissa Jarmo Takala Tampereen teknillinen yliopisto Tietokonetekniikan laitos email: jarmo.takala@tut.fi Energy-Efficiency Comparison: VGA 30 frames/s, 512kbit/s Software
More informationRevision of Lecture Eighteen
Revision of Lecture Eighteen Previous lecture has discussed equalisation using Viterbi algorithm: Note similarity with channel decoding using maximum likelihood sequence estimation principle It also discusses
More informationA Lab Course on Computer Architecture
A Lab Course on Computer Architecture Pedro López José Duato Depto. de Informática de Sistemas y Computadores Facultad de Informática Universidad Politécnica de Valencia Camino de Vera s/n, 46071 - Valencia,
More informationEE482: Advanced Computer Organization Lecture #11 Processor Architecture Stanford University Wednesday, 31 May 2000. ILP Execution
EE482: Advanced Computer Organization Lecture #11 Processor Architecture Stanford University Wednesday, 31 May 2000 Lecture #11: Wednesday, 3 May 2000 Lecturer: Ben Serebrin Scribe: Dean Liu ILP Execution
More informationTHREE YEAR DEGREE (HONS.) COURSE BACHELOR OF COMPUTER APPLICATION (BCA) First Year Paper I Computer Fundamentals
THREE YEAR DEGREE (HONS.) COURSE BACHELOR OF COMPUTER APPLICATION (BCA) First Year Paper I Computer Fundamentals Full Marks 100 (Theory 75, Practical 25) Introduction to Computers :- What is Computer?
More informationThe Embedded C Extension to C
Marcel Beemster, Hans van Someren, Willem Wakker ACE Associated Compiler Experts bv. 1 {marcel,hvs,willem}@ace.nl Class #463 Abstract Embedded C is a language extension to C that is the subject of a technical
More informationIntel 8086 architecture
Intel 8086 architecture Today we ll take a look at Intel s 8086, which is one of the oldest and yet most prevalent processor architectures around. We ll make many comparisons between the MIPS and 8086
More informationA s we saw in Chapter 4, a CPU contains three main sections: the register section,
6 CPU Design A s we saw in Chapter 4, a CPU contains three main sections: the register section, the arithmetic/logic unit (ALU), and the control unit. These sections work together to perform the sequences
More informationChapter 1 Computer System Overview
Operating Systems: Internals and Design Principles Chapter 1 Computer System Overview Eighth Edition By William Stallings Operating System Exploits the hardware resources of one or more processors Provides
More information7a. System-on-chip design and prototyping platforms
7a. System-on-chip design and prototyping platforms Labros Bisdounis, Ph.D. Department of Computer and Communication Engineering 1 What is System-on-Chip (SoC)? System-on-chip is an integrated circuit
More informationAn Overview of Stack Architecture and the PSC 1000 Microprocessor
An Overview of Stack Architecture and the PSC 1000 Microprocessor Introduction A stack is an important data handling structure used in computing. Specifically, a stack is a dynamic set of elements in which
More informationCarlos Villavieja, Nacho Navarro {cvillavi,nacho}@ac.upc.edu. Arati Baliga, Liviu Iftode {aratib,liviu}@cs.rutgers.edu
Continuous Monitoring using MultiCores Carlos Villavieja, Nacho Navarro {cvillavi,nacho}@ac.upc.edu Arati Baliga, Liviu Iftode {aratib,liviu}@cs.rutgers.edu Motivation Intrusion detection Intruder gets
More informationInstruction Set Architecture. or How to talk to computers if you aren t in Star Trek
Instruction Set Architecture or How to talk to computers if you aren t in Star Trek The Instruction Set Architecture Application Compiler Instr. Set Proc. Operating System I/O system Instruction Set Architecture
More informationl C-Programming l A real computer language l Data Representation l Everything goes down to bits and bytes l Machine representation Language
198:211 Computer Architecture Topics: Processor Design Where are we now? C-Programming A real computer language Data Representation Everything goes down to bits and bytes Machine representation Language
More informationCS 147: Computer Systems Performance Analysis
CS 147: Computer Systems Performance Analysis CS 147: Computer Systems Performance Analysis 1 / 39 Overview Overview Overview What is a Workload? Instruction Workloads Synthetic Workloads Exercisers and
More informationVECTORIZATION OF DIGITAL FILTERS FOR CVP
VECTORIZATION OF DIGITAL FILTERS FOR CVP THESIS submitted in partial fulfillment of the requirements for the degree of MASTER OF SCIENCE in COMPUTER ENGINEERING by BAO LINH DANG born in Hanoi, Vietnam
More informationBluetooth Audio Data Transfer between Bluetooth chipset (PMB6752&PMB6625) and TriCore Host TC1920
Application Note, v1.0, 2001-10 Bluetooth Audio Data Transfer between Bluetooth chipset (PMB6752&PMB6625) and TriCore Host TC1920 Abstract The paper describes the interfaces and the handling of Audio Data
More informationIA-64 Application Developer s Architecture Guide
IA-64 Application Developer s Architecture Guide The IA-64 architecture was designed to overcome the performance limitations of today s architectures and provide maximum headroom for the future. To achieve
More informationFPGAs for High-Performance DSP Applications
White Paper FPGAs for High-Performance DSP Applications This white paper compares the performance of DSP applications in Altera FPGAs with popular DSP processors as well as competitive FPGA offerings.
More informationDigital Hardware Design Decisions and Trade-offs for Software Radio Systems
Digital Hardware Design Decisions and Trade-offs for Software Radio Systems John Patrick Farrell This thesis is submitted to the Faculty of Virginia Polytechnic Institute and State University in partial
More informationReal-Time Implementation of a New Contour Tracking Procedure in a Multi-Processor DSP System.
Real-Time Implementation of a New Contour Tracking Procedure in a Multi-Processor DSP System. V. GEMIGNANI (1), M. DEMI (1)(2), M. PATERNI (1), A. BENASSI (1) (1) CNR - Institute of Clinical Physiology,
More informationIntroduction to the Latest Tensilica Baseband Solutions
Introduction to the Latest Tensilica Baseband Solutions Dr. Chris Rowen Founder and Chief Technology Officer Tensilica Inc. Outline The Mobile Wireless Challenge Multi-standard Baseband Tensilica Fits
More informationEE282 Computer Architecture and Organization Midterm Exam February 13, 2001. (Total Time = 120 minutes, Total Points = 100)
EE282 Computer Architecture and Organization Midterm Exam February 13, 2001 (Total Time = 120 minutes, Total Points = 100) Name: (please print) Wolfe - Solution In recognition of and in the spirit of the
More information