Integrated Silicon Pressure Sensor On-Chip Signal Conditioned, Temperature Compensated and Calibrated

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1 reescale emiconductor Data heet: Technical Data Pressure Rev 10, 10/2012 Integrated ilicon Pressure ensor On-hip ignal onditioned, Temperature ompensated and alibrated The series piezoresistive transducer is a state-of-the-art monolithic silicon pressure sensor designed for a wide range of applications, but particularly those employing a microcontroller or microprocessor with /D inputs. This patented, single element transducer combines advanced micromachining techniques, thin-film metallization, and bipolar processing to provide an accurate, high level analog output signal that is proportional to the applied pressure. eatures 2.5% aximum Error over 0 to 85 Ideally uited for icroprocessor or icrocontroller-ased ystems vailable in bsolute, Differential and auge onfigurations Patented ilicon hear tress train auge Durable Epoxy Unibody Element eries 0 to 700 kpa (0 to psi) 15 to 700 kpa (2.18 to psi) 0.2 to 4.7 V Output ase Device ame o. Unibody Package ( eries) ORDERI IORTIO # of Ports Pressure Type Device one ingle Dual auge Differential bsolute ame 867 P 867 P 867E X 867 D 867 D DP 867 DP P 867 P P1 (1) 867 P 867E D 1. P1 has 90 degree lead form. UIODY PKE /D E P/P/P1 E DP E / E 867E-03 X E , 2012 reescale emiconductor, Inc. ll rights reserved.

2 Pressure Operating haracteristics Table 1. Operating haracteristics (V = 5.0 Vdc, T = 25 unless otherwise noted, P1 > P2. Decoupling circuit shown in required to meet electrical specifications.) Pressure Range (1) upply Voltage (2) haracteristic ymbol in Typ ax Unit auge, Differential: D bsolute: P OP kpa (kilopascal) equals psi. 2. Device is ratiometric within this specified excitation range. 3. Offset (V off ) is defined as the output voltage at the minimum rated pressure. 4. ull cale Output (V O ) is defined as the output voltage at the maximum or full rated pressure. 5. ull cale pan (V ) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the minimum rated pressure. 6. ccuracy (error budget) consists of the following: Linearity: Output deviation from a straight line relationship with pressure over the specified pressure range. Temperature Hysteresis: Output deviation at any temperature within the operating temperature range, after the temperature is cycled to and from the minimum or maximum operating temperature points, with zero differential pressure applied. Pressure Hysteresis: Output deviation at any pressure within the specified range, when this pressure is cycled to and from the minimum or maximum rated pressure, at 25. Tcpan: Output deviation over the temperature range of 0 to 85, relative to 25. TcOffset: Output deviation with minimum rated pressure applied, over the temperature range of 0 to 85, relative to 25. Variation from ominal: The variation from nominal values, for Offset or ull cale pan, as a percent of V, at Response Time is defined as the time for the incremental change in the output to go from 10% to 90% of its final value when subjected to a specified step change in pressure. 8. Warm-up Time is defined as the time required for the device to meet the specified output voltage after the pressure has been stabilized kpa V Vdc upply urrent I O mdc Zero Pressure Offset (3) auge, Differential (0 to 85 ) bsolute (0 to 85 ) V off Vdc ull cale Output (4) (0 to 85 ) V O Vdc ull cale pan (5) (0 to 85 ) V 4.5 Vdc ccuracy (6) (0 to 85 ) 2.5 %V ensitivity V/P 6.4 mv/kpa Response Time (7) t R 1.0 ms Output ource urrent at ull cale Output I O+ 0.1 mdc Warm-Up Time (8) 20 ms 2 reescale emiconductor, Inc.

3 aximum Ratings Table 2. aximum Ratings (1) Pressure Parametrics ymbol Value Unit aximum Pressure (2) (P2 1 tmosphere) P1 max 2800 kpa torage Temperature T stg -40 to +125 Operating Temperature T -40 to aximum Ratings apply to ase 867 only. Extended exposure at the specified limits may cause permanent damage or degradation to the device. 2. This sensor is designed for applications where P1 is always greater than, or equal to P2. P2 maximum is 500 kpa. igure 1 shows a block diagram of the internal circuitry integrated on a pressure sensor chip. V 3 ensing Element Thin ilm Temperature ompensation and ain tage #1 ain tage #2 and round Reference hift ircuitry 1 V out 2 D Pins 4, 5, and 6 are no connects igure 1. ully Integrated Pressure ensor chematic reescale emiconductor, Inc. 3

4 Pressure On-chip Temperature ompensation and alibration igure 3. illustrates both the Differential/auge and the bsolute ensing hip in the basic chip carrier (ase 867). fluorosilicone gel isolates the die surface and wire bonds from the environment, while allowing the pressure signal to be transmitted to the sensor diaphragm. (or use of the D in a high-pressure cyclic application, consult the factory.) The series pressure sensor operating characteristics, and internal reliability and qualification tests are based on use of dry air as the pressure media. edia, other than dry air, may have adverse effects on sensor performance and long-term reliability. ontact the factory for information regarding media compatibility in your application. igure 2. shows the sensor output signal relative to pressure input. Typical, minimum, and maximum output curves are shown for operation over a temperature range of 0 to 85 using the decoupling circuit shown in. The output will saturate outside of the specified pressure range. shows the recommended decoupling circuit for interfacing the output of the integrated sensor to the /D input of a microprocessor or microcontroller. Proper decoupling of the power supply is recommended. Output (V) Transfer unction: V out = V *( *P+0.04) ± Error V = 5.0 Vdc Temperature = 0 to 85 aximum inimum Typical Differential Pressure (kpa) igure 2. Output vs. Pressure Differential luoro ilicone Die oat Die tainless teel etal over luoro ilicone Die oat Die tainless teel etal over Wire ond P1 Wire ond P1 Lead rame Epoxy ase P2 DIERETIL/UE ELEET RTV Die ond Lead rame Epoxy ase igure 3. ross-ectional Diagrams (not to scale) P2 OLUTE ELEET RTV Die ond +5 V V out Output V s IP D 470 p igure 4. Recommended Power upply Decoupling and Output iltering (or additional output filtering, please refer to pplication ote 1646) 4 reescale emiconductor, Inc.

5 PREURE (P1)/VUU (P2) IDE IDETIITIO TLE reescale designates the two sides of the pressure sensor as the Pressure (P1) side and the Vacuum (P2) side. The Pressure (P1) side is the side containing fluorosilicone gel which protects the die from harsh media. The reescale PX Pressure pressure sensor is designed to operate with positive differential pressure applied, P1 > P2. The Pressure (P1) side may be identified by using the following table. Part umber ase Type Pressure (P1) ide Identifier /D 867 tainless teel ap DP 867 ide with Part arking P/P 867 ide with Port ttached / 867E ide with Port ttached X 867 ide with Port ttached reescale emiconductor, Inc. 5

6 Pressure PKE DIEIO -- R POITIVE PREURE (P1) OTE: DIEIOI D TOLERI PER I Y14.5, OTROLLI DIEIO: IH. DIEIO -- I ILUIVE O THE OLD TOP RI. OLD TOP RI OT TO EXEED (0.630). ETI PLE PI 1 -T L D 6 PL (0.005) T DI D L R IHE ILLIETER I X I X O 30 O TYLE 1: PI 1. VOUT 2. ROUD 3. V 4. V1 5. V2 6. VEX TYLE 2: PI 1. OPE 2. ROUD 3. -VOUT 4. VUPPLY 5. +VOUT 6. OPE TYLE 3: PI 1. OPE 2. ROUD 3. +VOUT 4. +VUPPLY 5. -VOUT 6. OPE E IUE I ELEET PORT #1 POITIVE PREURE (P1) PORT #2 VUU (P2) ETI PLE P 0.25 (0.010) T Q X R ETI PLE PI Q- -- U W L V D 6 PL PORT #2 VUU (P2) PORT #1 POITIVE PREURE (P1) -T- -T (0.005) K OTE: 1. DIEIOI D TOLERI PER E Y14.5, OTROLLI DIEIO: IH. IHE ILLIETER DI I X I X D K L P Q R U V W X TYLE 1: PI 1. VOUT 2. ROUD 3. V 4. V1 5. V2 6. VEX E IUE PREURE D VUU IDE PORTED (DP) 6 reescale emiconductor, Inc.

7 PKE DIEIO Pressure PE 1 O 2 E IUE PREURE IDE PORTED (P, P) reescale emiconductor, Inc. 7

8 Pressure PKE DIEIO PE 2 O 2 E IUE PREURE IDE PORTED (P, P) 8 reescale emiconductor, Inc.

9 PKE DIEIO Pressure OTE: 1. DIEIOI D TOLERI PER I Y14.5, OTROLLI DIEIO: IH. V PORT #1 POITIVE PREURE (P1) E -- -T- K D 6 PL PI (0.005) T DI D E K V IHE ILLIETER I X I X TYLE 1: PI 1. VOUT 2. ROUD 3. V 4. V1 5. V2 6. VEX E 867E-03 IUE D PREURE IDE PORTED (, ) E -T- U -Q- OTE: 1. DIEIOI D TOLERI PER I Y14.5, OTROLLI DIEIO: IH. V PORT #1 POITIVE PREURE (P1) -P (0.010) T D 6 PL 0.13 (0.005) T P Q Q K PI 1 R DI D E K P Q R U V IHE ILLIETER I X I X TYLE 1: PI 1. VOUT 2. ROUD 3. V 4. V1 5. V2 6. VEX E IUE D PREURE IDE XIL PORT (X) reescale emiconductor, Inc. 9

10 Pressure Table 3. Revision History Revision number Revision date Description of changes 10 10/2012 On page 1, added a table note to the Ordering Information table indicating that the device P1 has 90 degree lead form. 10 reescale emiconductor, Inc.

11 How to Reach Us: Home Page: freescale.com Web upport: freescale.com/support Information in this document is provided solely to enable system and software implementers to use reescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. reescale reserves the right to make changes without further notice to any products herein. reescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does reescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in reescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. ll operating parameters, including typicals, must be validated for each customer application by customer s technical experts. reescale does not convey any license under its patent rights nor the rights of others. reescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/salestermsandconditions. reescale, the reescale logo, Energy Efficient olutions logo, are trademarks of reescale emiconductor, Inc., Reg. U.. Pat. & Tm. Off. Xtrinsic is a trademark of reescale emiconductor, Inc. ll other product or service names are the property of their respective owners reescale emiconductor, Inc. Rev /2012

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