Data Conversion Circuits Dr. Lynn Fuller
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1 ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING Data Conversion Circuits Dr. Lynn Fuller Webpage: 82 Lomb Memorial Drive Rochester, NY Tel (585) Department webpage: Conversion_Circuits.ppt Page 1
2 INTRODUCTION Analog electronic circuits are different from digital circuits in that the signals are expected to have any value rather than two discrete values. Primitive analog components include the diode, mosfet, BJT, resistor, capacitor, etc,. Analog circuit building blocks include single stage amplifiers, differential amplifiers, constant current sources, voltage references, etc. Basic analog electronic circuits include the operational amplifier, inverting amplifier, non-inverting amplifier, integrator, bistable multivibrator, peak detector, comparator, RC oscillator, etc. Mixed-mode analog integrated circuits include D-to-A, A-to-D, etc. This document will introduce some mixed-mode analog/digital electronic circuits. Page 2
3 OUTLINE Analog Multiplexer D to A A to D Binary Counter A to D Flip Flops Shift Registers/Counters Design Examples Blue Tooth References Homework Page 3
4 3 BIT ANALOG MULTIPLEXER V8 V7 V6 V5 V4 V3 V2 V1 b1 b1 b2 b2 b3 b3 LSB MSB Vout MSB LSB b3 b2 b1 Vout V1 V2 V3 V4 V5 V6 V7 V8 Page 4
5 128 PHOTODIODES Data Conversion Circuits ANALOG MULTIPLEXER APPLICATION ANALOG MULTIPLEXER D1 D2 D3 D4 D5 D6 D7 D8 SWITCHES A A B B C C Analog out A.G 7 BIT COUNTER Sync Sync pulse (at B) Clock Reset Page 5
6 CMOS ANALOG MULTIPLEXER LAYOUT V1 V2 V3 V4 V5 V6 V7 V8 b1 b1 b2 b2 b3 b3 Vout Page 6
7 DIGITAL TO ANALOG CONVERSION A digital word of n bits is converted to an analog voltage. If n = 3 then 2 n or 8 different analog values are possible. If n=1 then 124 different analog values are possible. b1 D to A Analog Vout bn For example if the reference voltage is 3 volts and n = 3 and the digital word is 11 then the Analog Vout = 3V x 5/8 = 1.875V 11=5 2 n =8 Page 7
8 3 BIT D TO A Vref b1 b1 b2 b3 b3 b2 Vref 7/8 Vref 6/8 Vref 5/8 Vref 4/8 Vref 3/8 Vref 2/8 Vref 1/8 LSB MSB Vout Resistors are all equal value Page 8
9 BINARY-WEIGHTED RESISTOR D TO A Vref R 2R 4R b3 b2 b1 I R/2 I3 I2 I1 I = I3 + I2 + I1 - + Vo = -I R/2 With the switches as shown Vo = What is Vo for a 11 digital input? -Vref R/2 = -Vref /8 4R How is this architecture extended to more bits? Page 9
10 R-2R RESISTOR LADDER D TO A Vref R R 2R Vref/R Vref/2R Vref/4R Vref/8R 2R 2R 2R b3 b2 b1 I R I3 = Vref/2R I2 = Vref/4R I1 = Vref/8R I3 I2 I1 I = I3 + I2 + I1 - + Vo = -I R With the switches as shown Vo = What is Vo for a 11 digital input? -Vref R = -Vref /8 8R How is this architecture extended to more bits? Page 1
11 DAC LAYOUT DAC1 Rai DAC2 Chia Test Devices Saxer DAC4 Knauz DAC3 Reisiger Page 11
12 FEEDBACK-COMPARATOR A TO D CONVERTER Analog Comparator Vin + - Up/Down Control Up/Down Counter Clock b1 b2 b3 bn n-bit Digital Output Vo DAC Analog Vin must be less than DAC Vref. Could take a lot of clock cycles (time) for each conversion. Page 12
13 DUAL SLOPE A TO D CONVERTER Analog -Vin Vref S1 R Vx S2 - + C Vx Comparator Clock - + Counter b1 b2 b3 bn n-bit Digital Output Slope = Vin/RC Slope = -Vref/RC Fixed T1 time Variable time T2 Page 13
14 8V 3 BIT FLASH ANALOG TO DIGITAL CONVERTER +V Vin 7V 6V 5V 4V 3V 2V 1V 3.5V Comparators Segment Detector 1 Decoding Logic Page 14
15 LAYOUT OF FLASH A TO D Page 15
16 WIRELESS CAPACITANCE TO DIGITAL CONVERTER RC Oscillator 2.4 khz RC Oscillator 5 Hz CTS TX RX SCLK RCLK 5 Hz Stop Bit 1 1-bit (Left) Shift Register 1 3 V RTS 1 Bluetooth Serial RF Link Start Bit CCKEN RCO CCLK 8-bit Binary Counter RCLK CCLR Internal Counter RC Oscillator Sensor Page 16
17 UP/DOWN COUNTER AND SHIFT REGISTERS Many of these circuits need Up/Down counters and shift registers. In the next few pages we will look at one type of counter and see how to modify it to also function as a shift register. Binary Counter Serial Output Asynchronous Reset Count Up Enable Shift Out Clock Input Count Up Clock Input Start Bit and Stop Bit Page 17
18 EDGE TRIGGERED D TYPE FLIP FLOP Page 18
19 D (Edge Triggered)Flip Flop Realization Page 19
20 D FF (Edge Triggered) Input File:.incl rit_sub_param.txt m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m2 8 1 cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u vdd 16 3 vd 15 PULSE( 3 NS NS NS 15NS 3NS) vclock 9 PULSE( 3 5NS NS NS 1NS 2NS) Microelectronic *****transient******* Engineering.tran.1n.5u.end Page 2
21 EDGE TRIGGERED D FF SIMULATION RESULTS CLK D Q Page 21
22 JK FLIP FLOP Page 22
23 Modification to Convert D FF to JK FF Page 23
24 JK FF Input File:.incl rit_sub_param.txt m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m2 8 1 cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u Transistors on next page Page 24
25 JK FF Input File: vdd 16 3 vj 17 PULSE( 3 NS NS NS 1NS 15NS) vk 23 PULSE( 3 NS NS NS 5NS 1NS) vclock 9 PULSE( 3 5NS NS NS 5NS 15NS) ********************** m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u *****transient*******.tran.1n.5u.end Page 25
26 JK FF Simulation Output: J K CLK Q Q Page 26
27 Constructing 8 bit Binary Counter Using T FF T Flip Flop is a JK FF With J and K connected together and labeled T Page 27
28 8 Bit Binary Counter Input File:.incl rit_sub_param.txt.subckt Tff m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m2 8 1 cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u vd 16 3 vjk dc ********************** Page 28
29 8 Bit Binary Counter Input File: m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosp w=7.5u l=2u ad=35p pd=25u as=35p ps=25u m cmosn w=3u l=2u ad=15p pd=16u as=15p ps=16u ***************************.ends xb Tff xb Tff xb Tff xb Tff xb Tff xb Tff xb Tff xb Tff Vcountenable 4 3 vcount 41 PULSE(3 NS NS NS 5NS 1NS).tran.1n 13u.end Page 29
30 8 Bit Binary Counter Output: Q Q1 Q2 Q3 Page 3
31 8 Bit Binary Counter Output: Q4 Q5 Q6 Q7 Page 31
32 8-BIT BINARY COUNTER Page 32
33 ADDITIONAL CIRCUITRY TO RESET, SHIFT, COUNT Page 33
34 UP/DOWN COUNTER AND SHIFT REGISTERS Page 34
35 8-BIT BINARY COUNTER/SHIFT REGISTER peek in 1 level Page 35
36 COUNTER AND SHIFT REGISTER Page 36
37 REFERENCES 1. Switched Capacitor Circuits, Phillip E. Allen and Edgar Sanchez-Sinencio, Van Nostrand Reinhold Publishers, Active Filter Design Using Operational Transconductance Amplifiers: A Tutorial, Randall L. Geiger and Edgar Sanchez-Sinencio, IEEE Circuits and Devices Magazine, March 1985, pg Microelectronic Circuits, 5 th Edition, Sedra and Smith, Chapter 9 section Page 37
38 HOMEWORK DATA CONVERSION 1. Create one good homework problem and its solution related to the material covered in this document. (for next years students) 2. Design an R-2R 3-Bit A-to-D converter and show it works using SPICE. 3. Design and simulate a 2-bit analog MUX and show it works using SPICE. Page 38
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