IPS031R FULLY PROTECTED POWER MOSFET SWITCH. Product Summary

Transcription

1 Data Sheet No.PD6 IPS3R FULLY PROTECTED POWER MOSFET SWITCH Features Over temperature shutdown Over current shutdown Active clamp Low current & logic level input E.S.D protection Description The IPS3R are fully protected three terminal SMART POWER MOSFETs that feature over-current, over-temperature, ESD protection and drain to source active clamp.these devices combine a HEXFET POWER MOSFET and a gate driver. They offer full protection and high reliability required in harsh environments. The driver allows short switching times and provides efficient protection by turning OFF the power MOSFET when the temperature exceeds 65 o C or when the drain current reaches 4A. The device restarts once the input is cycled. The avalanche capability is significantly enhanced by the active clamp and covers most inductive load demagnetizations. Product Summary R ds(on) 6mΩ (max) V clamp 5V I shutdown 4A T on/ T off.5µs Package 3-Lead D-Pak Typical Connection Load " R in series (if needed) IN control! D S Logic signal (Refer to lead assignment for correct pin configuration)

2 Pd Maximum power dissipation () rth=5 o C/W.5 IPS3R Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to SOURCE lead. (TAmbient = 5 o C unless otherwise specified). PCB mounting uses the standard footprint with 7 µm copper thickness. Symbol Parameter Min. Max. Units Test Conditions V ds Maximum drain to source voltage 47 V in Maximum input voltage Iin, max Maximum IN current - + ma Isd cont. Diode max. continuous current () Isd pulsed Diode max. pulsed current () 8 rth= o C/W.6 D-Pak Std footprint rth=5 o C/W 8 A D-Pak with Rth=5 o C/W rth=5 o C/W 3 D-Pak with sq. footprint V rth= o C/W.5 W ESD Electrostatic discharge voltage (Human Body) 4 C=pF, R=5Ω, ESD Electrostatic discharge voltage (Machine Model).5 C=pF, R=Ω, L=µH kv T stor. Max. storage temperature Tj max. Max. junction temperature Tlead Lead temperature (soldering, seconds) 3 o C Thermal Characteristics Symbol Parameter Min. Typ. Max. Units Test Conditions Rth Thermal resistance with standard footprint Rth Thermal resistance with " square footprint 5 Rth 3 Thermal resistance junction to case 3 Recommended Operating Conditions These values are given for a quick design. For operation outside these conditions, please consult the application notes. Symbol Parameter Min. Max. Units Vds (max) Continuous drain to source voltage 35 VIH High level input voltage 4 6 V VIL Low level input voltage.5 Ids Continuous drain current Tamb=85 o C TAmbient = 85 o C, IN = 5V, rth = 5 o C/W, Tj = 5 o C) " sq. footprint 3.3 A TAmbient = 85 o C, IN = 5V, rth = o C/W, Tj = 5 o C) Std. footprint Rin Recommended resistor in series with IN pin. 5 kω Tr-in(max) Max recommended rise time for IN signal (see fig. ) µs Fr-Isc () Max. frequency in short circuit condition (Vcc = 4V) khz () Limited by junction temperature (pulsed current limited also by internal wiring) () Operations at higher switching frequencies is possible. See Application. Notes. o C/W D - PAK

3 Static Electrical Characteristics (Tj = 5 o C unless otherwise specified.) Symbol Parameter Min. Typ. Max. Units Test Conditions Rds(on) ON state resistance Tj = 5 o C 45 6 Rds(on) ON state resistance Tj = 5 o mω Vin = 5V, Ids = A C 75 Idss Drain to source leakage current.5 5 Vcc = 4V, Tj = 5 o o C µa Idss Drain to source leakage current 5 5 Vcc = 4V, Tj = 5 o o C V clamp Drain to source clamp voltage Id = ma (see Fig.3 & 4) V clamp Drain to source clamp voltage Id=Ishutdown (see Fig.3 & 4) V Vin clamp IN to source clamp voltage Iin = ma Vth IN threshold voltage.6 Id = 5mA, Vds = 4V Iin, -on ON state IN positive current 5 9 Vin = 5V Iin, -off OFF state IN positive current µa Vin = 5V over-current triggered Switching Electrical Characteristics Vcc = 4V, Resistive Load = 5Ω, Rinput = 5Ω, µs pulse,t j = 5 o C, (unless otherwise specified). Symbol Parameter Min. Typ. Max. Units Test Conditions Ton Toff Turn-on delay time Turn-off delay time Tr Tf Rise time Fall time Trf Time to 3% final Rds(on) 8 µs See figure See figure Qin Total gate charge nc Vin = 5V Protection Characteristics Symbol Parameter Min. Typ. Max. Units Test Conditions Tsd Over temperature threshold 65 o C See fig. Isd Over current threshold 4 8 A See fig. V reset IN protection reset threshold V Treset Time to reset protection 4 µs Vin = V, Tj = 5 o C EOI_OT Short circuit energy (see application note) 4 µj Vcc = 4V 3

4 Functional Block Diagram All values are typical DRAIN 47 V 3 Ω k Ω IN S Q 8. V 8 µ A R Q T > 65 c I sense I > sd SOURCE Lead Assignments (D) 3 In D S D-Pak IPS3R 4

5 Vin 5 V V Vin 9 % % Ids Isd I shutdown t < T reset t > T reset Ids Tr-in 9 % % T Tsd (65 c) T shutdown Vds Td on tr Td off tf Figure - Timing diagram Figure - IN rise time & switching time definitions T clamp Vin L V load Ids Vds Vds clamp ( Vcc ) Rem : V load is negative during demagnetization 5 v v Vin IN R D S Vds Ids + 4 V - ( see Appl. Notes to evaluate power dissipation ) Figure 3 - Active clamp waveforms Figure 4 - Active clamp test circuit 5

6 All curves are typical values with standard footprints. Operating in the shaded area is not recommended Tj = 5 o C Tj = 5 o C % 8% 6% 4% % % 8% 6% 4% % % Figure 5 - Rds ON (mω) Vs Input Voltage (V) Figure 6 - Normalised Rds ON (%) Vs Tj ( o C) ton delay rise time 3% final rdson toff delay 9 fall time Figure 7 - Turn-ON Delay Time, Rise Time & Time to 3% final Rds(on) (us) Vs Input Voltage (V) Figure 8 - Turn-OFF Delay Time & Fall Time (us) Vs Input Voltage (V) 6

7 delay on rise time 3% rdson delay off fall time.. Figure 9 - Turn-ON Delay Time, Rise Time & Time to 3% final Rds(on) (us) Vs IN Resistor (Ω) Figure - Turn-OFF Delay Time & Fall Time (us) Vs IN Resistor (Ω) Isd 5 C Ilim 5 C Figure - Current Iimitation & I shutdown (A) Vs Vin (V) Figure - I shutdown (A) Vs Temperature ( o C) 7

8 Tj=5 C Tj = C Free air / standard footprint Figure 3 - Max. I load current (A) Vs Tamb ( o C) IPS3R Figure 4 - Ids (A) Vs Protection Resp. Time (s) IPS3R single pulse m ax. current Hz rth=6 C/W 5 dt=5 C khz rth=6 C/W 5 dt=5 C.. Vbat = 4 V Tjini = T sd.. Figure 5 - Iclamp (A) Vs Inductive Load (mh)..e-5.e-3.e-.e+.e+3 Fig.6 - Transient Thermal Impedance ( o C/W) Vs Time (s) - IPS3R 8

9 Iin,on Iin,off % 5% % 5% % 95% 9% Vds Isd 85% Vin ma 8% Figure 7 - Input current (µa) Vs Junction ( o C) Figure 8 - Vin clamp and V clamp (%) Vs Tj ( o C) 6 4 Treset rise time fall time Figure 9 - Turn-on, Turn-off, and treset (µs) Vs Tj ( o C) 9

10 Case Outline 3-Lead D-Pak (JEDEC TO5AA)

11 Tape & Reel - D-PAK -37 IR WORLD HEADQUARTERS: 33 Kansas St., El Segundo, California 945 Tel: (3) 5-75 This device was designed and qualified peer automotive level (Q) Data and specifications subject to change without notice. 6//4

12 Note: For the most current drawings please refer to the IR website at: