Introduction to Chapter 9

Transcription

1 Introduction to Chapter 9 Basic operation and specific ICs that perform: Decoding and encoding Multiplexing Demultiplexing Comparison Code conversion Data busing 1

2 9-1 Decoders Decoder logic circuit that activates an output that corresponds to a binary number on the input. ENABLE inputs The 74ALS138 decoder BCD to decimal decoders (the 7442) BCD to decimal decoder/driver (the 7445) Decoder applications 2

3 FIGURE 9-2 Three-line-to-8-line (or 1-of-8) decoder. 3

4 FIGURE 9-3 company) (a) Logic diagram for the 74ALS138 decoder; (b) truth table; (c) logic symbol. (Courtesy of Fairchild, a Schlumberger 4

5 FIGURE 9-4 Four 74ALS138s forming a 1-of-32 decoder. 5

6 FIGURE 9-5 (a) Logic diagram for the 7442 BCD-to-decimal decoder; (b) logic symbol; (c) truth table. (Courtesy of Fairchild, a Schlumberger company) 6

7 FIGURE 9-6 Example 9-3: counter/decoder combination used to provide timing and sequencing operations. 7

8 9-2 BCD to 7 Segment Decoder/Drivers The 7 segment display is a common way to display decimal or hexadecimal characters. BCD to 7 segment decoder/driver Common-anode versus common-cathode LED displays 7446/47 activate specific segment patterns in response to input codes 8

9 FIGURE 9-7 (a) 7-segment arrangement; (b) active segments for each digit. 9

10 FIGURE 9-8 (a) BCD-to-7 segment decoder/driver driving a common-anode 7-segment LED display; (b) segment patterns for all possible input codes. 10

11 BCD-to-7 Segment Decoder/Driver 11

12 9-3 Liquid Crystal Displays How LCD and LED displays differ. LCD operation Driving an LCD Types of LCDs Active matrix TFT LCDs 12

13 FIGURE 9-9 Liquid-crystal display: (a) basic arrangement; (b) applying a voltage between the segment and the backplane turns ON the segment. Zero voltage turns the segment OFF. 13

14 FIGURE 9-10 (a) Method for driving an LCD segment; (b) driving a 7-segment display. 14

15 FIGURE 9-11 A passive matrix LCD panel. 15

16 9-4 Encoders The general encoding and decoding process 16

17 9-4 Encoders Priority encoders The 74148, 74LS148, and 74HC148 octal to binary priority encoders The decimal to BCD priority encoder The as a switch encoder Operation of the keyboard entry circuit described in figure on the next page. 17

18 FIGURE decimal-to-bcd priority encoder. 18

19 FIGURE 9-15 Decimal-to-BCD switch encoder. 19

20 FIGURE 9-16 Circuit for keyboard entry of three-digit number into storage registers. 20

21 9-5 Troubleshooting More complex circuitry increases possible reasons for failure Applying observation and analysis will narrow the focus and simplify testing After using observation and analysis to determine the possible faults, repeatedly use the divide and conquer technique to reduce possible causes by half 21

22 Example Troubleshooting A technician tests the circuit by using a set of switches to apply the input code at A 4 through A 0. She runs through each possible input code and checks the corresponding decoder output to see if it is activated. She observes that all of the odd-numbered outputs respond correctly, but all of the even-numbered outputs fail to respond when their code is applied. What are the most probable faults? 22

23 9-5 Troubleshooting Solution: Since all of the even numbers have a problem, we look for some common fault. Look at the truth table. The A input is common input Look for problem in that area. (driving circuitry, bad chip, bad pc board, etc.) 23

24 FIGURE 9-17 Troubleshooting circuitry in Example

25 9-6 Multiplexers (Data Selectors) A multiplexer (MUX) selects one of multiple input signals and passes it to the output. The basic two input multiplexer The four input multiplexer The eight input multiplexer The quad two input MUX (74ALS157/HC157) 25

26 FIGURE 9-18 Functional diagram of a digital multiplexer (MUX). 26

27 FIGURE 9-19 Two-input multiplexer. 27

28 FIGURE 9-20 Four-input multiplexer. 28

29 FIGURE 9-21 company) (a) Logic diagram for the 74ALS151 multiplexer; (b) truth table; (c) logic symbol. (Courtesy of Fairchild, a Schlumberger 29

30 FIGURE 9-22 Example 9-9: two 74HC151s combined to form a 16-input multiplexer. 30

31 FIGURE 9-23 company) (a) Logic diagram for the 74ALS157 multiplexer; (b) logic symbol; (c) truth table. (Courtesy of Fairchild, a Schlumberger 31

32 9-7 Multiplexer Applications Applications include data selection, data routing, operation sequencing, parallel to serial conversion, waveform generation, and logic function generation. Data routing Parallel to serial conversion Operation sequencing Logic function generation 32

33 FIGURE 9-24 System for displaying two multidigit BCD counters one at a time. 33

34 FIGURE 9-25 (a) Parallel-to-serial converter; (b) waveforms for X 7 X 6 X 5 X 4 X 3 X 2 X 1 X 0 =

35 FIGURE 9-26 Seven-step control sequencer. 35

36 FIGURE 9-27 Multiplexer used to implement a logic function described by the truth table. 36

37 9-8 Demultiplexers (Data Distributors) A demultiplexer (DEMUX) distributes a single input to multiple outputs. 1 line to 8 line demultiplexer Clock demultiplexer A security monitoring system application using the 74ALS138 decoder/demux 37

38 FIGURE 9-28 General demultiplexer. 38

39 FIGURE 9-29 A 1-line-to-8-line demultiplexer. 39

40 _ FIGURE 9-30 (a) The 74ALS138 decoder _ can function as a demultiplexer _ with E 1 used as the data input; (b) typical waveforms for a select code of A 2 A 1 A 0 = 000 show that O 0 is identical to the data input I on E 1. 40

41 FIGURE 9-31 A clock demultiplexer transmits the clock signal to a destination determined by the select code inputs. 41

42 FIGURE 9-32 Security monitoring system. 42

43 9-8 Demultiplexers (Data Distributors) A synchronous data transmission system application The receiver Complete operation 43

44 FIGURE 9-34 Waveforms during one complete transmission cycle. 44

45 9-9 More Troubleshooting Troubleshooting skills are developed through exercise. Apply observation and analysis to the following examples to determine the probable fault: Example 9-12 Example

46 9-9 More Troubleshooting Example 9-12 A test performed on this circuit yields the result shown below: Actual Count Displayed Count Case 1 Counter Counter Case 2 Counter Counter Case 3 Counter Counter What is wrong? 46

47 9-9 More Troubleshooting Example 9-12 (continued) Solution: Counter 1 appears to be working correctly. Counter 2 s tens digit is working it s the units digit that is incorrect. Note that the units digit of counter 2 is always the same as the units digit of counter 1. 47

48 9-9 More Troubleshooting Example 9-13 The security monitoring system shown is tested and the results are recorded in the table: Condition All doors closed Door 0 open Door 1 open Door 2 open Door 3 open Door 4 open Door 5 open Door 6 open Door 7open LEDs All LEDs off Led 4 flashing Led 5 flashing Led 6 flashing Led 7 flashing Led 4 flashing Led 5 flashing Led 6 flashing Led 7 flashing 48

49 9-9 More Troubleshooting Example 9-13 (continued) Note that doors 4 through 7 function properly. Look at truth tables: 741HC51 Note that the door indicator is always 4 or more. This indicates that the MSB input is probably stuck high keeping the most significant digit (4) on. 49

50 9-10 Magnitude Comparator The magnitude comparator compares the magnitude of two binary input quantities and indicates which is greater. The 74HC85 Data inputs Outputs Cascading inputs Applications comparison of position, speed, or temperature to a reference value 50

51 FIGURE 9-36 Logic symbol and truth table for a 74HC85 (7485, 74LS85) four-bit magnitude comparator. 51

52 FIGURE 9-37 (a) 74HC85 wired as a four-bit comparator; (b) two 74HC85s cascaded to perform an eight-bit comparison. 52

53 FIGURE 9-38 Magnitude comparator used in a digital thermostat. 53

54 9-11 Code Converters The code converter changes data between different binary codes BCD to 7-segment BCD to binary Binary to BCD Binary to Gray code Gray code to binary ASCII to EBCDIC EBCDIC to ASCII The conversion process 54

55 FIGURE 9-39 Basic idea of a two-digit BCD-to-binary converter. 55

56 9-11 Code Converters Circuit implementation with two 74HC83 four bit adders 56

57 9-12 Data Busing The data bus is a common set of connecting lines for data transfers Many devices are connected to the data bus Microprocessors Semiconductor memory Digital to analog converters Analog to digital converters 57

58 9-12 Data Busing An example of data busing 58

59 9-13 The 74ALS173/HC173 Tristate Register Devices connected to a data bus contain registers to hold the device data Registers are usually tied to the bus through a tristate buffer 74ALS173 TTL 4 bit register with PIPO capability 74HC173 CMOS version 59

60 FIGURE 9-42 Truth table and logic diagram for the 74ALS173 tristate register. (Courtesy of Fairchild, a Schlumberger company) 60

61 9-13 The 74ALS173/HC173 Tristate Register The logic symbol 61

62 9-14 Data Bus Operation Data transfer operation Bus signals Simplified bus timing diagram Expanding the bus Simplified bus representation Bi-directional busing 62

63 FIGURE 9-44 Tristate registers connected to a data bus. 63

64 FIGURE 9-45 Signal activity during the transfer of the data 1011 from register A to register C. 64

65 FIGURE 9-46 Simplified way to show signal activity on data bus lines. 65

66 FIGURE 9-47 A 74HC541 octal bus driver connects the outputs of an analog-to-digital converter (ADC) to an eight-line data bus. The D 0 output connects directly to the bus showing the capacitive effects. 66

67 FIGURE 9-48 Simplified representation of bus arrangement. 67

68 FIGURE 9-49 Bundle method for simplified representation of data bus connections. The /8 denotes an eight-line data bus. 68

69 FIGURE 9-50 Bidirectional register connected to data bus. 69

70 9-15 Decoders Using HDL Macrofunctions exist to describe standard devices AHDL The AHDL equivalent to the decoder (figure 9-52) The AHDL equivalent using truth table description (figure 9-53) VHDL The VHDL equivalent to the decoder using a truth table (figure 9-54) 70

71 9-16 The HDL 7 Segment Decoder Driver The standard part number being described is a 7447 The AHDL 7 segment BCD display decoder (figure 9-55) The VHDL 7 segment BCD display decoder (figure 9-56) 71

72 9-17 Encoder Using HDL Priority encoders in HDL Tristate devices in HDL The priority encoder with active HIGH tristate outputs will be described The AHDL priority encoder (figure 9-58) The AHDL priority encoder using IF/ELSE (figure 9-59) The VHDL priority encoder (figure 9-60) 72

73 9-18 HDL Multiplexers and Demultiplexers A multiplexer acts as a selector switch for digital signals A demultiplexer distributes a digital signal to one of its outputs Select inputs are used to determine which signal goes through the pipeline AHDL MUX and DEMUX VHDL MUX and DEMUX 73

74 9-19 HDL Magnitude Comparators The magnitude of two binary numbers is compared and an output indicates: greater than, less than, or equal to. The IF/ELSE construct is useful in this application. The AHDL comparator using the IF/ELSE construct. The VHDL comparator using the IF/ELSE construct. 74

75 9-20 HDL Code Converters HDL description of code converters is very intuitive. AHDL BCD to binary code converter (figure 9-68) VHDL BCD to binary code converter (figure 9-69) 75