BTA/BTB12 and T12 Series
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1 BTA/BTB1 and T1 Series SNUBBERLESS, LOIC LEVEL & STANDARD 1A TRIACS MAIN FEATURES: Symbol Value Unit I T(RMS) 1 A V DRM /V RRM 6 and 8 V I T (Q1 ) to 5 ma DESCRIPTION Available either in through-hole or surface-mount packages, the BTA/BTB1 and T1 triac series is suitable for general purpose AC switching. They can be used as an ON/OFF function in applications such as static relays, heating regulation, induction motor starting circuits... or for phase control operation in light dimmers, motor speed controllers,... The snubberless versions (BTA/BTB...W and T1 series) are specially recommended for use on inductive loads, thanks to their high commutation performances. By using an internal ceramic pad, the BTA series provides voltage insulated tab (rated at 5V RMS) complying with UL standards (File ref.: E81734) TO-AB Insulated (BT) D PAK (T1-) TO-AB (BTB1) ABSOLUTE MAXIMUM RATINS Symbol Parameter Value Unit I T(RMS) RMS on-state current (full sine wave) D ² PAK/TO-AB Tc = 5 C I TSM Non repetitive surge peak on-state current (full cycle, Tj initial = 5 C) TO-AB Ins. Tc = 9 C 1 A F = 5 Hz t = ms 1 A F = 6 Hz t = 16.7 ms 16 I ² t I ² t Value for fusing tp = ms A ² s di/dt Critical rate of rise of on-state current I = x I T, tr ns F = 1 Hz Tj = 15 C 5 A/µs V DSM /V RSM Non repetitive surge peak off-state voltage tp = ms Tj = 5 C V DRM /V RRM + V I M Peak gate current tp = µs Tj = 15 C 4 A P (AV) Average gate power dissipation Tj = 15 C 1 W T stg T j Storage junction temperature range Operating junction temperature range - 4 to to + 15 C September - Ed: 3 1/7
2 ELECTRICAL CHARACTERISTICS (Tj = 5 C, unless otherwise specified) SNUBBERLESS and LOIC LEVEL (3 Quadrants) Symbol Test Conditions Quadrant T1 BTA/BTB1 Unit T135 SW CW BW I T (1) I - II - III MAX ma V D = 1 V R L = 3 Ω V T I - II - III MAX. 1.3 V V D V D = V DRM R L = 3.3 kω I - II - III MIN.. Tj = 15 C V I H () I T = ma MAX ma I L I = 1. I T I - III MAX ma II dv/dt () V D = 67 %V DRM gate open Tj = 15 C MIN V/µs (di/dt)c () (dv/dt)c =.1 V/µs Tj = 15 C MIN A/ms (dv/dt)c = V/µs Tj = 15 C Without snubber Tj = 15 C STANDARD (4 Quadrants) Symbol Test Conditions Quadrant BTA/BTB6 Unit C B I T (1) I - II - III 5 5 ma MAX. V D = 1 V R L = 3 Ω IV 5 V T ALL MAX. 1.3 V V D V D = V DRM R L = 3.3 kω Tj = 15 C ALL MIN.. V I H () I T = 5 ma MAX. 5 5 ma I L I = 1. I T I - III - IV MAX. 4 5 ma II 8 dv/dt () V D = 67 %V DRM gate open Tj = 15 C MIN. 4 V/µs (dv/dt)c () (di/dt)c = 5.3 A/ms Tj = 15 C MIN. 5 V/µs STATIC CHARACTERISTICS Symbol Test Conditions Value Unit V T () I TM = 17 A tp = 38 µs Tj = 5 C MAX V V to () Threshold voltage Tj = 15 C MAX..85 V R d () Dynamic resistance Tj = 15 C MAX. 35 mω I DRM V DRM = V RRM Tj = 5 C 5 µa MAX. I RRM Tj = 15 C 1 ma Note 1: minimum IT is guaranted at 5% of IT max. Note : for both polarities of referenced to /7
3 THERMAL RESISTANCES Symbol Parameter Value Unit R th(j-c) Junction to case (AC) D ² PAK/TO-AB 1.4 C/W TO-AB Insulated.3 R th(j-a) Junction to ambient S = 1 cm ² D ² PAK 45 C/W TO-AB TO-AB Insulated 6 S = Copper surface under tab PRODUCT SELECTOR Voltage (xxx) Part Number Sensitivity Type Package 6 V 8 V BTA/BTB1-xxxB X X 5 ma Standard TO-AB BTA/BTB1-xxxBW X X 5 ma Snubberless TO-AB BTA/BTB1-xxxC X X 5 ma Standard TO-AB BTA/BTB1-xxxCW X X 35 ma Snubberless TO-AB BTA/BTB1-xxxSW X X ma Logic level TO-AB T135-xxx X X 35 ma Snubberless D ² PAK BTB: non insulated TO-AB package ORDERIN INFORMATION BT A 1-6 BW TRIAC SERIES INSULATION: A: insulated B: non insulated CURRENT: 1A VOLTAE: 6: 6V 8: 8V SENSITIVITY & TYPE B: 5mA STANDARD BW: 5mA SNUBBERLESS C: 5mA STANDARD CW: 35mA SNUBBERLESS SW: ma LOIC LEVEL T (-TR) TRIAC SERIES CURRENT: 1A SENSITIVITY: 35: 35mA VOLTAE: 6: 6V 8: 8V PACKAE: : D PAK PACKIN MODE: Blank: Tube -TR: Tape & Reel 3/7
4 OTHER INFORMATION Part Number Marking Weight Base quantity Packing mode BTA/BTB1-xxxyz BTA/BTB1-xxxyz.3 g 5 Bulk T135-xxx T135xxx 1.5 g 5 Tube T135-xxx-TR T135xxx 1.5 g Tape & reel Note: xxx = voltage, yy = sensitivity, z = type Fig. 1: Maximum power dissipation versus RMS on-state current (full cycle). P (W) IT(RMS)(A) Fig. -1: RMS on-state current versus case temperature (full cycle). IT(RMS) (A) BTB/T BTA Tc( C) Fig. -: RMS on-state current versus ambient temperature (printed circuit board FR4, copper thickness: 35µm),full cycle. Fig. 3: Relative variation of thermal impedance versus pulse duration. IT(RMS) (A) DPAK (S=1cm ).5 Tamb( C) E+ 1E-1 K=[Zth/Rth] Zth(j-c) Zth(j-a) tp(s) 1E- 1E-3 1E- 1E-1 1E+ 1E+1 1E+ 5E+ 4/7
5 Fig. 4: values). On-state characteristics (maximum Fig. 5: Surge peak on-state current versus number of cycles. ITM (A) Tj max Tj=5 C Tj max. Vto =.85 V Rd = 35 mω VTM(V) ITSM (A) Repetitive Tc=9 C Non repetitive Tj initial=5 C Number of cycles t=ms One cycle 1 Fig. 6: Non-repetitive surge peak on-state current for a sinusoidal pulse with width tp < ms, and corresponding value of I²t. Fig. 7: Relative variation of gate trigger current, holding current and latching current versus junction temperature (typical values). ITSM (A), I²t (A²s) di/dt limitation: 5A/µs Tj initial=5 C ITSM I²t IT,IH,IL[Tj] / IT,IH,IL [Tj=5 C] IT IH & IL tp (ms) Tj( C) Fig. 8: Relative variation of critical rate of decrease of main current versus (dv/dt)c (typical values). Fig. 9: Relative variation of critical rate of decrease of main current versus junction temperature (di/dt)c [(dv/dt)c] / Specified (di/dt)c SW C B BW/CW/T (dv/dt)c (V/µs) (di/dt)c [Tj] / (di/dt)c [Tj specified] Tj ( C) /7
6 Fig. : D²PAK Thermal resistance junction to ambient versus copper surface under tab (printed circuit board FR4, copper thickness: 35 µm). Rth(j-a) ( C/W) 8 7 D²PAK S(cm²) PACKAE MECHANICAL DATA D²PAK (Plastic) DIMENSIONS A REF. Millimeters Inches L L L3 E B B. MIN. FLAT ZONE C C R V D Min. Typ. Max. Min. Typ. Max. A B B C C D E L L L R.4.16 V 8 8 FOOTPRINT DIMENSIONS (in millimeters) D²PAK (Plastic) /7
7 PACKAE MECHANICAL DATA TO-AB / TO-AB Ins. DIMENSIONS B C REF. Millimeters Inches b Min. Typ. Max. Min. Typ. Max. I L F A a a l4 b1 e l3 l a1 A a c M c1 B b b C c c e F I I L l l M.6. Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics ROUP OF COMPANIES Australia - Brazil - China - Finland - France - ermany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom 7/7
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