3-to-8 line decoder/demultiplexer; inverting

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1 74LVC38 Rev. 5 9 October 0 Product data sheet. General description The 74LVC38 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (0, and ) and, when enabled, provides eight mutually exclusive outputs (Y0 to Y7) that are LOW when selected. There are three enable inputs: two active LOW (E ande) and one active HIGH (E3). Every output will be HIGH unless E ande are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a -of-3 (5 lines to 3 lines) decoder with just four 74LVC38 devices and one inverter. The 74LVC38 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state.. Features and benefits 5 V tolerant inputs for interfacing with 5 V logic Wide supply voltage range from. V to 3.6 V CMOS low power consumption Direct interface with TTL levels Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Mutually exclusive outputs Output drive capability 50 transmission lines at 5 C Complies with JEDEC standard: JESD8-7 (.65 V to.95 V) JESD8-5 (.3 V to.7 V) JESD8-C/JESD36 (.7 V to 3.6 V) ESD protection: HBM JESD-4F exceeds 000 V MM JESD-5-B exceeds 00 V CDM JESD-C0E exceeds 000 V Specified from 40 C to+85 C and from 40 C to +5 C

2 74LVC38 3. Ordering information Table. Type number Ordering information Package Temperature range Name Description Version 74LVC38D 40 C to+5 C SO6 plastic small outline package; 6 leads; body width 3.9 mm 74LVC38DB 40 C to+5 C SSOP6 plastic shrink small outline package; 6 leads; body width 5.3 mm 74LVC38PW 40 C to+5 C TSSOP6 plastic thin shrink small outline package; 6 leads; body width 4.4 mm 74LVC38BQ 40 C to+5 C DHVQFN6 plastic dual in-line compatible thermal-enhanced very thin quad flat package; no leads; 6 terminals; body mm 4. Functional diagram SOT09- SOT338- SOT403- SOT E E E3 0 Y0 5 Y 4 Y 3 Y3 Y4 Y5 0 Y6 9 Y7 7 mna DX 0 G 0 7 & (a) & X/Y EN 7 mna37 (b) Fig. Logic symbol Fig. IEC logic symbol 0 Y0 Y 5 4 Y to-8 DECODER ENBLE EXITING Y3 Y4 Y5 0 Y6 9 Y7 7 4 E 5 E 6 E3 mna37 Fig 3. Functional diagram 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 of 6

3 74LVC38 5. Pinning information 5. Pinning V CC Y0 Y terminal index area 0 VCC Y0 Y E E E Y Y3 Y4 E E E3 Y GND () 7 0 Y Y3 Y4 Y5 Y7 7 0 Y5 8 9 GND 8 9 Y6 GND Y6 00aad035 00aad033 Transparent top view () This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration for SO6 and (T)SSOP6 Fig 5. Pin configuration for DHVQFN6 5. Pin description Table. Pin description Symbol Pin Description 0 address input address input 3 address input E 4 enable input (active LOW) E 5 enable input (active LOW) E3 6 enable input (active HIGH) GND 8 ground (0 V) Y[0:7] 5, 4, 3,,, 0, 9, 7 output V CC 6 supply voltage 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 3 of 6

4 74LVC38 6. Functional description Table 3. Function table [] Input Output E E E3 0 Y0 Y Y Y3 Y4 Y5 Y6 Y7 H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H H L L H L H H H H H H L H L H H L H H H H H H H L H H H L H H H H L L H H H H H L H H H H L H H H H H H L H H L H H H H H H H H L H H H H H H H H H H H L [] H = HIGH voltage level; L = LOW voltage level; X = don t care 7. Limiting values Table 4. Limiting values In accordance with the bsolute Maximum Rating System (IEC 6034). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit V CC supply voltage V I IK input clamping current V I <0 V 50 - m V I input voltage [] V I OK output clamping current V O >V CC or V O <0 V - 50 m V O output voltage output HIGH or LOW state [] 0.5 V CC +0.5 V I O output current V O =0 VtoV CC - 50 m I CC supply current - 00 m I GND ground current 00 - m T stg storage temperature C P tot total power dissipation T amb = 40 C to +5 C [3] mw [] The minimum input voltage ratings may be exceeded if the input current ratings are observed. [] The output voltage ratings may be exceeded if the output current ratings are observed. [3] For SO6 packages: above 70 C the value of P D derates linearly with 8 mw/k. For (T)SSOP6 packages: above 60 C the value of P D derates linearly with 5.5 mw/k. For DHVQFN6 packages: above 60 C the value of P D derates linearly with 4.5 mw/k. 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 4 of 6

5 74LVC38 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit V CC supply voltage V 9. Static characteristics functional. - - V V I input voltage V V O output voltage output HIGH or LOW state 0 - V CC V T amb ambient temperature C t/ V input transition rise and fall rate V CC =.65 V to.7 V 0-0 ns/v V CC =.7 V to 3.6 V 0-0 ns/v Table 6. Static characteristics t recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 40 C to +85 C 40 C to +5 C Unit Min Typ [] Max Min Max V IH HIGH-level V CC =. V V input voltage V CC =.65 V to.95 V 0.65 V CC V CC - V V CC =.3 V to.7 V V V CC =.7 V to 3.6 V V V IL LOW-level V CC =. V V input voltage V CC =.65 V to.95 V V CC V CC V V CC =.3 V to.7 V V V CC =.7 V to 3.6 V V V OH HIGH-level V I =V IH or V IL output I O = 00 ; voltage V CC =.65Vto3.6V V CC V CC V I O = 4 m; V CC =.65 V V I O = 8 m; V CC =.3 V V I O = m; V CC =.7 V V I O = 8 m; V CC = 3.0 V V I O = 4 m; V CC = 3.0 V V V OL I I LOW-level output voltage input leakage current V I =V IH or V IL I O = 00 ; V V CC =.65 V to 3.6 V I O =4m; V CC =.65 V V I O =8m; V CC =.3 V V I O =m; V CC =.7 V V I O =4m; V CC = 3.0 V V V CC = 3.6 V; V I =5.5VorGND LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 5 of 6

6 74LVC38 Table 6. Static characteristics continued t recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 40 C to +85 C 40 C to +5 C Unit I CC I CC C I supply current additional supply current input capacitance [] ll typical values are measured at V CC = 3.3 V (unless stated otherwise) and T amb =5 C. 0. Dynamic characteristics Min Typ [] Max Min Max V CC = 3.6 V; V I =V CC or GND; I O = per input pin; V CC =.7 V to 3.6 V; V I =V CC 0.6 V; I O =0 V CC = 0 V to 3.6 V; pf V I =GNDtoV CC Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter Conditions 40 C to +85 C 40 C to +5 C Unit Min Typ [] Max Min Max t pd propagation delay n to Yn; see Figure 6 [] V CC =. V ns V CC =.65 V to.95 V ns V CC =.3 V to.7 V ns V CC =.7 V ns V CC = 3.0 V to 3.6 V ns E3 to Yn; see Figure 6 [] V CC =. V ns V CC =.65 V to.95 V ns V CC =.3 V to.7 V ns V CC =.7 V ns V CC = 3.0 V to 3.6 V ns En toyn; see Figure 7 [] V CC =. V ns V CC =.65 V to.95 V ns V CC =.3 V to.7 V ns V CC =.7 V ns V CC = 3.0 V to 3.6 V ns t sk(o) output skew time [3] ns 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 6 of 6

7 74LVC38 Table 7. Dynamic characteristics continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8. Symbol Parameter Conditions 40 C to +85 C 40 C to +5 C Unit Min Typ [] Max Min Max C PD power dissipation V I = GND to V CC [4] capacitance V CC =.65 V to.95 V pf V CC =.3 V to.7 V pf V CC = 3.0 V to 3.6 V -. - pf [] Typical values are measured at T amb =5 C and V CC =. V,.8 V,.5 V,.7 V, and 3.3 V respectively. [] t pd is the same as t PLH and t PHL. [3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. [4] C PD is used to determine the dynamic power dissipation (P D in W). P D =C PD V CC f i N+ (C L V CC f o ) where: f i = input frequency in MHz; f o = output frequency in MHz C L = output load capacitance in pf V CC = supply voltage in V N = number of inputs switching (C L V CC f o ) = sum of outputs. Waveforms V CC V CC n, E3 input GND V M E, E input GND V M t PHL t PLH t PHL t PLH V OH V OH Yn output V M Yn output V M V OL V OL t THL t TLH t THL t TLH mna373 mna374 V M =.5VatV CC.7 V; V M =0.5 V CC at V CC <.7V; V OL and V OH are typical output voltage levels that occur with the output load. V M =.5VatV CC.7 V; V M =0.5 V CC at V CC <.7V; V OL and V OH are typical output voltage levels that occur with the output load. Fig 6. The inputs n, E3 to outputs Yn propagation delays Fig 7. The inputs En to outputs Yn propagation delays 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 7 of 6

8 74LVC38 V I negative pulse 0 V 90 % V M 0 % t W V M t f t r t r t f V I positive pulse 0 V 0 % 90 % V M t W V M V CC PULSE GENERTOR V I DUT V O RT CL RL 00aaf65 Fig 8. Test data is given in Table 8. Definitions for test circuit: R L = Load resistance. C L = Load capacitance including jig and probe capacitance. R T = Termination resistance should be equal to output impedance Z o of the pulse generator. Test circuit for measuring switching times Table 8. Test data Supply voltage Input Load V I t r, t f C L R L. V V CC ns 30 pf k.65 V to.95 V V CC ns 30 pf k.3 V to.7 V V CC ns 30 pf 500.7V.7V.5 ns 50 pf Vto3.6V.7V.5 ns 50 pf LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 8 of 6

9 74LVC38. Package outline SO6: plastic small outline package; 6 leads; body width 3.9 mm SOT09- D E X c y H E v M Z 6 9 Q ( ) 3 pin index θ L p 8 L e b p w M detail X mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches max b p c D () E () e H () E L L p Q v w y Z Note. Plastic or metal protrusions of 0.5 mm (0.006 inch) maximum per side are not included θ o 8 o OUTLINE VERSION REFERENCES IEC JEDEC JEIT EUROPEN PROJECTION ISSUE DTE SOT09-076E07 MS Fig 9. Package outline SOT09- (SO6) 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 9 of 6

10 74LVC38 SSOP6: plastic shrink small outline package; 6 leads; body width 5.3 mm SOT338- D E X c y H E v M Z 6 9 Q ( ) 3 pin index 8 detail X L p L θ e b p w M mm scale DIMENSIONS (mm are the original dimensions) UNIT 3 b p c D () E () e H E L L p Q v w y Z() max. mm θ o 8 o 0 Note. Plastic or metal protrusions of 0.5 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEIT EUROPEN PROJECTION ISSUE DTE SOT338- MO Fig 0. Package outline SOT338- (SSOP6) 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 0 of 6

11 74LVC38 TSSOP6: plastic thin shrink small outline package; 6 leads; body width 4.4 mm SOT403- D E X c y H E v M Z 6 9 pin index Q ( ) 3 θ 8 e b p w M detail X L p L mm scale DIMENSIONS (mm are the original dimensions) UNIT 3 b p c D () E () e H () E L L p Q v w y Z max. mm θ o 8 o 0 Notes. Plastic or metal protrusions of 0.5 mm maximum per side are not included.. Plastic interlead protrusions of 0.5 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEIT SOT403- MO-53 EUROPEN PROJECTION ISSUE DTE Fig. Package outline SOT403- (TSSOP6) 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 of 6

12 74LVC38 DHVQFN6: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 6 terminals; body.5 x 3.5 x 0.85 mm SOT763- D B E c terminal index area detail X terminal index area e e b 7 v M w M C C B y C C y L 8 E h e D h X mm scale DIMENSIONS (mm are the original dimensions) UNIT () max. b c D () D h E () Eh e e L v w y y mm Note. Plastic or metal protrusions of mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEIT SOT MO EUROPEN PROJECTION ISSUE DTE Fig. Package outline SOT763- (DHVQFN6) 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 of 6

13 74LVC38 3. bbreviations Table 9. cronym CDM DUT ESD HBM MM TTL bbreviations Description Charged Device Model Device Under Test ElectroStatic Discharge Human Body Model Machine Model Transistor-Transistor Logic 4. Revision history Table 0. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVC38 v Product data sheet - 74LVC38 v.4 Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Table 4, Table 5, Table 6, Table 7 and Table 8: values added for lower voltage ranges. 74LVC38 v Product specification - 74LVC38 v.3 74LVC38 v Product specification - 74LVC38 v. 74LVC38 v Product specification - 74LVC38 v. 74LVC38 v LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 3 of 6

14 74LVC38 5. Legal information 5. Data sheet status Document status [][] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [] Please consult the most recently issued document before initiating or completing a design. [] The term short data sheet is explained in section Definitions. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL 5. Definitions Draft The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet short data sheet is an extract from a full data sheet with the same product type number(s) and title. short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 5.3 Disclaimers Limited warranty and liability Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer s own risk. pplications pplications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer s applications and products planned, as well as for the planned application and use of customer s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer s applications or products, or the application or use by customer s third party customer(s). Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer s third party customer(s). NXP does not accept any liability in this respect. Limiting values Stress above one or more limiting values (as defined in the bsolute Maximum Ratings System of IEC 6034) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 4 of 6

15 74LVC38 Non-automotive qualified products Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors specifications such use shall be solely at customer s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors standard warranty and NXP Semiconductors product specifications. 5.4 Trademarks Notice: ll referenced brands, product names, service names and trademarks are the property of their respective owners. 6. Contact information For more information, please visit: For sales office addresses, please send an to: salesaddresses@nxp.com 74LVC38 ll information provided in this document is subject to legal disclaimers. NXP B.V. 0. ll rights reserved. Product data sheet Rev. 5 9 October 0 5 of 6

16 74LVC38 7. Contents General description Features and benefits Ordering information Functional diagram Pinning information Pinning Pin description Functional description Limiting values Recommended operating conditions Static characteristics Dynamic characteristics Waveforms Package outline bbreviations Revision history Legal information Data sheet status Definitions Disclaimers Trademarks Contact information Contents Please be aware that important notices concerning this document and the product(s) described herein, have been included in section Legal information. NXP B.V. 0. ll rights reserved. For more information, please visit: For sales office addresses, please send an to: salesaddresses@nxp.com Date of release: 9 October 0 Document identifier: 74LVC38

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