Architecture des Ordinateurs

Transcription

1 Architecture des Ordinateurs Introduction EPFL I&C LAP

2 Who s Who Lecturer: Paolo Ienne Student Assistants (labs) Responsible graduate assistants (labs): Grace Zgheib Ana Petkovska 2 Everybody is reachable at Name.Surname@epfl.ch

3 Computer Architecture Rocks! 52% / year: processor performance ~20% / year: technology (= transistor speed) Architecture! Source: Hennessy & Patterson, MK 2011

4 Processors Are Now Everywhere! 4

5 Billions of Transistors! How to design? How to get it right? Intel 5

6 What You Will Learn in ArchOrd 1. What is the heart of a computer?! What is a processor? What is its basic structure? How does it work? How is a processor really programmed? PART I: Processor Architecture Goals Create elementary but fully functional processors Understand assembler programming 6

7 What You Will Learn in ArchOrd 1. How computers manipulate numbers?! What are the basic representations for numbers? How are basic arithmetic components built? What are overflows? How can they be detected? PART II: Computer Arithmetic Goals Understand basic computer arithmetic Understand floating point 7

8 What You Will Learn in ArchOrd 1. How is memory system build?! Memory is slow. How do I avoid slowing down the whole system? Memory is expensive. How do I cheat the programmer into believing memory is (almost) infinite? PART III: Memory Hierarchy Goals Understand typical memory hierarchies 8

9 What Will Wait until ArchSoC Part I: Computer Organization What is around a processor to make a full computer? How the processor exchanges information with the rest of the world? Part II: Increasing Performance What makes a good processor? How real processors achieve ever increasing performances? Part III: Multiprocessing What are the challenges of connecting many processors together? What will change from the single processor system? 9

10 What You Should Know Already Elements of digital design (Systèmes Logiques) Logic equations, FSMs, logic gates, etc. Elements of VHDL (Systèmes Logiques) Entities, architectures, processes, signals, etc. Elements of any programming language (Programmation I & II) Statements, variables, functions, etc. 10

11 Textbooks for ArchOrd and ArchSoC Wakerly, Digital Design (DD), Prentice Hall You may have it already from Systèmes Logiques Available from LibPoly at a special price Ashenden, The VHDL Cookbook (VHDL) On the web THE TEXTBOOK Patterson & Hennessy. Computer Organization & Design (COD) 5 th edition, MK 2013 Available from LibPoly at a special price The older editions are ok, too 11

12 Schedule Schedule on the web Courses CO3: Tuesdays 1-3pm Lab Sessions INF2 + INF3: All Wednesdays 8-10am Additional lab time for personal work INF2 +INF3: All Wednesdays 10am-noon BEWARE OF IRREGULARITIES! 12

13 Architecture des ordinateurs Informatique (SIN) et Systèmes de Communication (SSC) Automne Sem. Date Heure Salle Thème Théorie Travaux Pratiques Ma h - 15h CO3 Introduction + Complex Finite State Machines in VHDL (I) Me h - 10h INF2 + INF3 FPGA4U Tutorial Ma h - 15h CO3 Complex Finite State Machines in VHDL (II) + Memories Me h - 10h INF2 + INF3 A 8-bit Sequential Multiplier: A Simple VHDL Design Ma h - 15h CO3 Introduction to Processors Me h - 10h INF2 + INF3 An ALU: Testing and Validating Digital Design Ma h - 15h CO3 Instruction Set Architectures (I) -- Principles, Addressing Modes, and Memory Me h - 10h INF2 + INF3 Memories in VHDL and on FPGA4U Ma h - 15h CO3 NO COURSE Me h - 10h INF2 + INF3 A Simple Multiycle Processor I: ALU and Memory Instructions Ma h - 15h CO3 Instruction Set Architectures (II) -- Branches, Routines, and the Stack Me h - 10h INF2 + INF3 A Simple Multiycle Processor II: Control Flow Instructions Ma h - 15h CO3 Instruction Set Architectures (III) -- Programming Examples Me h - 10h INF2 + INF3 From a Simple Multicycle Processor to a Full Multicycle Processor Ma h - 15h CO3 Computer Arithmetic (I) -- Principles and Representations + Programming Examples Me h - 10h INF2 + INF3 Programming in Assembler I: A Nios II Simulator Ma h - 15h CO3 Computer Arithmetic (II) -- Floating Point + Programming Examples Me h - 10h INF2 + INF3 Programming in Assembler II: A Simple Pong in Simulation Ma h - 15h CO3 Memory Hierarchy (I) -- Caches Me h - 10h INF2 + INF3 Programming in Assembler III: A Simple Pong on FPGA4U Ma h - 15h CO3 Memory Hierarchy (II) -- Virtual Memory Me h - 10h INF2 + INF3 A Simple Cache Controller I Ma h - 15h CO3 Memory Hierarchy (III) -- Examples of Virtual Memory Me h - 10h INF2 + INF3 A Simple Cache Controller II Ma h - 15h CO3 Memory Hierarchy (IV) -- Examples of Caches Me h - 10h INF2 + INF3 A Simple Cache Controller III Ma h - 15h CO3 Exercises Me h - 12h??? Final Test

14 Slides Available on the web No paper copy distributed (if you need them, print lab documents before coming to the lab sessions!) Please avoid printing in colour: slides will be readable in B/W (if not, let me know!) 14

15 Board All labs use the FPGA4U board The board is sold for 100 CHF (value ~300 CHF!) This gives you the possibility of continuing the labs at home and of doing many other personal projects, if you so wish Pay at the Post Office (not via Internet, please) with the bulletin de versement, then collect the board from the HelpDesk (INF117)

16 Introduction to the Labs Please all come to the first lab session (at least if you plan of doing at least one lab this semester ): 16 th September 2015, 8am-10am Interactive tutorial to the FPGA4U board and the tools, complete system setup with TAs available, etc. Essential for not getting lost in silly problems during the following labs! If you plan to use your laptop, install ModelSim and Quartus II before the first lab (see 16

17 Helpdesk and Q&A Forum FPGA Helpdesk To get your FPGA4U board (after the first lab session) Tuesdays, 11am-noon, INF117 Q&A Forum (Help Forum of Moodle, enrolment key ArchOrd_15-16) Provides answers to FAQs and is a way to get help efficiently, from both TAs and colleagues 17

18 Lab Evaluations and Grading Labs (every week): Automatic evaluation (info during the first lab) Deadline for submitting lab solutions is midnight of the day before the start of the next lab (hence, usually one week or two after the lab started) Groups of two, hence max two identical submissions allowed Different weights for the different labs Not part of the final grade, but useful as a self-assessment tool Final test (4h): 16 th December 2015, 8am-noon Room NYA Books, notes, exercises are permitted 18 ArchSoC Ienne

19 Exercise Book Available on the web Mostly, a collection of old exam questions with full solutions (for almost all exercises) If you want to know how well you are prepared for the tests, do some exercises from there Some of the in-class exercises (3-4 sessions) are also (modified) exam questions 19

20 Feedback, Please! Ask, don t struggle when you don t grab a new concept! You are here to learn and we to explain Give immediate feedback if the background is new to you: We have no idea what are you talking about! We have never seen this stuff! Contact us if you have more elaborated feedback: first and a meeting later if needed 20

21 On Your Mark! Get Set! Go! Any info missing? Ask now 21

22 Pourquoi les transparents sont en anglais?! Toute la littérature fondamentale est en anglais La majorité des termes techniques sont de toute façon en anglais et souvent n ont pas de traduction directe But: vous habituer à lire en anglais le plus tôt possible! 22