Integrated Silicon Pressure Sensor On-Chip Signal Conditioned, Temperature Compensated and Calibrated
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1 Freescale Semiconductor Data Sheet: Technical Data Pressure Rev 6, 10/2012 Integrated Silicon Pressure Sensor On-Chip Signal Conditioned, Temperature Compensated and Calibrated The series piezoresistive transducer is a state-of-the-art monolithic silicon pressure sensor designed for a wide range of applications, but particularly those employing a microcontroller or microprocessor with A/D inputs. This patented, single element transducer combines advanced micromachining techniques, thin-film metallization, and bipolar processing to provide an accurate, high level analog output signal that is proportional to the applied pressure. Features Series -25 to 25 kpa (-3.6 to 3.6 psi) 0.2 to 4.7 V Output Application Examples Respiratory Systems Process Control Patient Monitoring Remote Monitoring Devices 5.0% Maximum Error Over 0 to 85 C Ideally Suited for Microprocessor or Microcontroller-Based Systems Temperature Compensated Over 40 to +125 C Thermoplastic (PPS) Surface Mount Package Patented Silicon Shear Stress Strain Gauge Available in Differential and Gauge Configurations ORDERING INFORMATION Package Device Name Case # of Ports Pressure Type Device Options No. None Single Dual Gauge Differential Absolute Marking Small Outline Package ( Series) GC6U Rails 482A G GC6T1 Tape & Reel 482A G GP Trays 1369 GP DP Trays 1351 DP Small Outline Package (Media Resistant Gel) (MPVZ7025 Series) MPVZ7025GC6U Rails 482A MPVZ7025G MPVZ7025GP Trays 1369 MPVZ7025GP MPVZ7025G6U Rails 482 MPVZ7025G MPVZ7025DP Trays 1351 MPVZ7025DP SMALL OUTLINE PACKAGE GC6U/T1 MPVZ7025GC6U CASE 482A-01 MPVZ7025G6U CASE GP MPVZ7025GP CASE DP MPVZ7025DP CASE , 2012 Freescale Semiconductor, Inc. All rights reserved.
2 Operating Characteristics Table 1. Operating Characteristics (V S = 5.0 Vdc, T A = 25 C unless otherwise noted, P1 > P2. Decoupling circuit shown in Figure 3 required to meet electrical specifications.) Characteristic Symbol Min Typ Max Unit Pressure Range (1) Supply Voltage (2) P OP kpa V S Vdc Supply Current I o madc Minimum Pressure Offset V S = 5.0 Volts Full Scale Output V S = 5.0 Volts Full Scale Span V S = 5.0 Volts (0 to 85 C) (0 to 85 C) (0 to 85 C) V off Vdc V FSO Vdc V FSS 4.5 Vdc Accuracy (0 to 85 C) 5.0 %V FSS Sensitivity V/P 90 - mv/kpa Response Time (6) t R ms Output Source Current at Full Scale Output I o madc Warm-Up Time (7) Offset Stability (8) 20 - ms %V FSS kpa (kilopascal) equals psi. 2. Device is ratiometric within this specified excitation range. 3. Offset (V off ) is defined as the output voltage at the minimum rated pressure. 4. Full Scale Output (V FSO ) is defined as the output voltage at the maximum or full rated pressure. 5. Full Scale Span (V FSS ) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the minimum rated pressure. 6. Response Time is defined as the time for the incremental change in the output to go from 10% to 90% of its final value when subjected to a specified step change in pressure. 7. Warm-up Time is defined as the time required for the product to meet the specified output voltage after the Pressure has been stabilized. 8. Offset Stability is the product's output deviation when subjected to 1000 hours of Pulsed Pressure, Temperature Cycling with Bias Test. 2 Freescale Semiconductor, Inc.
3 Maximum Ratings Pressure Table 2. Maximum Ratings (1) Rating Symbol Value Unit Maximum Pressure (P1 > P2) P max 200 kpa Storage Temperature T stg 40 to +125 C Operating Temperature T A 40 to +125 C 1. Exposure beyond the specified limits may cause permanent damage or degradation to the device. Figure 1 shows a block diagram of the internal circuitry integrated on a pressure sensor chip. V S 2 Sensing Element Thin Film Temperature Compensation and Gain Stage #1 Gain Stage #2 and Ground Reference Shift Circuitry V out 4 GND 3 Pins 1, 5, 6, 7, and 8 are NO CONNECTS for Small Outline Package Device Figure 1. Integrated Pressure Sensor Schematic Freescale Semiconductor, Inc. 3
4 On-chip Temperature Compensation and Calibration The series pressure sensor operating characteristics, and internal reliability and qualification tests are based on use of dry air as the pressure media. Media, other than dry air, may have adverse effects on sensor performance and long-term reliability. Contact the factory for information regarding media compatibility in your application. Figure 2 shows the sensor output signal relative to pressure input. Typical, minimum, and maximum output curves are shown for operation over a temperature range of 0 to 85 C using the decoupling circuit shown in Figure 3. The output will saturate outside of the specified pressure range. Figure 3 shows the recommended decoupling circuit for interfacing the output of the integrated sensor to the A/D input of a microprocessor or microcontroller. Proper decoupling of the power supply is recommended. Output (V) Transfer Function: V out = V S *(0.018*P+0.5) ± ERROR V S = 5.0 Vdc TEMP = 0 to 85 C 3.0 TYPICAL 2.5 MAX MIN Differential Pressure (kpa) Figure 2. Output versus Pressure Differential +5 V V out OUTPUT V s IPS 1.0 F 0.01 F GND 470 pf Figure 3. Recommended Power Supply Decoupling and Output Filtering (For additional output filtering, please refer to Application Note AN1646.) 4 Freescale Semiconductor, Inc.
5 Transfer Function Nominal Transfer Value: V out = V S (P x ) ± (Pressure Error x Temp. Factor x x V S ) V S = 5.0 V 0.25 Vdc Temperature Error Band SERIES Temperature Error Factor Temp Multiplier to Temperature in C NOTE: The Temperature Multiplier is a linear response from 0 to 40 C and from 85 to 125 C. Pressure Error Band 3.0 Error Limits for Pressure 2.0 Pressure Error (kpa) Pressure (in kpa) 3.0 Pressure Error (Max) -25 to 25 (kpa) ±1.25 (kpa) Freescale Semiconductor, Inc. 5
6 PRESSURE (P1)/VACUUM (P2) SIDE IDENTIFICATION TABLE Freescale designates the two sides of the pressure sensor as the Pressure (P1) side and the Vacuum (P2) side. The Pressure (P1) side is the side containing fluorosilicone gel which protects the die from harsh media. The pressure sensor is designed to operate with positive differential pressure applied, P1 > P2. The Pressure (P1) side may be identified by using the following table: Part Number Case Type Pressure (P1) Side Identifier GC6U/C6T1, MPVZ7025GC6U 482A Side with Port Attached GP, MPVZ7025GP 1369 Side with Port Attached DP, MPVZ7025DP 1351 Side with Part Marking MPVZ7025G6U 482 Side with Part Marking MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the surface mount packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct footprint, the packages will self align when subjected to a solder reflow process. It is always recommended to design boards with a solder mask layer to avoid bridging and shorting between solder pads TYP 8X TYP 8X TYP 8X 2.54 inch mm SCALE 2:1 Figure 4. Small Outline Package Footprint 6 Freescale Semiconductor, Inc.
7 PACKAGE DIMENSIONS Pressure N -A- -B- J 5 8 -T- S V 4 1 G C D 8 PL 0.25 (0.010) M T B S A S W H NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D G BSC 2.54 BSC H J K M N S V W K M PIN 1 IDENTIFIER SEATING CASE 482A-01 ISSUE A SMALL OUTLINE PACKAGE -A- -B G D 8 PL 0.25 (0.010) M T B S A S NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. J K S N M C PIN 1 IDENTIFIER H -T- SEATING INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D G BSC 2.54 BSC H J K M N S CASE ISSUE O SMALL OUTLINE PACKAGE Freescale Semiconductor, Inc. 7
8 PACKAGE DIMENSIONS 2 PLACES 4 TIPS (0.15) C A B A E 5 4 e e/2 GAGE D.014 (0.35) θ L DETAIL G A1 F B 8 E1 1 8X b (0.1) M C A B STYLE 1: PIN 1. GND 2. +Vout 3. Vs 4. -Vout 5. N/C 6. N/C 7. N/C 8. N/C STYLE 2: PIN 1. N/C 2. Vs 3. GND 4. Vout 5. N/C 6. N/C 7. N/C 8. N/C NOTES: 1. CONTROLLING DIMENSION: INCH. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, DIMENSIONS "D" AND "E1" DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED (0.152) PER SIDE. 4. DIMENSION "b" DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE (0.203) MAXIMUM. P N DETAIL G 8X A (0.1) C SEATING M T K DIM A A1 b D E E1 e F K L M N P T θ INCHES MILLIMETERS MIN MAX MIN MAX BSC 2.54 BSC CASE ISSUE O SMALL OUTLINE PACKAGE 8 Freescale Semiconductor, Inc.
9 PACKAGE DIMENSIONS Pressure 2 PLACES 4 TIPS (0.20) C A B A E 5 4 e e/2 GAGE D.014 (0.35) θ L DETAIL G A1 F B 8 E1 1 8X b (0.1) M C A B NOTES: 1. CONTROLLING DIMENSION: INCH. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, DIMENSIONS "D" AND "E1" DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED (0.152) PER SIDE. 4. DIMENSION "b" DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE (0.203) MAXIMUM. P T N DETAIL G 8X A (0.1) C SEATING M K INCHES MILLIMETERS DIM MIN MAX MIN MAX A A b D E BSC BSC E e BSC 2.54 BSC F K L M N P T θ CASE ISSUE O SMALL OUTLINE PACKAGE Freescale Semiconductor, Inc. 9
10 Table 3. Revision History Revision number Revision date Description of changes 6 10/2012 Deleted references to device number MPVZ7025GC6T1 and MPVZ7025G6T1 throughout the document 10 Freescale Semiconductor, Inc.
11 How to Reach Us: Home Page: freescale.com Web Support: freescale.com/support Information in this document is provided solely to enable system and software implementers to use Freescale products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits based on the information in this document. Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in Freescale data sheets and/or specifications can and do vary in different applications, and actual performance may vary over time. All operating parameters, including typicals, must be validated for each customer application by customer s technical experts. Freescale does not convey any license under its patent rights nor the rights of others. Freescale sells products pursuant to standard terms and conditions of sale, which can be found at the following address: freescale.com/salestermsandconditions. Freescale, the Freescale logo, Energy Efficient Solutions logo, are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Xtrinsic is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners Freescale Semiconductor, Inc. Rev. 6 10/2012
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